[PATCH 4.4.y-cip 05/10] ARM: dts: r8a7742: Add I2C and IIC support
Biju Das <biju.das.jz@...>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 9af42b81cfc7f48d5384fc6a6c382dc716b45563 upstream. Add the I2C[0-3] and IIC[0-3] device nodes to the R8A7742 device tree. Automatic transmission for PMIC control is not available on IIC3 hence compatible strings "renesas,rcar-gen2-iic" and "renesas,rmobile-iic" are not added to iic3 node. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...> Link: https://lore.kernel.org/r/1589555337-5498-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> [biju: changed clocks and power-domains properties, removed resets, i2c-scl-internal-delay-ns properties] Signed-off-by: Biju Das <biju.das.jz@...> --- arch/arm/boot/dts/r8a7742.dtsi | 110 +++++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi index d128fa1d4847..6693a54367aa 100644 --- a/arch/arm/boot/dts/r8a7742.dtsi +++ b/arch/arm/boot/dts/r8a7742.dtsi @@ -742,6 +742,116 @@ ranges = <0 0 0xe6300000 0x40000>; }; + i2c0: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7742", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6508000 0 0x40>; + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7742_CLK_I2C0>; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + i2c1: i2c@e6518000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7742", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6518000 0 0x40>; + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7742_CLK_I2C1>; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + i2c2: i2c@e6530000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7742", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6530000 0 0x40>; + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7742_CLK_I2C2>; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + i2c3: i2c@e6540000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7742", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6540000 0 0x40>; + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7742_CLK_I2C3>; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + iic0: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7742", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7742_CLK_IIC0>; + dmas = <&dmac0 0x61>, <&dmac0 0x62>, + <&dmac1 0x61>, <&dmac1 0x62>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + iic1: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7742", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe6510000 0 0x425>; + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7742_CLK_IIC1>; + dmas = <&dmac0 0x65>, <&dmac0 0x66>, + <&dmac1 0x65>, <&dmac1 0x66>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + iic2: i2c@e6520000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7742", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe6520000 0 0x425>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7742_CLK_IIC2>; + dmas = <&dmac0 0x69>, <&dmac0 0x6a>, + <&dmac1 0x69>, <&dmac1 0x6a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + iic3: i2c@e60b0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7742"; + reg = <0 0xe60b0000 0 0x425>; + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7742_CLK_IICDVFS>; + dmas = <&dmac0 0x77>, <&dmac0 0x78>, + <&dmac1 0x77>, <&dmac1 0x78>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7742", "renesas,rcar-dmac"; -- 2.17.1 |
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