This patch series adds support for PCIe EP on Renesas R-Car Gen3 andI quickly went through a series and code seems reasonably nice.
* Since the changes are huge I am sending the patches as RFC.And yes, it is quite big, which might be a problem. OTOH only Renesas
seems to have PCIe EP drivers enabled in their CIP defconfigs, so
there's good chance noone else in CIP project is using this code.
[If someone else _is_ using it or is considering using it, please
Could we get better explanation for 24/ of the series? spinlock is
okay as long as code inside does not sleep, does not neccessarily have
to do with interrupts.
Should 30/ and 31/ be submitted to stable?
* Required EP framework changes and fixes are ported as well.Ok, so we definitely want them in upstream, not in -next. And it might
be good to wait a bit after merge, so it gets some testing in upstream.
* I was skeptic with patch 36/50 "Rename pcie-rcar.c to pcie-rcar-host.c"Let me take a look at these in bigger detail.
* As the changes touches three other controller drivers I have build tested themWill this be tested somehow by our automated tests?
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