Re: [PATCH 4.19.y-cip 0/8] Optimize pinctrl and add QSPI[01] pins for RZ/G2{H,M,N,E}

Pavel Machek


This patch series optimizes pinctrl driver for size and adds QSPI[01]
pins for RZ/G2{H,M,N,E} SoC.

All the patches have been cherry picked from v5.11-rc2

Currently the SoC DTSI changes are being upstreamed [1] once this hits -rc
this will be backported to the CIP. This is for users who currently plan to
enable RPC-IF on CIP kernel (using patches from [1] to enable RPC-IF).


I went through this and "Add missing rpc-if clock on RZ/G2{E,M,N} SoC"
series, and they look okay to me. I can apply them if there are no
other comments.

Best regards,
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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