commit b4a43810f596b55cb29b37ce4212ac7319661fb7 upstream.

Add the definitions for pwm[0123456] to the SoC .dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/20200806183152.11809-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[PL:changed clocks and power-domain properties, removed resets property]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
arch/arm/boot/dts/r8a7742.dtsi | 63 ++++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 755136f88b01..ba2ddff1eff6 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -1371,6 +1371,69 @@
status = "disabled";
};

+ pwm0: pwm@e6e30000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e30000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@e6e31000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e31000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@e6e32000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e32000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@e6e33000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm4: pwm@e6e34000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e34000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm5: pwm@e6e35000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e35000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm6: pwm@e6e36000 {
+ compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
+ reg = <0 0xe6e36000 0 0x8>;
+ clocks = <&mstp5_clks R8A7742_CLK_PWM>;
+ power-domains = <&cpg_clocks>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
rcar_sound: sound@ec500000 {
/*
* #sound-dai-cells is required
--
2.17.1