[PATCH 5.10.y-cip 03/61] dt-bindings: net: renesas,etheravb: Document Gigabit Ethernet IP


Lad Prabhakar
 

From: Biju Das <biju.das.jz@...>

commit 1dbd981fcf2a4498bbf66b55b830ca0aadff9476 upstream.

Document Gigabit Ethernet IP found on RZ/G2L SoC.

Gigabit Ethernet Interface includes Ethernet controller (E-MAC),
Internal TCP/IP Offload Engine (TOE) and Dedicated Direct memory
access controller (DMAC) for transferring transmitted Ethernet
frames to and received Ethernet frames from respective storage
areas in the URAM at high speed.

Signed-off-by: Biju Das <biju.das.jz@...>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Link: https://lore.kernel.org/r/20210727123450.15918-1-biju.das.jz@bp.renesas.com
Signed-off-by: Rob Herring <robh@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
.../bindings/net/renesas,etheravb.yaml | 57 +++++++++++++++----
1 file changed, 45 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml
index 8d1f467c95ba..ce4f816f0769 100644
--- a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml
+++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml
@@ -42,23 +42,20 @@ properties:
- renesas,etheravb-r8a77995 # R-Car D3
- const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2

+ - items:
+ - enum:
+ - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
+ - const: renesas,rzg2l-gbeth # RZ/G2L
+
reg: true

interrupts: true

interrupt-names: true

- clocks:
- minItems: 1
- items:
- - description: AVB functional clock
- - description: Optional TXC reference clock
+ clocks: true

- clock-names:
- minItems: 1
- items:
- - const: fck
- - const: refclk
+ clock-names: true

iommus:
maxItems: 1
@@ -144,14 +141,20 @@ allOf:
properties:
compatible:
contains:
- const: renesas,etheravb-rcar-gen2
+ enum:
+ - renesas,etheravb-rcar-gen2
+ - renesas,rzg2l-gbeth
then:
properties:
interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
interrupt-names:
+ minItems: 1
items:
- const: mux
+ - const: int_fil_n
+ - const: int_arp_ns_n
rx-internal-delay-ps: false
else:
properties:
@@ -206,6 +209,36 @@ allOf:
tx-internal-delay-ps:
const: 2000

+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,rzg2l-gbeth
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Main clock
+ - description: Register access clock
+ - description: Reference clock for RGMII
+ clock-names:
+ items:
+ - const: axi
+ - const: chi
+ - const: refclk
+ else:
+ properties:
+ clocks:
+ minItems: 1
+ items:
+ - description: AVB functional clock
+ - description: Optional TXC reference clock
+ clock-names:
+ minItems: 1
+ items:
+ - const: fck
+ - const: refclk
+
additionalProperties: false

examples:
--
2.17.1

Join cip-dev@lists.cip-project.org to automatically receive all group messages.