Re: [PATCH 5.10.y-cip 25/27] arm64: dts: renesas: rzg2l-smarc: Enable SCIF2 on carrier board


Pavel Machek
 

Hi!

commit 5a8aa63c9bca800e6049d90422abe5404227a703 upstream.

SCIF2 interface is available on PMOD1 connector (CN7) on carrier board,
This patch adds pinmux and scif2 node to carrier board dtsi file.

+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -8,9 +8,13 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

+/* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */
+#define PMOD1_SER0 1
+
AFAICT this needs to be set to 0, not commented out.


@@ -156,6 +167,23 @@
status = "okay";
};

+/*
+ * To enable SCIF2 (SER0) on PMOD1 (CN7)
+ * SW1 should be at position 2->3 so that SER0_CTS# line is activated
+ * SW2 should be at position 2->3 so that SER0_TX line is activated
+ * SW3 should be at position 2->3 so that SER0_RX line is activated
+ * SW4 should be at position 2->3 so that SER0_RTS# line is activated
+ */
+#if PMOD1_SER0
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+#endif
+
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
Best regards,
Pavel

--
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