This patch series for supporting RZ/G2[MN] rev4 board to cip-4.19.y
kernel.

Biju Das (1):
arm64: dts: renesas: r8a774a1: Remove audio port node

Lad Prabhakar (11):
arm64: dts: renesas: r8a774a1-hihope-rzg2m[-ex/-ex-idk-1110wr]: Rename
HiHope RZ/G2M boards
arm64: dts: renesas: r8a774b1-hihope-rzg2n[-ex]: Rename HiHope RZ/G2N
boards
arm64: dts: renesas: hihope-common: Separate out Rev.2.0 specific into
hihope-rev2.dtsi file
arm64: dts: renesas: Add HiHope RZ/G2M[N] Rev.3.0/4.0 specific into
common file
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 main board support
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 sub board support
arm64: dts: renesas: hihope-rzg2-ex: Separate out lvds specific nodes
into common file
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 board with
idk-1110wr display
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 main board support
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 sub board support
arm64: dts: renesas: Add HiHope RZ/G2N Rev2.0/3.0/4.0 board with
idk-1110wr display

arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 11 -----------
1 file changed, 11 deletions(-)

--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 8fb161447da014417eb43944369e8f35bb4c1b56 upstream.

The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N Rev.3.0/4.0 main
board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 3 ++-
.../dts/renesas/r8a774b1-hihope-rzg2n-ex.dts | 16 ++++++++++++++++
2 files changed, 18 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 309f9712991e..e97daa8f746f 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -7,7 +7,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex-idk-1110wr.dtb \
r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb \
r8a774b1-hihope-rzg2n-rev2.dtb
-dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2-ex.dtb
+dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb \
+ r8a774b1-hihope-rzg2n-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \
r8a774c0-ek874-idk-2121wr.dtb
dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts
new file mode 100644
index 000000000000..a3edd55113df
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2N Rev.3.0/4.0 connected to
+ * sub board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774b1-hihope-rzg2n.dts"
+#include "hihope-rzg2-ex.dtsi"
+
+/ {
+ model = "HopeRun HiHope RZ/G2N with sub board";
+ compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2n",
+ "renesas,r8a774b1";
+};
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit d728a4476a118ff4d075459fd4594f7c46e27fc0 upstream.

Add support for HiHope RZ/G2N Rev.3.0/4.0 main board support based on
r8a774b1 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 3 +-
.../dts/renesas/r8a774b1-hihope-rzg2n.dts | 41 +++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 2 +
3 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index de0d211034c6..309f9712991e 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -5,7 +5,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb \
r8a774a1-hihope-rzg2m-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex-idk-1110wr.dtb \
r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
-dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2.dtb
+dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb \
+ r8a774b1-hihope-rzg2n-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \
r8a774c0-ek874-idk-2121wr.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts
new file mode 100644
index 000000000000..f1883cbd1a82
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2N main board Rev.3.0/4.0
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a774b1.dtsi"
+#include "hihope-rev4.dtsi"
+
+/ {
+ model = "HopeRun HiHope RZ/G2N main board based on r8a774b1";
+ compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+
+ memory@480000000 {
+ device_type = "memory";
+ reg = <0x4 0x80000000 0x0 0x80000000>;
+ };
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>,
+ <&versaclock5 1>,
+ <&x302_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};
+
+&sdhi3 {
+ mmc-hs400-1_8v;
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index 5e4768fb6842..c3b858c13e67 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -10,6 +10,8 @@
#include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
#include <dt-bindings/power/r8a774b1-sysc.h>

+#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4
+
/ {
compatible = "renesas,r8a774b1";
#address-cells = <2>;
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit b0990638b625f4066396051c60b2f5480823f085 upstream.

Separate out LVDS specific nodes into common file
hihope-rzg2-ex-lvds.dtsi so that this can be re-used by RZ/G2M[N]
variants.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi | 52 +++++++++++++++++++
.../boot/dts/renesas/hihope-rzg2-ex.dtsi | 37 -------------
...a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts | 39 +-------------
3 files changed, 53 insertions(+), 75 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi

diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi
new file mode 100644
index 000000000000..40c5e8d6d841
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-lvds.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/G2[MN] HiHope sub board LVDS common parts
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+/ {
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm0 0 50000>;
+
+ brightness-levels = <0 2 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ };
+};
+
+&gpio1 {
+ /*
+ * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
+ * When GP1_20 is HIGH LVDS0 is connected to the LT8918L
+ */
+ lvds-connector-en-gpio {
+ gpio-hog;
+ gpios = <20 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "lvds-connector-en-gpio";
+ };
+};
+
+&lvds0 {
+ ports {
+ port@1 {
+ lvds_connector: endpoint {
+ };
+ };
+ };
+};
+
+&pfc {
+ pwm0_pins: pwm0 {
+ groups = "pwm0";
+ function = "pwm0";
+ };
+};
+
+&pwm0 {
+ pinctrl-0 = <&pwm0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
index 28fe17e3bc4e..acfcfd050a6c 100644
--- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
@@ -13,14 +13,6 @@
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
};
-
- backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm0 0 50000>;
-
- brightness-levels = <0 2 8 16 32 64 128 255>;
- default-brightness-level = <6>;
- };
};

&avb {
@@ -51,35 +43,6 @@
status = "okay";
};

-&gpio1 {
- /*
- * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
- * When GP1_20 is HIGH LVDS0 is connected to the LT8918L
- */
- lvds-connector-en-gpio {
- gpio-hog;
- gpios = <20 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "lvds-connector-en-gpio";
- };
-};
-
-&lvds0 {
- /*
- * Please include the LVDS panel .dtsi file and uncomment the below line
- * to enable LVDS panel connected to RZ/G2[MN] boards.
- */
-
- /* status = "okay"; */
-
- ports {
- port@1 {
- lvds_connector: endpoint {
- };
- };
- };
-};
-
&pciec0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts
index 3a1dcc914985..c0e9d8ca4a8c 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts
@@ -7,46 +7,9 @@
*/

#include "r8a774a1-hihope-rzg2m-rev2-ex.dts"
+#include "hihope-rzg2-ex-lvds.dtsi"
#include "rzg2-advantech-idk-1110wr-panel.dtsi"

-/ {
- backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm0 0 50000>;
-
- brightness-levels = <0 2 8 16 32 64 128 255>;
- default-brightness-level = <6>;
- };
-
-};
-
-&gpio1 {
- /*
- * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
- * When GP1_20 is HIGH LVDS0 is connected to the LT8918L
- */
- lvds-connector-en-gpio {
- gpio-hog;
- gpios = <20 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "lvds-connector-en-gpio";
- };
-};
-
&lvds0 {
status = "okay";
};
-
-&pfc {
- pwm0_pins: pwm0 {
- groups = "pwm0";
- function = "pwm0";
- };
-};
-
-&pwm0 {
- pinctrl-0 = <&pwm0_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 035329301e633c28601f333f16a73c29e3819fac upstream.

The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M Rev.3.0/4.0
main board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 3 ++-
.../dts/renesas/r8a774a1-hihope-rzg2m-ex.dts | 21 +++++++++++++++++++
2 files changed, 23 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 103d525f1852..3420c56e70ac 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -1,7 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb \
r8a774a1-hihope-rzg2m-rev2.dtb
-dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
+dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb \
+ r8a774a1-hihope-rzg2m-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2-ex.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts
new file mode 100644
index 000000000000..a5ca86196a7b
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 connected to
+ * sub board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774a1-hihope-rzg2m.dts"
+#include "hihope-rzg2-ex.dtsi"
+
+/ {
+ model = "HopeRun HiHope RZ/G2M with sub board";
+ compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m",
+ "renesas,r8a774a1";
+};
+
+/* SW43 should be OFF, if in ON state SATA port will be activated */
+&pciec1 {
+ status = "okay";
+};
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 667175f5029c5f6ec7a72811fc6b14c33d252286 upstream.

The HiHope RZ/G2N variants are advertised as compatible with panel
idk-1110wr from Advantech, however the panel isn't sold alongside the
board. New dts's, enabling the lvds node to get the panel to work with
all the HiHope RZ/G2N variants.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-12-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 2 ++
.../r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts | 15 +++++++++++++++
.../r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts | 15 +++++++++++++++
3 files changed, 32 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index e97daa8f746f..d43027ca5c03 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb \
r8a774b1-hihope-rzg2n-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb \
r8a774b1-hihope-rzg2n-rev2-ex.dtb
+dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex-idk-1110wr.dtb \
+ r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \
r8a774c0-ek874-idk-2121wr.dtb
dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts
new file mode 100644
index 000000000000..4b5154f029a5
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2N Rev.3.0/4.0 with sub board connected
+ * to an Advantech IDK-1110WR 10.1" LVDS panel
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774b1-hihope-rzg2n-ex.dts"
+#include "hihope-rzg2-ex-lvds.dtsi"
+#include "rzg2-advantech-idk-1110wr-panel.dtsi"
+
+&lvds0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts
new file mode 100644
index 000000000000..e730b3b25dbe
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2N Rev.2.0 with sub board connected
+ * to an Advantech IDK-1110WR 10.1" LVDS panel
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774b1-hihope-rzg2n-rev2-ex.dts"
+#include "hihope-rzg2-ex-lvds.dtsi"
+#include "rzg2-advantech-idk-1110wr-panel.dtsi"
+
+&lvds0 {
+ status = "okay";
+};
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 51fb6306d0587ab24187f429a703272aab466b1e upstream.

Add support for idk-1110wr display as similarly done for Rev.2.0

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 3 ++-
.../r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts | 15 +++++++++++++++
2 files changed, 17 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 3420c56e70ac..de0d211034c6 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -3,7 +3,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb \
r8a774a1-hihope-rzg2m-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb \
r8a774a1-hihope-rzg2m-rev2-ex.dtb
-dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
+dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex-idk-1110wr.dtb \
+ r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts
new file mode 100644
index 000000000000..06c04c59cc78
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 sub board connected
+ * to an Advantech IDK-1110WR 10.1" LVDS panel
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774a1-hihope-rzg2m-ex.dts"
+#include "hihope-rzg2-ex-lvds.dtsi"
+#include "rzg2-advantech-idk-1110wr-panel.dtsi"
+
+&lvds0 {
+ status = "okay";
+};
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 8c41b3d7a7abc4af05eda380ddb17b8457a3f3de upstream.

Add support for HiHope RZ/G2M Rev.3.0/4.0 main board support based on
r8a774a1 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 3 +-
.../dts/renesas/r8a774a1-hihope-rzg2m.dts | 37 +++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 2 +
3 files changed, 41 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index e77140d382ac..103d525f1852 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2.dtb
+dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb \
+ r8a774a1-hihope-rzg2m-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts
new file mode 100644
index 000000000000..25ae255de0f2
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 main board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a774a1.dtsi"
+#include "hihope-rev4.dtsi"
+
+/ {
+ model = "HopeRun HiHope RZ/G2M main board based on r8a774a1";
+ compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x80000000>;
+ };
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&versaclock5 1>,
+ <&x302_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 86ad9b34810f..2aaeb8e7dc65 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -10,6 +10,8 @@
#include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
#include <dt-bindings/power/r8a774a1-sysc.h>

+#define CPG_AUDIO_CLK_I R8A774A1_CLK_S0D4
+
/ {
compatible = "renesas,r8a774a1";
#address-cells = <2>;
--
2.17.1

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 99167613db6e439d877131e1fbe617e4420b954f upstream.

Separate out Rev.2.0 specific hardware changes into hihope-rev2.dtsi
file so that hihope-common.dtsi can be used by all the variants for
RZ/G2M[N] boards.

LED node names have been updated according to Rev.4.0 schematics.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../arm64/boot/dts/renesas/hihope-common.dtsi | 71 +--------------
arch/arm64/boot/dts/renesas/hihope-rev2.dtsi | 86 +++++++++++++++++++
.../renesas/r8a774a1-hihope-rzg2m-rev2.dts | 2 +-
.../renesas/r8a774b1-hihope-rzg2n-rev2.dts | 2 +-
4 files changed, 92 insertions(+), 69 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/hihope-rev2.dtsi

diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
index 2c942a7eaeeb..3132c2cc99c4 100644
--- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree Source for the HiHope RZ/G2[MN] main board common parts
+ * Device Tree Source for the HiHope RZ/G2[MN] main board
+ * Rev.[2.0/3.0/4.0] common parts
*
* Copyright (C) 2019 Renesas Electronics Corp.
*/
@@ -32,17 +33,6 @@
leds {
compatible = "gpio-leds";

- bt_active_led {
- label = "blue:bt";
- gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "hci0-power";
- default-state = "off";
- };
-
- led0 {
- gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
- };
-
led1 {
gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
};
@@ -55,11 +45,8 @@
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
};

- wlan_active_led {
- label = "yellow:wlan";
- gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "phy0tx";
- default-state = "off";
+ led4 {
+ gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
};
};

@@ -113,17 +100,6 @@
1800000 0>;
};

- wlan_en_reg: regulator-wlan_en {
- compatible = "regulator-fixed";
- regulator-name = "wlan-en-regulator";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <70000>;
-
- gpio = <&gpio_expander 1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
x302_clk: x302-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -195,11 +171,6 @@

uart-has-rtscts;
status = "okay";
-
- bluetooth {
- compatible = "ti,wl1837-st";
- enable-gpios = <&gpio_expander 2 GPIO_ACTIVE_HIGH>;
- };
};

&hsusb {
@@ -211,13 +182,6 @@
clock-frequency = <400000>;
status = "okay";

- gpio_expander: gpio@20 {
- compatible = "onnn,pca9654";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
versaclock5: clock-generator@6a {
compatible = "idt,5p49v5923";
reg = <0x6a>;
@@ -282,11 +246,6 @@
power-source = <1800>;
};

- sound_clk_pins: sound_clk {
- groups = "audio_clk_a_a";
- function = "audio_clk";
- };
-
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
@@ -310,28 +269,6 @@
};
};

-&rcar_sound {
- pinctrl-0 = <&sound_clk_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-
- /* Single DAI */
- #sound-dai-cells = <0>;
-
- rsnd_port: port {
- rsnd_endpoint: endpoint {
- remote-endpoint = <&dw_hdmi0_snd_in>;
-
- dai-format = "i2s";
- bitclock-master = <&rsnd_endpoint>;
- frame-master = <&rsnd_endpoint>;
-
- playback = <&ssi2>;
- };
- };
-};
-
&rwdt {
timeout-sec = <60>;
status = "okay";
diff --git a/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi b/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi
new file mode 100644
index 000000000000..8e2db1d6ca81
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2[MN] main board Rev.2.0 common
+ * parts
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "hihope-common.dtsi"
+
+/ {
+ leds {
+ compatible = "gpio-leds";
+
+ bt_active_led {
+ label = "blue:bt";
+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "hci0-power";
+ default-state = "off";
+ };
+
+ wlan_active_led {
+ label = "yellow:wlan";
+ gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+ };
+
+ wlan_en_reg: regulator-wlan_en {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ startup-delay-us = <70000>;
+
+ gpio = <&gpio_expander 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&hscif0 {
+ bluetooth {
+ compatible = "ti,wl1837-st";
+ enable-gpios = <&gpio_expander 2 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&i2c4 {
+ gpio_expander: gpio@20 {
+ compatible = "onnn,pca9654";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&pfc {
+ sound_clk_pins: sound_clk {
+ groups = "audio_clk_a_a";
+ function = "audio_clk";
+ };
+};
+
+&rcar_sound {
+ pinctrl-0 = <&sound_clk_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ rsnd_port: port {
+ rsnd_endpoint: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint>;
+ frame-master = <&rsnd_endpoint>;
+
+ playback = <&ssi2>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts
index 276f449ad14e..bb18f6ee2048 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts
@@ -7,7 +7,7 @@

/dts-v1/;
#include "r8a774a1.dtsi"
-#include "hihope-common.dtsi"
+#include "hihope-rev2.dtsi"

/ {
model = "HopeRun HiHope RZ/G2M main board (Rev.2.0) based on r8a774a1";
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2.dts b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2.dts
index eb1206b2d97a..c69ca5cf6f77 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2.dts
@@ -7,7 +7,7 @@

/dts-v1/;
#include "r8a774b1.dtsi"
-#include "hihope-common.dtsi"
+#include "hihope-rev2.dtsi"

/ {
model = "HopeRun HiHope RZ/G2N main board (Rev.2.0) based on r8a774b1";
--
2.17.1

From: Biju Das <biju.das@bp.renesas.com>

commit a381325812691f57aece60aaee76938ac8fc6619 upstream.

This patch removes audio port node from SoC device tree and
fixes the below dtb warning

Warning (unit_address_vs_reg): /soc/sound@ec500000/ports/port@0: node has a unit name, but no reg property

Fixes: e2f04248fcd4 ("arm64: dts: renesas: r8a774a1: Add audio support")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1570200761-884-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
(Dropped hihope-common.dtsi changes as they have been already merged)
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 11 -----------
1 file changed, 11 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 86ad9b34810f..e299343697c6 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1813,17 +1813,6 @@
dma-names = "rx", "tx";
};
};
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- };
- port@1 {
- reg = <1>;
- };
- };
};

audma0: dma-controller@ec700000 {
--
2.17.1

On 19.08.20 08:31, nobuhiro1.iwamatsu@toshiba.co.jp wrote:

Hi,

-----Original Message-----
From: Jan Kiszka [mailto:jan.kiszka@siemens.com]
Sent: Wednesday, August 19, 2020 3:18 PM
To: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; cip-dev@lists.cip-project.org
Subject: Re: [isar-cip-core][PATCH v2 3/3] testing: Add test.yml

On 19.08.20 06:42, Nobuhiro Iwamatsu wrote:

Add YAML to add the test application to each images.
The following test applications will be added.
- ltp
- rt-tests
- stress-ng

And this appends '-test' to the generated image filename.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
kas/opt/test.yml | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 kas/opt/test.yml

diff --git a/kas/opt/test.yml b/kas/opt/test.yml
new file mode 100644
index 0000000..75b257d
--- /dev/null
+++ b/kas/opt/test.yml
@@ -0,0 +1,20 @@
+#
+# Copyright (c) Siemens AG, 2019
+# Copyright (c) Toshiba Corporation, 2020
+#
+# Authors:
+# Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+local_conf_header:
+ testing: |
+ IMAGE_INSTALL += "ltp-full"
+ IMAGE_PREINSTALL += "rt-tests stress-ng"
+ DESCRIPTION_append = " with test packages"
+ IMAGE_FULLNAME_append = "-test"
+

Ah, nice solution with the _append.

Can you follow up with a patch for CI that adds the test feature at
least to some of your images? I actually wonder if we shouldn't add it
to all, or even have to in case the CI images are directly used for testing.

Yes, I planned to do it after it was applied.
I will add this to v3 patch series.

No need to resend, the patches are already in next, locally. Just add
that patch on top.

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

Hi,

On 19.08.20 06:42, Nobuhiro Iwamatsu wrote:

Add YAML to add the test application to each images.
The following test applications will be added.
- ltp
- rt-tests
- stress-ng

And this appends '-test' to the generated image filename.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
kas/opt/test.yml | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 kas/opt/test.yml

diff --git a/kas/opt/test.yml b/kas/opt/test.yml
new file mode 100644
index 0000000..75b257d
--- /dev/null
+++ b/kas/opt/test.yml
@@ -0,0 +1,20 @@
+#
+# Copyright (c) Siemens AG, 2019
+# Copyright (c) Toshiba Corporation, 2020
+#
+# Authors:
+# Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+local_conf_header:
+ testing: |
+ IMAGE_INSTALL += "ltp-full"
+ IMAGE_PREINSTALL += "rt-tests stress-ng"
+ DESCRIPTION_append = " with test packages"
+ IMAGE_FULLNAME_append = "-test"
+

Ah, nice solution with the _append.

Can you follow up with a patch for CI that adds the test feature at
least to some of your images? I actually wonder if we shouldn't add it
to all, or even have to in case the CI images are directly used for testing.

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
recipes-core/images/cip-core-image.bb | 2 --
1 file changed, 2 deletions(-)

diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 4dfc983..fd2fd83 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -15,8 +15,6 @@ ISAR_RELEASE_CMD = "git -C ${LAYERDIR_cip-core} describe --tags --dirty --always
DESCRIPTION = "CIP Core image"

IMAGE_INSTALL += "customizations"
-# for cip-testing
-IMAGE_INSTALL += "ltp-full"

# for swupdate
EXTRACT_PARTITIONS = "img4"
--
2.27.0

Add YAML to add the test application to each images.
The following test applications will be added.
- ltp
- rt-tests
- stress-ng

And this appends '-test' to the generated image filename.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
kas/opt/test.yml | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 kas/opt/test.yml

diff --git a/kas/opt/test.yml b/kas/opt/test.yml
new file mode 100644
index 0000000..75b257d
--- /dev/null
+++ b/kas/opt/test.yml
@@ -0,0 +1,20 @@
+#
+# Copyright (c) Siemens AG, 2019
+# Copyright (c) Toshiba Corporation, 2020
+#
+# Authors:
+# Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+local_conf_header:
+ testing: |
+ IMAGE_INSTALL += "ltp-full"
+ IMAGE_PREINSTALL += "rt-tests stress-ng"
+ DESCRIPTION_append = " with test packages"
+ IMAGE_FULLNAME_append = "-test"
+
--
2.27.0

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
recipes-core/customizations/customizations.bb | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/recipes-core/customizations/customizations.bb b/recipes-core/customizations/customizations.bb
index 38881fb..932b11c 100644
--- a/recipes-core/customizations/customizations.bb
+++ b/recipes-core/customizations/customizations.bb
@@ -11,7 +11,7 @@

inherit dpkg-raw

-DESCRIPTION = "CIP Core image demo & test customizations"
+DESCRIPTION = "CIP Core image demo & customizations"

SRC_URI = " \
file://postinst \
@@ -21,8 +21,7 @@ SRC_URI = " \
DEPENDS += "sshd-regen-keys"

DEBIAN_DEPENDS = " \
- ifupdown, isc-dhcp-client, net-tools, iputils-ping, ssh, sshd-regen-keys, \
- rt-tests, stress-ng"
+ ifupdown, isc-dhcp-client, net-tools, iputils-ping, ssh, sshd-regen-keys"

do_install() {
install -v -d ${D}/etc/network/interfaces.d
--
2.27.0

Hi,

From: Jan Kiszka <jan.kiszka@siemens.com>

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
...4.19.72-cip10-rt3.bb => linux-cip-rt_4.19.135-cip31-rt13.bb} | 2 +-
...4.4.190-cip36-rt25.bb => linux-cip-rt_4.4.231-cip47-rt30.bb} | 2 +-
.../{linux-cip_4.19.78-cip12.bb => linux-cip_4.19.138-cip32.bb} | 2 +-
.../{linux-cip_4.4.196-cip38.bb => linux-cip_4.4.230-cip47.bb} | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
rename recipes-kernel/linux/{linux-cip-rt_4.19.72-cip10-rt3.bb => linux-cip-rt_4.19.135-cip31-rt13.bb} (67%)
rename recipes-kernel/linux/{linux-cip-rt_4.4.190-cip36-rt25.bb => linux-cip-rt_4.4.231-cip47-rt30.bb} (67%)
rename recipes-kernel/linux/{linux-cip_4.19.78-cip12.bb => linux-cip_4.19.138-cip32.bb} (67%)
rename recipes-kernel/linux/{linux-cip_4.4.196-cip38.bb => linux-cip_4.4.230-cip47.bb} (67%)

diff --git a/recipes-kernel/linux/linux-cip-rt_4.19.72-cip10-rt3.bb b/recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
similarity index 67%
rename from recipes-kernel/linux/linux-cip-rt_4.19.72-cip10-rt3.bb
rename to recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
index 423c0b5..7414f23 100644
--- a/recipes-kernel/linux/linux-cip-rt_4.19.72-cip10-rt3.bb
+++ b/recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
@@ -11,4 +11,4 @@

require linux-cip-rt-common.inc

-SRC_URI[sha256sum] = "95d562cea75ca78858c22138a6fde5e70faa74778f6119f3e5d14cd1136fcba0"
+SRC_URI[sha256sum] = "3c3e49c4ad0dae3de409d51a5b8f6df163f7cc54350764d7c019741947a383db"
diff --git a/recipes-kernel/linux/linux-cip-rt_4.4.190-cip36-rt25.bb b/recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
similarity index 67%
rename from recipes-kernel/linux/linux-cip-rt_4.4.190-cip36-rt25.bb
rename to recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
index fac0a17..8881071 100644
--- a/recipes-kernel/linux/linux-cip-rt_4.4.190-cip36-rt25.bb
+++ b/recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
@@ -11,4 +11,4 @@

require linux-cip-rt-common.inc

-SRC_URI[sha256sum] = "7fe6c2bd0b61ac3a5b71f9078608afb4eef8a565f70cbb34fa9b35a3fa001177"
+SRC_URI[sha256sum] = "d1ff83665455830129f9a2197000abbe7440d30e29b37504c82324c777f0ebf5"
diff --git a/recipes-kernel/linux/linux-cip_4.19.78-cip12.bb b/recipes-kernel/linux/linux-cip_4.19.138-cip32.bb
similarity index 67%
rename from recipes-kernel/linux/linux-cip_4.19.78-cip12.bb
rename to recipes-kernel/linux/linux-cip_4.19.138-cip32.bb
index 7564492..59afd8e 100644
--- a/recipes-kernel/linux/linux-cip_4.19.78-cip12.bb
+++ b/recipes-kernel/linux/linux-cip_4.19.138-cip32.bb
@@ -11,4 +11,4 @@

require linux-cip-common.inc

-SRC_URI[sha256sum] = "7825e6a879283effc05d1511b8220ab28f7d0191795567644889f9a30a449c44"
+SRC_URI[sha256sum] = "6b4dce2ff494b9a4cab212af855b78048756dc6ea3f136e25552b0e832e93eb6"
diff --git a/recipes-kernel/linux/linux-cip_4.4.196-cip38.bb b/recipes-kernel/linux/linux-cip_4.4.230-cip47.bb
similarity index 67%
rename from recipes-kernel/linux/linux-cip_4.4.196-cip38.bb
rename to recipes-kernel/linux/linux-cip_4.4.230-cip47.bb
index 774f849..2303d49 100644
--- a/recipes-kernel/linux/linux-cip_4.4.196-cip38.bb
+++ b/recipes-kernel/linux/linux-cip_4.4.230-cip47.bb
@@ -11,4 +11,4 @@

require linux-cip-common.inc

-SRC_URI[sha256sum] = "883421193ff17bd0d66099a1bfa7ebd97a23b24f09ea13f0933037132563cd3a"
+SRC_URI[sha256sum] = "8e91374801da67bc240b08cd0d61a1b528c23c870cf73ba33cc8f02198f6c531"
--
2.26.2

On 18.08.20 15:47, nobuhiro1.iwamatsu@toshiba.co.jp wrote:

Hi,

-----Original Message-----
From: Jan Kiszka [mailto:jan.kiszka@siemens.com]
Sent: Tuesday, August 18, 2020 2:30 PM
To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>
Subject: Re: [cip-dev] [isar-cip-core][PATCH 1/3] cip-core-image-test: Add recipe

On 18.08.20 06:57, Nobuhiro Iwamatsu wrote:

Hi Jan,

Could you comment on this patch series?

Ah, yeah, sorry.

I think now it's better to model that as extension of an image, given
that we already have two (regular + security). Or will we implicitly
test the security image via the regular one?

I see.
When extended, the resulting image will have the same filename as the base.
It's difficult to distinguish, so it's implemented as it is now.
If you know how to change the generated image file name by yaml file, please let me know.

Isar does not yet allow to override the image name. You'd basically have
to weaken its setting like this

[isar/meta/classes/image.bbclass]
IMAGE_FULLNAME ?= "${PN}-${DISTRO}-${MACHINE}"

and then you could override IMAGE_FULLNAME as desired.

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

Hi,