Date   

[PATCH 4.4.y-cip 22/30] pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group

Biju Das <biju.das.jz@...>
 

From: Geert Uytterhoeven <geert+renesas@...>

commit 66e9fe1ec73929a9f7326856699d262bab8e9fb0 upstream.

The pin controller drivers for all R-Car Gen2 SoCs have entries for the
EtherAVB TX_ER pins in their EtherAVB MII groups, except on R-Car H2.

Add the missing pin to restore consistency.

Note that technically TX_ER is an optional signal in the MII bus, and
thus could have its own group, but this is currently not supported by
any R-Car Gen2 pin controller driver.

Fixes: 19ef697d1eb7be06 ("sh-pfc: r8a7790: add EtherAVB pin groups")
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Reviewed-by: Simon Horman <horms+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 0602ae4ec039..a790e913e6bb 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -1848,8 +1848,8 @@ static const unsigned int avb_mii_pins[] = {
RCAR_GP_PIN(2, 2),

RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
- RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 10),
- RCAR_GP_PIN(3, 12),
+ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
+ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 12),
};
static const unsigned int avb_mii_mux[] = {
AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
@@ -1859,8 +1859,8 @@ static const unsigned int avb_mii_mux[] = {
AVB_RXD3_MARK,

AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
- AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_CLK_MARK,
- AVB_COL_MARK,
+ AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK,
+ AVB_TX_CLK_MARK, AVB_COL_MARK,
};
static const unsigned int avb_gmii_pins[] = {
RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
--
2.17.1


[PATCH 4.4.y-cip 21/30] pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support

Biju Das <biju.das.jz@...>
 

From: Geert Uytterhoeven <geert+renesas@...>

commit 53ec9ccd1c62b644d81674e013b1800dd88ec92b upstream.

Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Laurent Pinchart <laurent.pinchart@...>
Acked-by: Linus Walleij <linus.walleij@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 1acad99d6466..0602ae4ec039 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3236,6 +3236,21 @@ static const unsigned int scifb2_data_c_pins[] = {
static const unsigned int scifb2_data_c_mux[] = {
SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
};
+/* - SCIF Clock ------------------------------------------------------------- */
+static const unsigned int scif_clk_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(4, 26),
+};
+static const unsigned int scif_clk_mux[] = {
+ SCIF_CLK_MARK,
+};
+static const unsigned int scif_clk_b_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(5, 4),
+};
+static const unsigned int scif_clk_b_mux[] = {
+ SCIF_CLK_B_MARK,
+};
/* - SDHI0 ------------------------------------------------------------------ */
static const unsigned int sdhi0_data1_pins[] = {
/* D0 */
@@ -4139,6 +4154,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scifb2_clk_b),
SH_PFC_PIN_GROUP(scifb2_ctrl_b),
SH_PFC_PIN_GROUP(scifb2_data_c),
+ SH_PFC_PIN_GROUP(scif_clk),
+ SH_PFC_PIN_GROUP(scif_clk_b),
SH_PFC_PIN_GROUP(sdhi0_data1),
SH_PFC_PIN_GROUP(sdhi0_data4),
SH_PFC_PIN_GROUP(sdhi0_ctrl),
@@ -4555,6 +4572,11 @@ static const char * const scifb2_groups[] = {
"scifb2_data_c",
};

+static const char * const scif_clk_groups[] = {
+ "scif_clk",
+ "scif_clk_b",
+};
+
static const char * const sdhi0_groups[] = {
"sdhi0_data1",
"sdhi0_data4",
@@ -4729,6 +4751,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(scifb0),
SH_PFC_FUNCTION(scifb1),
SH_PFC_FUNCTION(scifb2),
+ SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(sdhi0),
SH_PFC_FUNCTION(sdhi1),
SH_PFC_FUNCTION(sdhi2),
--
2.17.1


[PATCH 4.4.y-cip 20/30] pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()

Biju Das <biju.das.jz@...>
 

From: Geert Uytterhoeven <geert+renesas@...>

commit 01af9ecbd7bd7d688c54d73a7fa8f7e10ab29d8c upstream.

Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@...>
Acked-by: Laurent Pinchart <laurent.pinchart@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index d9924b0d53b7..1acad99d6466 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -806,15 +806,15 @@ enum {
static const u16 pinmux_data[] = {
PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */

- PINMUX_DATA(VI1_DATA7_VI1_B7_MARK, FN_VI1_DATA7_VI1_B7),
- PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
- PINMUX_DATA(USB0_OVC_VBUS_MARK, FN_USB0_OVC_VBUS),
- PINMUX_DATA(USB2_PWEN_MARK, FN_USB2_PWEN),
- PINMUX_DATA(USB2_OVC_MARK, FN_USB2_OVC),
- PINMUX_DATA(AVS1_MARK, FN_AVS1),
- PINMUX_DATA(AVS2_MARK, FN_AVS2),
- PINMUX_DATA(DU_DOTCLKIN0_MARK, FN_DU_DOTCLKIN0),
- PINMUX_DATA(DU_DOTCLKIN2_MARK, FN_DU_DOTCLKIN2),
+ PINMUX_SINGLE(VI1_DATA7_VI1_B7),
+ PINMUX_SINGLE(USB0_PWEN),
+ PINMUX_SINGLE(USB0_OVC_VBUS),
+ PINMUX_SINGLE(USB2_PWEN),
+ PINMUX_SINGLE(USB2_OVC),
+ PINMUX_SINGLE(AVS1),
+ PINMUX_SINGLE(AVS2),
+ PINMUX_SINGLE(DU_DOTCLKIN0),
+ PINMUX_SINGLE(DU_DOTCLKIN2),

PINMUX_IPSR_DATA(IP0_2_0, D0),
PINMUX_IPSR_MSEL(IP0_2_0, MSIOF3_SCK_B, SEL_SOF3_1),
--
2.17.1


[PATCH 4.4.y-cip 19/30] dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit baf674bf717f8224f33e453e1df92a96c4d6ce48 upstream.

Document PFC support for the RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Acked-by: Rob Herring <robh@...>
Link: https://lore.kernel.org/r/1588542414-14826-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
.../devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index f2008d0e5fd2..90c9bf8beca2 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -13,6 +13,7 @@ Required Properties:
- "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
- "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
+ - "renesas,pfc-r8a7742": for R8A7742 (RZ/G1H) compatible pin-controller.
- "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
- "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller.
- "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
--
2.17.1


[PATCH 4.4.y-cip 18/30] dt-bindings: mmc: renesas,mmcif: Document r8a7742 DT bindings

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 194f9b21ad64740eb9675703037fe42113cea65c upstream.

Add support for r8a7742 SoC. Renesas RZ/G1H (R8A7742) MMCIF is identical
to the R-Car Gen2 family.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Link: https://lore.kernel.org/r/1588794695-27852-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
[biju: removed interrupt related changes]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/mmc/renesas,mmcif.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
index ccbcd765a6ec..6aeb67f5131d 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
+++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
@@ -9,6 +9,7 @@ Required properties:
- compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a
fallback. Examples with <soctype> are:
- "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
+ - "renesas,mmcif-r8a7742" for the MMCIF found in r8a7742 SoCs
- "renesas,mmcif-r8a7743" for the MMCIF found in r8a7743 SoCs
- "renesas,mmcif-r8a7744" for the MMCIF found in r8a7744 SoCs
- "renesas,mmcif-r8a7745" for the MMCIF found in r8a7745 SoCs
--
2.17.1


[PATCH 4.4.y-cip 17/30] dt-bindings: serial: renesas,hscif: Document r8a7742 bindings

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 65994c09bc66d7241be2f7d6eb3b43f894ba2db0 upstream.

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible HSCIF ports,
so document the SoC specific bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index dff8cb1a2980..05bb154d6243 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -12,6 +12,7 @@ Required properties:
- "renesas,scif-r8a7742" for R8A7742 (RZ/G1H) SCIF compatible UART.
- "renesas,scifa-r8a7742" for R8A7742 (RZ/G1H) SCIFA compatible UART.
- "renesas,scifb-r8a7742" for R8A7742 (RZ/G1H) SCIFB compatible UART.
+ - "renesas,hscif-r8a7742" for R8A7742 (RZ/G1H) HSCIF compatible UART.
- "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
- "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
- "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
--
2.17.1


[PATCH 4.4.y-cip 16/30] dt-bindings: serial: renesas,scifb: Document r8a7742 bindings

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 3cf1601ab00ce55820e6130611f536b326563a7e upstream.

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFB ports,
so document the SoC specific bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index 14768b504d13..dff8cb1a2980 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -11,6 +11,7 @@ Required properties:
- "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
- "renesas,scif-r8a7742" for R8A7742 (RZ/G1H) SCIF compatible UART.
- "renesas,scifa-r8a7742" for R8A7742 (RZ/G1H) SCIFA compatible UART.
+ - "renesas,scifb-r8a7742" for R8A7742 (RZ/G1H) SCIFB compatible UART.
- "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
- "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
- "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
--
2.17.1


[PATCH 4.4.y-cip 15/30] dt-bindings: serial: renesas,scif: Document r8a7742 bindings

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 8908a822663f6958f56174120de383ff955874be upstream.

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIF ports,
so document the SoC specific bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index c57622ef52eb..14768b504d13 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -9,6 +9,7 @@ Required properties:
- "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
- "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
- "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
+ - "renesas,scif-r8a7742" for R8A7742 (RZ/G1H) SCIF compatible UART.
- "renesas,scifa-r8a7742" for R8A7742 (RZ/G1H) SCIFA compatible UART.
- "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
- "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
--
2.17.1


[PATCH 4.4.y-cip 14/30] dt-bindings: serial: renesas,scifa: Document r8a7742 bindings

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 0280a04ed9dbdaaae552b79b7a704625bd8e27cf upstream.

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFA ports,
so document the SoC specific bindings.

Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Rob Herring <robh@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index d2db8565d413..c57622ef52eb 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -9,6 +9,7 @@ Required properties:
- "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
- "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
- "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
+ - "renesas,scifa-r8a7742" for R8A7742 (RZ/G1H) SCIFA compatible UART.
- "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
- "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
- "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
--
2.17.1


[PATCH 4.4.y-cip 13/30] ARM: multi_v7_defconfig: Enable r8a7742 SoC

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 44b6141ebe936808fc59b386e3e259bef6c9bba6 upstream.

Enable recently added r8a7742 (RZ/G1H) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1588197415-13747-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index f969bb231cf6..74a69583b75b 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -80,6 +80,7 @@ CONFIG_ARCH_EMEV2=y
CONFIG_ARCH_R7S72100=y
CONFIG_ARCH_R8A73A4=y
CONFIG_ARCH_R8A7740=y
+CONFIG_ARCH_R8A7742=y
CONFIG_ARCH_R8A7743=y
CONFIG_ARCH_R8A7744=y
CONFIG_ARCH_R8A7745=y
--
2.17.1


[PATCH 4.4.y-cip 12/30] ARM: shmobile: defconfig: Enable r8a7742 SoC

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 1a90c5ba48c43aeaeccebcd3e092888b670a4bab upstream.

Enable recently added r8a7742 (RZ/G1H) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1588197415-13747-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/configs/shmobile_defconfig | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
index 151fad5c0b8d..03040b696689 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -14,6 +14,7 @@ CONFIG_ARCH_EMEV2=y
CONFIG_ARCH_R7S72100=y
CONFIG_ARCH_R8A73A4=y
CONFIG_ARCH_R8A7740=y
+CONFIG_ARCH_R8A7742=y
CONFIG_ARCH_R8A7743=y
CONFIG_ARCH_R8A7744=y
CONFIG_ARCH_R8A7745=y
--
2.17.1


[PATCH 4.4.y-cip 11/30] ARM: debug-ll: Add support for r8a7742

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 96866b1a1d32318b6bbc321a762bf79db1f4686e upstream.

Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses
SCIFA2 for the debug console.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1588197415-13747-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/Kconfig.debug | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f647c067d930..7df076789a3a 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -846,6 +846,13 @@ choice
Say Y here if you want kernel low-level debugging support
via SCIF4 on Renesas RZ/G1E (R8A7745).

+ config DEBUG_RCAR_GEN2_SCIFA2
+ bool "Kernel low-level debugging messages via SCIFA2 on R8A7742"
+ depends on ARCH_R8A7742
+ help
+ Say Y here if you want kernel low-level debugging support
+ via SCIFA2 on Renesas RZ/G1H (R8A7742).
+
config DEBUG_RMOBILE_SCIFA0
bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4"
depends on ARCH_R8A73A4
@@ -1351,6 +1358,7 @@ config DEBUG_LL_INCLUDE
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF1
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF2
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF4
+ default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIFA2
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA1
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
@@ -1448,6 +1456,7 @@ config DEBUG_UART_PHYS
default 0xe4007000 if DEBUG_HIP04_UART
default 0xe6c40000 if DEBUG_RMOBILE_SCIFA0
default 0xe6c50000 if DEBUG_RMOBILE_SCIFA1
+ default 0xe6c60000 if DEBUG_RCAR_GEN2_SCIFA2
default 0xe6c80000 if DEBUG_RMOBILE_SCIFA4
default 0xe6e58000 if DEBUG_RCAR_GEN2_SCIF2
default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0
@@ -1487,6 +1496,7 @@ config DEBUG_UART_PHYS
DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \
DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF1 || \
DEBUG_RCAR_GEN2_SCIF2 || DEBUG_RCAR_GEN2_SCIF4 || \
+ DEBUG_RCAR_GEN2_SCIFA2 || \
DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \
--
2.17.1


[PATCH 4.4.y-cip 10/30] soc: renesas: Add Renesas R8A7742 config option

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit cdc8abe763c99a6c2b854d7096eaf1ea21017a42 upstream.

Add configuration option for the RZ/G1H (R8A77420) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1588197415-13747-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: Moved config option from soc/renesas/Kconfig to here]
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/mach-shmobile/Kconfig | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 79b66a1ce96b..a51df53f0914 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -64,6 +64,11 @@ config ARCH_R8A7740
select ARCH_RMOBILE
select RENESAS_INTC_IRQPIN

+config ARCH_R8A7742
+ bool "RZ/G1H (R8A77420)"
+ select ARCH_RCAR_GEN2
+ select ARM_ERRATA_798181 if SMP
+
config ARCH_R8A7743
bool "RZ/G1M (R8A77430)"
select ARCH_RCAR_GEN2
--
2.17.1


[PATCH 4.4.y-cip 09/30] ARM: shmobile: r8a7742: Basic SoC support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 135e7a156ae2c1a7a1f0c1d44bf2b3daece04bbf upstream.

Add minimal support for the RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1587678050-23468-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: removed compatible string renesas,r8a7742-cpg-mssr, added config option for rz/g1h]
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/mach-shmobile/pm-rcar-gen2.c | 2 ++
arch/arm/mach-shmobile/setup-rcar-gen2.c | 1 +
2 files changed, 3 insertions(+)

diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index dd1c9e08f3ea..c0c52458d9c9 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -97,6 +97,8 @@ void __init rcar_gen2_pm_init(void)
syscier = 0x013111ef;
else if (of_machine_is_compatible("renesas,r8a7791"))
syscier = 0x00111003;
+ else if (of_machine_is_compatible("renesas,r8a7742"))
+ syscier = 0x013111ef;
else if (of_machine_is_compatible("renesas,r8a7743"))
syscier = 0x00101003;
else if (of_machine_is_compatible("renesas,r8a7744"))
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 50c57c8c4f40..bd9985459651 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -207,6 +207,7 @@ DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
MACHINE_END

static const char * const rz_g1_boards_compat_dt[] __initconst = {
+ "renesas,r8a7742",
"renesas,r8a7743",
"renesas,r8a7744",
"renesas,r8a7745",
--
2.17.1


[PATCH 4.4.y-cip 08/30] clk: shmobile: Compile clk-rcar-gen2.c when using the r8a7742

Biju Das <biju.das.jz@...>
 

This patch makes sure clk-rcar-gen2,c gets compiled when
CONFIG_ARCH_R8A7742 is selected, similarly to what done by
commit:
7bac4ad3e40f ("CIP: Build essential clock driver for Renesas
RZ/G1 platforms")

Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/clk/shmobile/Makefile | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
index 6badac598707..2f9fb407aa32 100644
--- a/drivers/clk/shmobile/Makefile
+++ b/drivers/clk/shmobile/Makefile
@@ -2,6 +2,7 @@ obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o
obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7742) += clk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7743) += clk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7744) += clk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7745) += clk-rcar-gen2.o
--
2.17.1


[PATCH 4.4.y-cip 07/30] clk: shmobile: Document r8a7742 CPG DIV6 clock support

Biju Das <biju.das.jz@...>
 

Document r8a7742 CPG DIV6 clock support.

The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new patch.

Signed-off-by: Biju Das <biju.das.jz@...>
---
.../devicetree/bindings/clock/renesas,cpg-div6-clocks.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
index 7b05affc93f1..c60b174e3350 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
@@ -9,6 +9,7 @@ Required Properties:
- compatible: Must be one of the following
- "renesas,r8a73a4-div6-clock" for R8A73A4 (R-Mobile APE6) DIV6 clocks
- "renesas,r8a7740-div6-clock" for R8A7740 (R-Mobile A1) DIV6 clocks
+ - "renesas,r8a7742-div6-clock" for R8A7742 (RZ/G1H) DIV6 clocks
- "renesas,r8a7743-div6-clock" for R8A7743 (RZ/G1M) DIV6 clocks
- "renesas,r8a7744-div6-clock" for R8A7744 (RZ/G1N) DIV6 clocks
- "renesas,r8a7745-div6-clock" for R8A7745 (RZ/G1E) DIV6 clocks
--
2.17.1


[PATCH 4.4.y-cip 06/30] clk: shmobile: Document r8a7742 MSTP clock support

Biju Das <biju.das.jz@...>
 

Document r8a7742 MSTP clock support.

The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new patch.

Signed-off-by: Biju Das <biju.das.jz@...>
---
.../devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
index 1f64680fb108..3787cb252b44 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
@@ -13,6 +13,7 @@ Required Properties:
- "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
- "renesas,r8a73a4-mstp-clocks" for R8A73A4 (R-Mobile APE6) MSTP gate clocks
- "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks
+ - "renesas,r8a7742-mstp-clocks" for R8A7742 (RZ/G1H) MSTP gate clocks
- "renesas,r8a7743-mstp-clocks" for R8A7743 (RZ/G1M) MSTP gate clocks
- "renesas,r8a7744-mstp-clocks" for R8A7744 (RZ/G1N) MSTP gate clocks
- "renesas,r8a7745-mstp-clocks" for R8A7745 (RZ/G1E) MSTP gate clocks
--
2.17.1


[PATCH 4.4.y-cip 05/30] clk: shmobile: Document r8a7742 CPG clock support

Biju Das <biju.das.jz@...>
 

Document r8a7742 CPG clock support.

The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new patch.

Signed-off-by: Biju Das <biju.das.jz@...>
---
.../devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
index 631cd38792af..198d1da3f7a6 100644
--- a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
@@ -8,6 +8,7 @@ CPG Module Stop (MSTP) Clocks.
Required Properties:

- compatible: Must be one of
+ - "renesas,r8a7742-cpg-clocks" for the r8a7742 CPG
- "renesas,r8a7743-cpg-clocks" for the r8a7743 CPG
- "renesas,r8a7744-cpg-clocks" for the r8a7744 CPG
- "renesas,r8a7745-cpg-clocks" for the r8a7745 CPG
--
2.17.1


[PATCH 4.4.y-cip 04/30] ARM: shmobile: r8a7742: Add clock index macros for DT sources

Biju Das <biju.das.jz@...>
 

Add macros usable by device tree sources to reference r8a7742 clocks by
index.

Unfortunately there is nothing that we can backport from mainline
for this, as the architecture of the clock driver has changed
quite dramatically over time.

Signed-off-by: Biju Das <biju.das.jz@...>
---
include/dt-bindings/clock/r8a7742-clock.h | 165 ++++++++++++++++++++++
1 file changed, 165 insertions(+)
create mode 100644 include/dt-bindings/clock/r8a7742-clock.h

diff --git a/include/dt-bindings/clock/r8a7742-clock.h b/include/dt-bindings/clock/r8a7742-clock.h
new file mode 100644
index 000000000000..52a6d6bc4f2a
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7742-clock.h
@@ -0,0 +1,165 @@
+/*
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7742_H__
+#define __DT_BINDINGS_CLOCK_R8A7742_H__
+
+/* CPG */
+#define R8A7742_CLK_MAIN 0
+#define R8A7742_CLK_PLL0 1
+#define R8A7742_CLK_PLL1 2
+#define R8A7742_CLK_PLL3 3
+#define R8A7742_CLK_LB 4
+#define R8A7742_CLK_QSPI 5
+#define R8A7742_CLK_SDH 6
+#define R8A7742_CLK_SD0 7
+#define R8A7742_CLK_SD1 8
+#define R8A7742_CLK_Z 9
+#define R8A7742_CLK_Z2 10
+#define R8A7742_CLK_RCAN 11
+
+/* MSTP0 */
+#define R8A7742_CLK_MSIOF0 0
+
+/* MSTP1 */
+#define R8A7742_CLK_VCP1 0
+#define R8A7742_CLK_VCP0 1
+#define R8A7742_CLK_VPC1 2
+#define R8A7742_CLK_VPC0 3
+#define R8A7742_CLK_TMU1 11
+#define R8A7742_CLK_3DG 12
+#define R8A7742_CLK_2DDMAC 15
+#define R8A7742_CLK_FDP1_2 17
+#define R8A7742_CLK_FDP1_1 18
+#define R8A7742_CLK_FDP1_0 19
+#define R8A7742_CLK_TMU3 21
+#define R8A7742_CLK_TMU2 22
+#define R8A7742_CLK_CMT0 24
+#define R8A7742_CLK_TMU0 25
+#define R8A7742_CLK_VSP1_DU1 27
+#define R8A7742_CLK_VSP1_DU0 28
+#define R8A7742_CLK_VSP1_R 30
+#define R8A7742_CLK_VSP1_S 31
+
+/* MSTP2 */
+#define R8A7742_CLK_SCIFA2 2
+#define R8A7742_CLK_SCIFA1 3
+#define R8A7742_CLK_SCIFA0 4
+#define R8A7742_CLK_MSIOF2 5
+#define R8A7742_CLK_SCIFB0 6
+#define R8A7742_CLK_SCIFB1 7
+#define R8A7742_CLK_MSIOF1 8
+#define R8A7742_CLK_MSIOF3 15
+#define R8A7742_CLK_SCIFB2 16
+#define R8A7742_CLK_SYS_DMAC1 18
+#define R8A7742_CLK_SYS_DMAC0 19
+
+/* MSTP3 */
+#define R8A7742_CLK_IIC2 0
+#define R8A7742_CLK_TPU0 4
+#define R8A7742_CLK_MMCIF1 5
+#define R8A7742_CLK_SCIF2 10
+#define R8A7742_CLK_SDHI3 11
+#define R8A7742_CLK_SDHI2 12
+#define R8A7742_CLK_SDHI1 13
+#define R8A7742_CLK_SDHI0 14
+#define R8A7742_CLK_MMCIF0 15
+#define R8A7742_CLK_IIC0 18
+#define R8A7742_CLK_PCIEC 19
+#define R8A7742_CLK_IIC1 23
+#define R8A7742_CLK_SSUSB 28
+#define R8A7742_CLK_CMT1 29
+#define R8A7742_CLK_USBDMAC0 30
+#define R8A7742_CLK_USBDMAC1 31
+
+/* MSTP4 */
+#define R8A7742_CLK_RWDT 2
+#define R8A7742_CLK_IRQC 7
+#define R8A7742_CLK_INTC_SYS 8
+
+/* MSTP5 */
+#define R8A7742_CLK_AUDIO_DMAC1 1
+#define R8A7742_CLK_AUDIO_DMAC0 2
+#define R8A7742_CLK_THERMAL 22
+#define R8A7742_CLK_PWM 23
+
+/* MSTP7 */
+#define R8A7742_CLK_EHCI 3
+#define R8A7742_CLK_HSUSB 4
+#define R8A7742_CLK_HSCIF1 16
+#define R8A7742_CLK_HSCIF0 17
+#define R8A7742_CLK_SCIF1 20
+#define R8A7742_CLK_SCIF0 21
+#define R8A7742_CLK_DU2 22
+#define R8A7742_CLK_DU1 23
+#define R8A7742_CLK_DU0 24
+#define R8A7742_CLK_LVDS1 25
+#define R8A7742_CLK_LVDS0 26
+
+/* MSTP8 */
+#define R8A7742_CLK_R_GP2D 7
+#define R8A7742_CLK_VIN3 8
+#define R8A7742_CLK_VIN2 9
+#define R8A7742_CLK_VIN1 10
+#define R8A7742_CLK_VIN0 11
+#define R8A7742_CLK_ETHERAVB 12
+#define R8A7742_CLK_ETHER 13
+#define R8A7742_CLK_SATA1 14
+#define R8A7742_CLK_SATA0 15
+#define R8A7742_CLK_IMR_X2_1 20
+#define R8A7742_CLK_IMR_X2_0 21
+#define R8A7742_CLK_IMR_LSX2_1 22
+#define R8A7742_CLK_IMR_LSX2_0 23
+
+/* MSTP9 */
+#define R8A7742_CLK_GPIO5 7
+#define R8A7742_CLK_GPIO4 8
+#define R8A7742_CLK_GPIO3 9
+#define R8A7742_CLK_GPIO2 10
+#define R8A7742_CLK_GPIO1 11
+#define R8A7742_CLK_GPIO0 12
+#define R8A7742_CLK_RCAN1 15
+#define R8A7742_CLK_RCAN0 16
+#define R8A7742_CLK_QSPI_MOD 17
+#define R8A7742_CLK_IICDVFS 26
+#define R8A7742_CLK_I2C3 28
+#define R8A7742_CLK_I2C2 29
+#define R8A7742_CLK_I2C1 30
+#define R8A7742_CLK_I2C0 31
+
+/* MSTP10 */
+#define R8A7742_CLK_SSI_ALL 5
+#define R8A7742_CLK_SSI9 6
+#define R8A7742_CLK_SSI8 7
+#define R8A7742_CLK_SSI7 8
+#define R8A7742_CLK_SSI6 9
+#define R8A7742_CLK_SSI5 10
+#define R8A7742_CLK_SSI4 11
+#define R8A7742_CLK_SSI3 12
+#define R8A7742_CLK_SSI2 13
+#define R8A7742_CLK_SSI1 14
+#define R8A7742_CLK_SSI0 15
+#define R8A7742_CLK_SCU_ALL 17
+#define R8A7742_CLK_SCU_DVC1 18
+#define R8A7742_CLK_SCU_DVC0 19
+#define R8A7742_CLK_SCU_CTU1_MIX1 20
+#define R8A7742_CLK_SCU_CTU0_MIX0 21
+#define R8A7742_CLK_SCU_SRC9 22
+#define R8A7742_CLK_SCU_SRC8 23
+#define R8A7742_CLK_SCU_SRC7 24
+#define R8A7742_CLK_SCU_SRC6 25
+#define R8A7742_CLK_SCU_SRC5 26
+#define R8A7742_CLK_SCU_SRC4 27
+#define R8A7742_CLK_SCU_SRC3 28
+#define R8A7742_CLK_SCU_SRC2 29
+#define R8A7742_CLK_SCU_SRC1 30
+#define R8A7742_CLK_SCU_SRC0 31
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7742_H__ */
--
2.17.1


[PATCH 4.4.y-cip 03/30] soc: renesas: rcar-rst: Add support for RZ/G1H

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 2f71832755a9422f5a62a13ea3e805df7b173837 upstream.

Add support for RZ/G1H (R8A7742) to the R-Car RST driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1587678050-23468-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: Changed the text RZ/G to RZ/G1 ]
Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/soc/renesas/rcar-rst.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 8eaf736b2b86..869fb10d6de5 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -31,7 +31,8 @@ static const struct rst_config rcar_rst_gen2 __initconst = {
};

static const struct of_device_id rcar_rst_matches[] __initconst = {
- /* RZ/G is handled like R-Car Gen2 */
+ /* RZ/G1 is handled like R-Car Gen2 */
+ { .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
--
2.17.1

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