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Re: [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

Nobuhiro Iwamatsu
 

Hi,

Thanks for your work.

-----Original Message-----
From: Biju Das [mailto:biju.das.jz@...]
Sent: Wednesday, September 2, 2020 4:51 PM
To: cip-dev@...; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>
Cc: Chris Paterson <chris.paterson2@...>; Biju Das <biju.das.jz@...>; Prabhakar Mahadev Lad
<prabhakar.mahadev-lad.rj@...>
Subject: [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

This patch series add support MMC/SDHI for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (4):
dt-bindings: mmc: renesas,sdhi: Document r8a7742 support
ARM: dts: r8a7742: Add SDHI nodes
ARM: dts: r8a7742: Add MMC0 node
ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller

Yoshihiro Shimoda (1):
ARM: dts: renesas: Fix SD Card/eMMC interface device node names

.../devicetree/bindings/mmc/tmio_mmc.txt | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 39 ++++++++++
arch/arm/boot/dts/r8a7742.dtsi | 71 +++++++++++++++++++
arch/arm/boot/dts/r8a7743.dtsi | 6 +-
arch/arm/boot/dts/r8a7744.dtsi | 6 +-
arch/arm/boot/dts/r8a7745.dtsi | 6 +-
arch/arm/boot/dts/r8a77470.dtsi | 6 +-
7 files changed, 123 insertions(+), 12 deletions(-)
This patch series looks good to me.
If there are no other comments, I will apply this.

Best regards,
Nobuhiro
Re: [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: cip-dev@... [mailto:cip-dev@...] On Behalf Of Pavel Machek
Sent: Wednesday, September 2, 2020 5:12 AM
To: Biju Das <biju.das.jz@...>
Cc: cip-dev@...; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Chris Paterson <chris.paterson2@...>;
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Subject: Re: [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H

Hi!

This patch series add IRQC/I2C/IIC/AVB/APMU support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.
Series looks good to me. I can apply it if there are no other comments
(and if it passes testing).
This series looks good to me too. The test seems to be fine.
I applied and pushed.


Best regards,
Pavel
Best regards,
Nobuhiro


--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Re: [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H

Pavel Machek
 

Hi!

This patch series add IRQC/I2C/IIC/AVB/APMU support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.
Series looks good to me. I can apply it if there are no other comments
(and if it passes testing).

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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signature.asc

[PATCH 4.4.y-cip 10/10] ARM: dts: r8a7742: Add APMU nodes

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 57e7dad22bdb4bffa158d32a2e9d5b7145ab1e85 upstream.

Add DT nodes for the Advanced Power Management Units (APMU), and use the
enable-method to point out that the APMU should be used for SMP support.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Wolfram Sang <wsa+renesas@...>
Link: https://lore.kernel.org/r/1589555337-5498-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 3f72658ba96d..1db3682a1deb 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -424,6 +424,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ enable-method = "renesas,apmu";

cpu0: cpu@0 {
device_type = "cpu";
@@ -695,6 +696,18 @@
reg = <0 0xe6060000 0 0x250>;
};

+ apmu@e6151000 {
+ compatible = "renesas,r8a7742-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
+ };
+
+ apmu@e6152000 {
+ compatible = "renesas,r8a7742-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+ };
+
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7742-rst";
reg = <0 0xe6160000 0 0x0100>;
--
2.17.1
[PATCH 4.4.y-cip 09/10] dt-bindings: power: renesas,apmu: Document r8a7742 support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit a08790960382c24d92af43a34626ed0f3899d299 upstream.

Document APMU and SMP enable method for RZ/G1H (also known as r8a7742)
SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/power/renesas,apmu.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt b/Documentation/devicetree/bindings/power/renesas,apmu.txt
index 21157fb60f36..8ffb21e20bc4 100644
--- a/Documentation/devicetree/bindings/power/renesas,apmu.txt
+++ b/Documentation/devicetree/bindings/power/renesas,apmu.txt
@@ -7,6 +7,7 @@ Required properties:

- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
Examples with soctypes are:
+ - "renesas,r8a7742-apmu" (RZ/G1H)
- "renesas,r8a7743-apmu" (RZ/G1M)
- "renesas,r8a7744-apmu" (RZ/G1N)
- "renesas,r8a7745-apmu" (RZ/G1E)
--
2.17.1
[PATCH 4.4.y-cip 08/10] ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVB

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 8a8c81aa605cec4a086bd46a9b9214b9671f8f42 upstream.

Enable Ethernet AVB on iWave RZ/G1H carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1590420129-7531-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 1f5c35c66d91..8ce82ad3d946 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -14,6 +14,7 @@

aliases {
serial2 = &scifa2;
+ ethernet0 = &avb;
};

chosen {
@@ -22,7 +23,27 @@
};
};

+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&phy3>;
+ phy-mode = "gmii";
+ renesas,no-ether-link;
+ status = "okay";
+
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ micrel,led-mode = <1>;
+ };
+};
+
&pfc {
+ avb_pins: avb {
+ groups = "avb_mdio", "avb_gmii";
+ function = "avb";
+ };
+
scifa2_pins: scifa2 {
groups = "scifa2_data_c";
function = "scifa2";
--
2.17.1
[PATCH 4.4.y-cip 07/10] ARM: dts: r8a7742: Add Ethernet AVB support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 9451f394e9cfb30e5a9b66f1022ef7f91717548b upstream.

Add Ethernet AVB support for R8A7742 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Wolfram Sang <wsa+renesas@...>
Link: https://lore.kernel.org/r/1589555337-5498-13-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 6693a54367aa..3f72658ba96d 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -916,6 +916,18 @@
dma-channels = <15>;
};

+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7742",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7742_CLK_ETHERAVB>;
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scifa2: serial@e6c60000 {
compatible = "renesas,scifa-r8a7742",
"renesas,rcar-gen2-scifa", "renesas,scifa";
--
2.17.1
[PATCH 4.4.y-cip 06/10] dt-bindings: net: renesas, ravb: Add support for r8a7742 SoC

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 9c95312aad21bf5c6f23a5158d1cd7f42d4560e2 upstream.

Document RZ/G1H (R8A7742) SoC bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
index 0a8e8df01f4b..132d6c72c4d3 100644
--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
+++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
@@ -5,6 +5,7 @@ interface contains.

Required properties:
- compatible: Must contain one or more of the following:
+ - "renesas,etheravb-r8a7742" for the R8A7742 SoC.
- "renesas,etheravb-r8a7743" for the R8A7743 SoC.
- "renesas,etheravb-r8a7744" for the R8A7744 SoC.
- "renesas,etheravb-r8a7745" for the R8A7745 SoC.
--
2.17.1
[PATCH 4.4.y-cip 05/10] ARM: dts: r8a7742: Add I2C and IIC support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 9af42b81cfc7f48d5384fc6a6c382dc716b45563 upstream.

Add the I2C[0-3] and IIC[0-3] device nodes to the R8A7742 device tree.

Automatic transmission for PMIC control is not available on IIC3 hence
compatible strings "renesas,rcar-gen2-iic" and "renesas,rmobile-iic" are
not added to iic3 node.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1589555337-5498-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: changed clocks and power-domains properties, removed resets, i2c-scl-internal-delay-ns properties]
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742.dtsi | 110 +++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index d128fa1d4847..6693a54367aa 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -742,6 +742,116 @@
ranges = <0 0 0xe6300000 0x40000>;
};

+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C0>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C1>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C2>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C3>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic0: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_IIC0>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic1: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_IIC1>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic2: i2c@e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x425>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_IIC2>;
+ dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
+ <&dmac1 0x69>, <&dmac1 0x6a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic3: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_IICDVFS>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7742",
"renesas,rcar-dmac";
--
2.17.1
[PATCH 4.4.y-cip 04/10] dt-bindings: i2c: renesas, iic: Document r8a7742 support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 90f90af71876914f03e4740e263c4738b703fa89 upstream.

Document IIC controller for RZ/G1H (R8A7742) SoC, which is compatible
with R-Car Gen2 SoC family.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Pacthed the changes from renamed file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
index f4727c6ea01e..348d87c5cd06 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible :
- "renesas,iic-r8a73a4" (R-Mobile APE6)
- "renesas,iic-r8a7740" (R-Mobile A1)
+ - "renesas,iic-r8a7742" (RZ/G1H)
- "renesas,iic-r8a7743" (RZ/G1M)
- "renesas,iic-r8a7744" (RZ/G1N)
- "renesas,iic-r8a7745" (RZ/G1E)
--
2.17.1
[PATCH 4.4.y-cip 03/10] dt-bindings: i2c: renesas, i2c: Document r8a7742 support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 315148547563856f48907633cf89da4dd680f72a upstream.

Document i2c controller for RZ/G1H (R8A7742) SoC, which is compatible
with R-Car Gen2 SoC family.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched the changes from renamed file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
index 0d1aa9e4c292..3587816115db 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
@@ -2,6 +2,7 @@ I2C for R-Car platforms

Required properties:
- compatible:
+ "renesas,i2c-r8a7742" if the device is a part of a R8A7742 SoC.
"renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.
"renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC.
"renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.
--
2.17.1
[PATCH 4.4.y-cip 02/10] ARM: dts: r8a7742: Add IRQC support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit a31a8c9cbc0762b096e0b176ba481a60e54db5bf upstream.

Describe the IRQC interrupt controller in the r8a7742 device tree.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Acked-by: Marc Zyngier <maz@...>
Link: https://lore.kernel.org/r/1588794695-27852-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 9e26313e09e1..d128fa1d4847 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -700,6 +700,19 @@
reg = <0 0xe6160000 0 0x0100>;
};

+ irqc: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7742", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7742_CLK_IRQC>;
+ power-domains = <&cpg_clocks>;
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
--
2.17.1
[PATCH 4.4.y-cip 01/10] dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit a658d9bcd262421e7e63f4f3693e7e60b18422f3 upstream.

Document SoC specific bindings for RZ/G1H (r8a7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Rob Herring <robh@...>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@...>
---
.../devicetree/bindings/interrupt-controller/renesas,irqc.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
index eea4c7b6a09e..9ab84cb471f6 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
@@ -5,6 +5,7 @@ Required properties:
- compatible: has to be "renesas,irqc-<soctype>", "renesas,irqc" as fallback.
Examples with soctypes are:
- "renesas,irqc-r8a73a4" (R-Mobile APE6)
+ - "renesas,irqc-r8a7742" (RZ/G1H)
- "renesas,irqc-r8a7743" (RZ/G1M)
- "renesas,irqc-r8a7744" (RZ/G1N)
- "renesas,irqc-r8a7745" (RZ/G1E)
--
2.17.1
[PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H

Biju Das <biju.das.jz@...>
 

This patch series add IRQC/I2C/IIC/AVB/APMU support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (10):
dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings
ARM: dts: r8a7742: Add IRQC support
dt-bindings: i2c: renesas, i2c: Document r8a7742 support
dt-bindings: i2c: renesas, iic: Document r8a7742 support
ARM: dts: r8a7742: Add I2C and IIC support
dt-bindings: net: renesas, ravb: Add support for r8a7742 SoC
ARM: dts: r8a7742: Add Ethernet AVB support
ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVB
dt-bindings: power: renesas,apmu: Document r8a7742 support
ARM: dts: r8a7742: Add APMU nodes

.../devicetree/bindings/i2c/i2c-rcar.txt | 1 +
.../devicetree/bindings/i2c/i2c-sh_mobile.txt | 1 +
.../interrupt-controller/renesas,irqc.txt | 1 +
.../devicetree/bindings/net/renesas,ravb.txt | 1 +
.../bindings/power/renesas,apmu.txt | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 21 +++
arch/arm/boot/dts/r8a7742.dtsi | 148 ++++++++++++++++++
7 files changed, 174 insertions(+)

--
2.17.1
Re: [isar-cip-core][PATCH 3/3] linux-cip Switch to gitlab source and update to 4.19.140-cip33

Jan Kiszka
 

On 01.09.20 01:03, Nobuhiro Iwamatsu wrote:
Hi,

-----Original Message-----
From: cip-dev@... [mailto:cip-dev@...] On Behalf Of Jan Kiszka
Sent: Monday, August 31, 2020 6:21 PM
To: cip-dev@...
Cc: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <nobuhiro1.iwamatsu@...>
Subject: [cip-dev] [isar-cip-core][PATCH 3/3] linux-cip Switch to gitlab source and update to 4.19.140-cip33

From: Jan Kiszka <jan.kiszka@...>

The switch is needed as kernel.org snapshot tend to fail too often.

Signed-off-by: Jan Kiszka <jan.kiszka@...>
---
recipes-kernel/linux/linux-cip-common.inc | 4 +++-
recipes-kernel/linux/linux-cip-rt-common.inc | 2 --
recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb | 2 +-
recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb | 2 +-
...inux-cip_4.19.138-cip32.bb => linux-cip_4.19.140-cip33.bb} | 2 +-
recipes-kernel/linux/linux-cip_4.4.230-cip47.bb | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
rename recipes-kernel/linux/{linux-cip_4.19.138-cip32.bb => linux-cip_4.19.140-cip33.bb} (67%)

diff --git a/recipes-kernel/linux/linux-cip-common.inc b/recipes-kernel/linux/linux-cip-common.inc
index 0c76835..7e09090 100644
--- a/recipes-kernel/linux/linux-cip-common.inc
+++ b/recipes-kernel/linux/linux-cip-common.inc
@@ -20,10 +20,12 @@ def conditional(variable, checkvalue, truevalue, falsevalue, d):
require recipes-kernel/linux/linux-custom.inc

SRC_URI += " \
- https://git.kernel.org/pub/scm/linux/kernel/git/cip/linux-cip.git/snapshot/linux-cip-${PV}.tar.gz \
+ https://gitlab.com/cip-project/cip-kernel/linux-cip/-/archive/v${PV}/linux-cip-v${PV}.tar.gz \
I thought it would be good to use a URL as a variable and overwrite it.
Is it difficult because the hash of the file changes depending on the mirror?
Yes, unfortunately. gitlab packages differently (under a different
directory) than korg. That prevents simply providing one as a fallback
mirror of the other, at least when pulling tarballs rather than full git
trees.

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
[linux-cip-ci][PATCH 3/3] lava_templates: Add test script for generated yaml file

Nobuhiro Iwamatsu
 

This will add a script that will output the final YAML generated.
This is used to verify YAML.

```
$ ./lava_templates/show_generated_yaml.sh de0-nano-soc arm \
deby-buster-ltp ltp-ipc-tests true
```

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>
---
lava_templates/show_generated_yaml.sh | 74 +++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
create mode 100755 lava_templates/show_generated_yaml.sh

diff --git a/lava_templates/show_generated_yaml.sh b/lava_templates/show_generated_yaml.sh
new file mode 100755
index 0000000..e383765
--- /dev/null
+++ b/lava_templates/show_generated_yaml.sh
@@ -0,0 +1,74 @@
+#!/bin/bash
+# Copyright (C) 2020, Renesas Electronics Europe GmbH, Chris Paterson <chris.paterson2@...>
+# Copyright (C) 2020, Toshiba Nobuhiro Iwamtasu <nobuhiro1.iwamatsu@...>
+#
+
+set -e
+
+# $1: OS type
+# $2: Test name
+create_job_definition () {
+ local base_os="$1"
+ local testname="$2"
+
+ local dtb_url="$AWS_URL_DOWN/$DTB"
+ local kernel_url="$AWS_URL_DOWN/$KERNEL"
+ local modules_url="$AWS_URL_DOWN/$MODULES"
+
+ local commit_ref=$(echo "${CI_COMMIT_REF_NAME}" | sed 's/\//-/g')
+
+ if $USE_DTB; then
+ local job_name="${commit_ref}_${VERSION}_${BUILD_ARCH}_${CONFIG}_${DTB_NAME}_${testname}"
+ else
+ local job_name="${commit_ref}_${VERSION}_${BUILD_ARCH}_${CONFIG}_${testname}"
+ fi
+
+ local job_definition="$TMP_DIR/${INDEX}_${job_name}.yaml"
+ INDEX=$((INDEX+1))
+
+ cat ${TEMPLATE_DIR}/header_base.yaml > "${job_definition}"
+ if [ "${DEVICE}" = "qemu" ] ; then
+ local device_name="${DEVICE}_${BUILD_ARCH}"
+ cat ${TEMPLATE_DIR}/context_${device_name}.yaml >> "${job_definition}"
+ else
+ local device_name="${DEVICE}"
+ fi
+
+ cat ${TEMPLATE_DIR}/timeouts_"${testname}".yaml \
+ ${TEMPLATE_DIR}/action_"${base_os}"_"${device_name}".yaml \
+ ${TEMPLATE_DIR}/boot_"${base_os}"_"${device_name}".yaml \
+ ${TEMPLATE_DIR}/test_"${testname}".yaml \
+ >> "${job_definition}"
+
+ sed -i "s|DEVICE_NAME|${DEVICE}|g" "$job_definition"
+ sed -i "s|JOB_NAME|$job_name|g" "$job_definition"
+ if $USE_MODULES; then
+ sed -i "/DTB_URL/ a \ modules:\n url: $modules_url\n compression: gz" "$job_definition"
+ fi
+ if $USE_DTB; then
+ sed -i "s|DTB_URL|$dtb_url|g" "$job_definition"
+ fi
+ sed -i "s|KERNEL_URL|$kernel_url|g" "$job_definition"
+
+ echo ${job_definition}
+ cat ${job_definition}
+}
+
+SCRIPT_DIR=$(cd $(dirname $0);pwd)
+
+TEMPLATE_DIR="${SCRIPT_DIR}"
+TMP_DIR="/tmp/"
+AWS_URL_DOWN="exmample.org"
+KERNEL="zImage"
+DTB="foo.dtb"
+MODULES="bar.tar.gz"
+VERSION="4.19.1-1"
+CI_COMMIT_REF_NAME="a/b/c/d"
+CONFIG="testconfig"
+DTB_NAME="test-dtb"
+INDEX="1"
+DEVICE=$1
+BUILD_ARCH=$2
+USE_DTB=$5
+
+create_job_definition $3 $4
--
2.27.0
[linux-cip-ci][PATCH 2/3] lava_templates: Add support zynqmp-zcu102

Nobuhiro Iwamatsu
 

Add ltp and boot/smc test YAML files for zynqmp-zcu102 with deby.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>
---
.../action_deby-buster-ltp_zynqmp-zcu102.yaml | 16 ++++++++++++++++
.../action_deby-buster_zynqmp-zcu102.yaml | 16 ++++++++++++++++
.../boot_deby-buster-ltp_zynqmp-zcu102.yaml | 1 +
.../boot_deby-buster_zynqmp-zcu102.yaml | 12 ++++++++++++
4 files changed, 45 insertions(+)
create mode 100644 lava_templates/action_deby-buster-ltp_zynqmp-zcu102.yaml
create mode 100644 lava_templates/action_deby-buster_zynqmp-zcu102.yaml
create mode 120000 lava_templates/boot_deby-buster-ltp_zynqmp-zcu102.yaml
create mode 100644 lava_templates/boot_deby-buster_zynqmp-zcu102.yaml

diff --git a/lava_templates/action_deby-buster-ltp_zynqmp-zcu102.yaml b/lava_templates/action_deby-buster-ltp_zynqmp-zcu102.yaml
new file mode 100644
index 0000000..bca9892
--- /dev/null
+++ b/lava_templates/action_deby-buster-ltp_zynqmp-zcu102.yaml
@@ -0,0 +1,16 @@
+# ACTION_BLOCK
+actions:
+- deploy:
+ timeout:
+ minutes: 10
+ to: tftp
+ os: oe
+ kernel:
+ url: KERNEL_URL
+ type: image
+ nfsrootfs:
+ url: https://s3-us-west-2.amazonaws.com/download.cip-project.org/ciptesting/cip-lava/rfs/core-image-minimal-ltp-zcu102-zynqmp.tar.bz2
+ compression: bz2
+ dtb:
+ url: DTB_URL
+
diff --git a/lava_templates/action_deby-buster_zynqmp-zcu102.yaml b/lava_templates/action_deby-buster_zynqmp-zcu102.yaml
new file mode 100644
index 0000000..3d2cce0
--- /dev/null
+++ b/lava_templates/action_deby-buster_zynqmp-zcu102.yaml
@@ -0,0 +1,16 @@
+# ACTION_BLOCK
+actions:
+- deploy:
+ timeout:
+ minutes: 10
+ to: tftp
+ os: oe
+ kernel:
+ url: KERNEL_URL
+ type: image
+ nfsrootfs:
+ url: https://s3-us-west-2.amazonaws.com/download.cip-project.org/ciptesting/cip-lava/rfs/core-image-minimal-zcu102-zynqmp.tar.bz2
+ compression: bz2
+ dtb:
+ url: DTB_URL
+
diff --git a/lava_templates/boot_deby-buster-ltp_zynqmp-zcu102.yaml b/lava_templates/boot_deby-buster-ltp_zynqmp-zcu102.yaml
new file mode 120000
index 0000000..67c02c5
--- /dev/null
+++ b/lava_templates/boot_deby-buster-ltp_zynqmp-zcu102.yaml
@@ -0,0 +1 @@
+boot_deby-buster_zynqmp-zcu102.yaml
\ No newline at end of file
diff --git a/lava_templates/boot_deby-buster_zynqmp-zcu102.yaml b/lava_templates/boot_deby-buster_zynqmp-zcu102.yaml
new file mode 100644
index 0000000..db223b4
--- /dev/null
+++ b/lava_templates/boot_deby-buster_zynqmp-zcu102.yaml
@@ -0,0 +1,12 @@
+# BOOT_BLOCK
+- boot:
+ auto_login:
+ login_prompt: 'zcu102-zynqmp login:'
+ username: root
+ prompts:
+ - '# '
+ method: u-boot
+ commands: nfs
+ timeout:
+ minutes: 5
+
--
2.27.0
[linux-cip-ci][PATCH 1/3] lava_templates: Add support de0-nano-soc for deby

Nobuhiro Iwamatsu
 

Add ltp and boot/smc test YAML files for de0-nano-soc with deby.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>
---
.../action_deby-buster-ltp_de0-nano-soc.yaml | 15 +++++++++++++++
.../action_deby-buster_de0-nano-soc.yaml | 15 +++++++++++++++
.../boot_deby-buster-ltp_de0-nano-soc.yaml | 1 +
lava_templates/boot_deby-buster_de0-nano-soc.yaml | 12 ++++++++++++
4 files changed, 43 insertions(+)
create mode 100644 lava_templates/action_deby-buster-ltp_de0-nano-soc.yaml
create mode 100644 lava_templates/action_deby-buster_de0-nano-soc.yaml
create mode 120000 lava_templates/boot_deby-buster-ltp_de0-nano-soc.yaml
create mode 100644 lava_templates/boot_deby-buster_de0-nano-soc.yaml

diff --git a/lava_templates/action_deby-buster-ltp_de0-nano-soc.yaml b/lava_templates/action_deby-buster-ltp_de0-nano-soc.yaml
new file mode 100644
index 0000000..215750a
--- /dev/null
+++ b/lava_templates/action_deby-buster-ltp_de0-nano-soc.yaml
@@ -0,0 +1,15 @@
+# ACTION_BLOCK
+actions:
+- deploy:
+ timeout:
+ minutes: 10
+ to: tftp
+ os: oe
+ kernel:
+ url: KERNEL_URL
+ type: zimage
+ nfsrootfs:
+ url: https://s3-us-west-2.amazonaws.com/download.cip-project.org/ciptesting/cip-lava/rfs/core-image-minimal-ltp-de0-nano-soc.tar.bz2
+ compression: bz2
+ dtb:
+ url: DTB_URL
diff --git a/lava_templates/action_deby-buster_de0-nano-soc.yaml b/lava_templates/action_deby-buster_de0-nano-soc.yaml
new file mode 100644
index 0000000..215750a
--- /dev/null
+++ b/lava_templates/action_deby-buster_de0-nano-soc.yaml
@@ -0,0 +1,15 @@
+# ACTION_BLOCK
+actions:
+- deploy:
+ timeout:
+ minutes: 10
+ to: tftp
+ os: oe
+ kernel:
+ url: KERNEL_URL
+ type: zimage
+ nfsrootfs:
+ url: https://s3-us-west-2.amazonaws.com/download.cip-project.org/ciptesting/cip-lava/rfs/core-image-minimal-ltp-de0-nano-soc.tar.bz2
+ compression: bz2
+ dtb:
+ url: DTB_URL
diff --git a/lava_templates/boot_deby-buster-ltp_de0-nano-soc.yaml b/lava_templates/boot_deby-buster-ltp_de0-nano-soc.yaml
new file mode 120000
index 0000000..42fb694
--- /dev/null
+++ b/lava_templates/boot_deby-buster-ltp_de0-nano-soc.yaml
@@ -0,0 +1 @@
+boot_deby-buster_de0-nano-soc.yaml
\ No newline at end of file
diff --git a/lava_templates/boot_deby-buster_de0-nano-soc.yaml b/lava_templates/boot_deby-buster_de0-nano-soc.yaml
new file mode 100644
index 0000000..85debd4
--- /dev/null
+++ b/lava_templates/boot_deby-buster_de0-nano-soc.yaml
@@ -0,0 +1,12 @@
+# BOOT_BLOCK
+- boot:
+ auto_login:
+ login_prompt: "de0-nano-soc login:"
+ username: root
+ prompts:
+ - "# "
+ method: u-boot
+ commands: nfs
+ timeout:
+ minutes: 5
+
--
2.27.0
Re: [isar-cip-core][PATCH 3/3] linux-cip Switch to gitlab source and update to 4.19.140-cip33

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: cip-dev@... [mailto:cip-dev@...] On Behalf Of Jan Kiszka
Sent: Monday, August 31, 2020 6:21 PM
To: cip-dev@...
Cc: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <nobuhiro1.iwamatsu@...>
Subject: [cip-dev] [isar-cip-core][PATCH 3/3] linux-cip Switch to gitlab source and update to 4.19.140-cip33

From: Jan Kiszka <jan.kiszka@...>

The switch is needed as kernel.org snapshot tend to fail too often.

Signed-off-by: Jan Kiszka <jan.kiszka@...>
---
recipes-kernel/linux/linux-cip-common.inc | 4 +++-
recipes-kernel/linux/linux-cip-rt-common.inc | 2 --
recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb | 2 +-
recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb | 2 +-
...inux-cip_4.19.138-cip32.bb => linux-cip_4.19.140-cip33.bb} | 2 +-
recipes-kernel/linux/linux-cip_4.4.230-cip47.bb | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
rename recipes-kernel/linux/{linux-cip_4.19.138-cip32.bb => linux-cip_4.19.140-cip33.bb} (67%)

diff --git a/recipes-kernel/linux/linux-cip-common.inc b/recipes-kernel/linux/linux-cip-common.inc
index 0c76835..7e09090 100644
--- a/recipes-kernel/linux/linux-cip-common.inc
+++ b/recipes-kernel/linux/linux-cip-common.inc
@@ -20,10 +20,12 @@ def conditional(variable, checkvalue, truevalue, falsevalue, d):
require recipes-kernel/linux/linux-custom.inc

SRC_URI += " \
- https://git.kernel.org/pub/scm/linux/kernel/git/cip/linux-cip.git/snapshot/linux-cip-${PV}.tar.gz \
+ https://gitlab.com/cip-project/cip-kernel/linux-cip/-/archive/v${PV}/linux-cip-v${PV}.tar.gz \
I thought it would be good to use a URL as a variable and overwrite it.
Is it difficult because the hash of the file changes depending on the mirror?

"

SRC_URI_append = " ${@conditional("USE_CIP_KERNEL_CONFIG", "1", \

"git://gitlab.com/cip-project/cip-kernel/cip-kernel-config.git;protocol=https;destsuffix=cip-kernel-config;name=c
ip-kernel-config", \
"file://${KERNEL_DEFCONFIG}",d)}"
SRCREV_cip-kernel-config ?= "ca24d965adf77730caf1cd32bdfcffd69e369502"
+
+S = "${WORKDIR}/linux-cip-v${PV}"
diff --git a/recipes-kernel/linux/linux-cip-rt-common.inc b/recipes-kernel/linux/linux-cip-rt-common.inc
index d182358..dffb77b 100644
--- a/recipes-kernel/linux/linux-cip-rt-common.inc
+++ b/recipes-kernel/linux/linux-cip-rt-common.inc
@@ -13,8 +13,6 @@ require linux-cip-common.inc

SRC_URI += "file://preempt-rt.cfg"

-S = "${WORKDIR}/linux-cip-${PV}"
-
do_prepare_build_prepend() {
cat ${WORKDIR}/preempt-rt.cfg >> ${WORKDIR}/${KERNEL_DEFCONFIG}
}
diff --git a/recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
b/recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
index 7414f23..820c1ab 100644
--- a/recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
+++ b/recipes-kernel/linux/linux-cip-rt_4.19.135-cip31-rt13.bb
@@ -11,4 +11,4 @@

require linux-cip-rt-common.inc

-SRC_URI[sha256sum] = "3c3e49c4ad0dae3de409d51a5b8f6df163f7cc54350764d7c019741947a383db"
+SRC_URI[sha256sum] = "b827f45b8f97b71b3917c84b43fd6593030d01ea7261d3be6c15a76250308743"
diff --git a/recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
b/recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
index 8881071..e13fc14 100644
--- a/recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
+++ b/recipes-kernel/linux/linux-cip-rt_4.4.231-cip47-rt30.bb
@@ -11,4 +11,4 @@

require linux-cip-rt-common.inc

-SRC_URI[sha256sum] = "d1ff83665455830129f9a2197000abbe7440d30e29b37504c82324c777f0ebf5"
+SRC_URI[sha256sum] = "e7a0c7b8e4d91f52cbc2ee17a546d1afbc5fcfed95ba44dd113e534fab3a157e"
diff --git a/recipes-kernel/linux/linux-cip_4.19.138-cip32.bb b/recipes-kernel/linux/linux-cip_4.19.140-cip33.bb
similarity index 67%
rename from recipes-kernel/linux/linux-cip_4.19.138-cip32.bb
rename to recipes-kernel/linux/linux-cip_4.19.140-cip33.bb
index 59afd8e..9e958c0 100644
--- a/recipes-kernel/linux/linux-cip_4.19.138-cip32.bb
+++ b/recipes-kernel/linux/linux-cip_4.19.140-cip33.bb
@@ -11,4 +11,4 @@

require linux-cip-common.inc

-SRC_URI[sha256sum] = "6b4dce2ff494b9a4cab212af855b78048756dc6ea3f136e25552b0e832e93eb6"
+SRC_URI[sha256sum] = "f6a9aec6848a5897c90bafda5a9eba010c03d5d0cf99508adfb1cf7a2f4af9e5"
diff --git a/recipes-kernel/linux/linux-cip_4.4.230-cip47.bb b/recipes-kernel/linux/linux-cip_4.4.230-cip47.bb
index 2303d49..af49441 100644
--- a/recipes-kernel/linux/linux-cip_4.4.230-cip47.bb
+++ b/recipes-kernel/linux/linux-cip_4.4.230-cip47.bb
@@ -11,4 +11,4 @@

require linux-cip-common.inc

-SRC_URI[sha256sum] = "8e91374801da67bc240b08cd0d61a1b528c23c870cf73ba33cc8f02198f6c531"
+SRC_URI[sha256sum] = "3ff33e497064ba8e7d9b5e1ee575c6a936154fa8216774782cbc0db2e4b71cdf"
--
2.26.2
Best regards,
Nobuhiro
Re: [isar-cip-core][PATCH 2/3] ci: Do not try to deploy the security image

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Jan Kiszka [mailto:jan.kiszka@...]
Sent: Monday, August 31, 2020 6:21 PM
To: cip-dev@...
Cc: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <nobuhiro1.iwamatsu@...>
Subject: [isar-cip-core][PATCH 2/3] ci: Do not try to deploy the security image

From: Jan Kiszka <jan.kiszka@...>

This is not used, and the image is not available, so it breaks the
build.

Fixes: 3510f8a66f80 ("ci: Rewrite using extends")
Signed-off-by: Jan Kiszka <jan.kiszka@...>
I checked this patch. The problem has been fixed.

Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>

Best regards,
Nobuhiro

---
.gitlab-ci.yml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index cd25437..0b0a771 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -7,6 +7,7 @@ variables:
use_rt: enable
targz: enable
dtb: none
+ deploy: enable

stages:
- build
@@ -30,7 +31,7 @@ default:
- if [ "${extention}" != "base" ]; then base_yaml="${base_yaml}:kas/opt/${extention}.yml"; fi;
- if [ "${targz}" = "enable" ]; then base_yaml="${base_yaml}:kas/opt/targz-img.yml"; fi;
- kas build ${base_yaml}
- - scripts/deploy-cip-core.sh ${release} ${target} ${extention} ${dtb}
+ - if [ "${deploy}" = "enable" ]; then scripts/deploy-cip-core.sh ${release} ${target} ${extention} ${dtb}; fi

# base image
build:simatic-ipc227e-base:
@@ -68,6 +69,7 @@ build:qemu-amd64-base:
extention: security
use_rt: disable
targz: disable
+ deploy: disable

# test
build:simatic-ipc227e-test:
--
2.26.2
3841 - 3860 of 9202