Date   

[PATCH 5.10.y-cip 09/16] clk: renesas: r8a774c0: Add RPC clocks

Lad Prabhakar
 

commit 40745482eec81bea686cd1b38693191dc7e9ac66 upstream.

Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the RZ/G2E (R8A774C0) CPG/MSSR
driver.

Add new clk type CLK_TYPE_GEN3_E3_RPCSRC to register rpcsrc as a fixed
clock on R-Car Gen3 E3 (and also RZ/G2E which is identical to E3 SoC),
parent and the divider is set based on the register value CPG_RPCCKCR[4:3]
which has been set prior to booting the kernel.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201116101002.5986-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/clk/renesas/r8a774c0-cpg-mssr.c | 9 ++++++++
drivers/clk/renesas/rcar-gen3-cpg.c | 28 +++++++++++++++++++++++++
drivers/clk/renesas/rcar-gen3-cpg.h | 5 +++++
3 files changed, 42 insertions(+)

diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index 9fc9fa9e531a..ed3a2cf0e0bb 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -44,6 +44,7 @@ enum clk_ids {
CLK_S2,
CLK_S3,
CLK_SDSRC,
+ CLK_RPCSRC,
CLK_RINT,
CLK_OCO,

@@ -74,6 +75,13 @@ static const struct cpg_core_clk r8a774c0_core_clks[] __initconst = {
DEF_FIXED(".s3", CLK_S3, CLK_PLL1, 6, 1),
DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1, 2, 1),

+ DEF_FIXED_RPCSRC_E3(".rpcsrc", CLK_RPCSRC, CLK_PLL0, CLK_PLL1),
+
+ DEF_BASE("rpc", R8A774C0_CLK_RPC, CLK_TYPE_GEN3_RPC,
+ CLK_RPCSRC),
+ DEF_BASE("rpcd2", R8A774C0_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+ R8A774C0_CLK_RPC),
+
DEF_DIV6_RO(".r", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),

DEF_RATE(".oco", CLK_OCO, 8 * 1000 * 1000),
@@ -199,6 +207,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = {
DEF_MOD("can-fd", 914, R8A774C0_CLK_S3D2),
DEF_MOD("can-if1", 915, R8A774C0_CLK_S3D4),
DEF_MOD("can-if0", 916, R8A774C0_CLK_S3D4),
+ DEF_MOD("rpc-if", 917, R8A774C0_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A774C0_CLK_S3D2),
DEF_MOD("i2c5", 919, R8A774C0_CLK_S3D2),
DEF_MOD("i2c-dvfs", 926, R8A774C0_CLK_CP),
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
index 488f8b3980c5..20de135e28ed 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.c
+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
@@ -696,6 +696,34 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
cpg_rpcsrc_div_table,
&cpg_lock);

+ case CLK_TYPE_GEN3_E3_RPCSRC:
+ /*
+ * Register RPCSRC as fixed factor clock based on the
+ * MD[4:1] pins and CPG_RPCCKCR[4:3] register value for
+ * which has been set prior to booting the kernel.
+ */
+ value = (readl(base + CPG_RPCCKCR) & GENMASK(4, 3)) >> 3;
+
+ switch (value) {
+ case 0:
+ div = 5;
+ break;
+ case 1:
+ div = 3;
+ break;
+ case 2:
+ parent = clks[core->parent >> 16];
+ if (IS_ERR(parent))
+ return ERR_CAST(parent);
+ div = core->div;
+ break;
+ case 3:
+ default:
+ div = 2;
+ break;
+ }
+ break;
+
case CLK_TYPE_GEN3_RPC:
return cpg_rpc_clk_register(core->name, base,
__clk_get_name(parent), notifiers);
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h
index c4ac80cac6a0..3d949c4a3244 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.h
+++ b/drivers/clk/renesas/rcar-gen3-cpg.h
@@ -24,6 +24,7 @@ enum rcar_gen3_clk_types {
CLK_TYPE_GEN3_OSC, /* OSC EXTAL predivider and fixed divider */
CLK_TYPE_GEN3_RCKSEL, /* Select parent/divider using RCKCR.CKSEL */
CLK_TYPE_GEN3_RPCSRC,
+ CLK_TYPE_GEN3_E3_RPCSRC,
CLK_TYPE_GEN3_RPC,
CLK_TYPE_GEN3_RPCD2,

@@ -54,6 +55,10 @@ enum rcar_gen3_clk_types {
#define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \
DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)

+#define DEF_FIXED_RPCSRC_E3(_name, _id, _parent0, _parent1) \
+ DEF_BASE(_name, _id, CLK_TYPE_GEN3_E3_RPCSRC, \
+ (_parent0) << 16 | (_parent1), .div = 8)
+
struct rcar_gen3_cpg_pll_config {
u8 extal_div;
u8 pll1_mult;
--
2.17.1


[PATCH 5.10.y-cip 08/16] pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups and functions

Lad Prabhakar
 

commit 89ad953e1e727640e85beb82db3c71d45a59b177 upstream.

Add pins, groups and functions for QSPIO[01].

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201119130926.25692-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a77990.c | 75 +++++++++++++++++++++++++-
1 file changed, 73 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index 6f9f7638703d..2304295f4da7 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -2810,6 +2810,57 @@ static const unsigned int pwm6_b_mux[] = {
PWM6_B_MARK,
};

+/* - QSPI0 ------------------------------------------------------------------ */
+static const unsigned int qspi0_ctrl_pins[] = {
+ /* QSPI0_SPCLK, QSPI0_SSL */
+ RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 5),
+};
+static const unsigned int qspi0_ctrl_mux[] = {
+ QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
+};
+static const unsigned int qspi0_data2_pins[] = {
+ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+ RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
+};
+static const unsigned int qspi0_data2_mux[] = {
+ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+};
+static const unsigned int qspi0_data4_pins[] = {
+ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+ RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
+ /* QSPI0_IO2, QSPI0_IO3 */
+ RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
+};
+static const unsigned int qspi0_data4_mux[] = {
+ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+ QSPI0_IO2_MARK, QSPI0_IO3_MARK,
+};
+/* - QSPI1 ------------------------------------------------------------------ */
+static const unsigned int qspi1_ctrl_pins[] = {
+ /* QSPI1_SPCLK, QSPI1_SSL */
+ RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 11),
+};
+static const unsigned int qspi1_ctrl_mux[] = {
+ QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
+};
+static const unsigned int qspi1_data2_pins[] = {
+ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
+};
+static const unsigned int qspi1_data2_mux[] = {
+ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+};
+static const unsigned int qspi1_data4_pins[] = {
+ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
+ /* QSPI1_IO2, QSPI1_IO3 */
+ RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10),
+};
+static const unsigned int qspi1_data4_mux[] = {
+ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+ QSPI1_IO2_MARK, QSPI1_IO3_MARK,
+};
+
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_a_pins[] = {
/* RX, TX */
@@ -3762,7 +3813,7 @@ static const unsigned int vin5_clk_b_mux[] = {
};

static const struct {
- struct sh_pfc_pin_group common[247];
+ struct sh_pfc_pin_group common[253];
#ifdef CONFIG_PINCTRL_PFC_R8A77990
struct sh_pfc_pin_group automotive[21];
#endif
@@ -3910,6 +3961,12 @@ static const struct {
SH_PFC_PIN_GROUP(pwm5_b),
SH_PFC_PIN_GROUP(pwm6_a),
SH_PFC_PIN_GROUP(pwm6_b),
+ SH_PFC_PIN_GROUP(qspi0_ctrl),
+ SH_PFC_PIN_GROUP(qspi0_data2),
+ SH_PFC_PIN_GROUP(qspi0_data4),
+ SH_PFC_PIN_GROUP(qspi1_ctrl),
+ SH_PFC_PIN_GROUP(qspi1_data2),
+ SH_PFC_PIN_GROUP(qspi1_data4),
SH_PFC_PIN_GROUP(scif0_data_a),
SH_PFC_PIN_GROUP(scif0_clk_a),
SH_PFC_PIN_GROUP(scif0_ctrl_a),
@@ -4313,6 +4370,18 @@ static const char * const pwm6_groups[] = {
"pwm6_b",
};

+static const char * const qspi0_groups[] = {
+ "qspi0_ctrl",
+ "qspi0_data2",
+ "qspi0_data4",
+};
+
+static const char * const qspi1_groups[] = {
+ "qspi1_ctrl",
+ "qspi1_data2",
+ "qspi1_data4",
+};
+
static const char * const scif0_groups[] = {
"scif0_data_a",
"scif0_clk_a",
@@ -4467,7 +4536,7 @@ static const char * const vin5_groups[] = {
};

static const struct {
- struct sh_pfc_function common[47];
+ struct sh_pfc_function common[49];
#ifdef CONFIG_PINCTRL_PFC_R8A77990
struct sh_pfc_function automotive[4];
#endif
@@ -4504,6 +4573,8 @@ static const struct {
SH_PFC_FUNCTION(pwm4),
SH_PFC_FUNCTION(pwm5),
SH_PFC_FUNCTION(pwm6),
+ SH_PFC_FUNCTION(qspi0),
+ SH_PFC_FUNCTION(qspi1),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif2),
--
2.17.1


[PATCH 5.10.y-cip 05/16] pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1

Lad Prabhakar
 

From: Biju Das <biju.das.jz@bp.renesas.com>

commit b8029394efccf48687d9a7fae6c4747b81e35261 upstream.

This driver supports both RZ/G2H and R-Car H3 ES2 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 ES2
(R8A77951) is not enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201019124258.4574-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a77951.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c
index a94ebe0bf5d0..8d1262c170af 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77951.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
@@ -1827,6 +1827,7 @@ static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK,
};

+#ifdef CONFIG_PINCTRL_PFC_R8A77951
/* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */
@@ -2041,6 +2042,7 @@ static const unsigned int drif3_data1_b_pins[] = {
static const unsigned int drif3_data1_b_mux[] = {
RIF3_D1_B_MARK,
};
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */

/* - DU --------------------------------------------------------------------- */
static const unsigned int du_rgb666_pins[] = {
@@ -4159,7 +4161,9 @@ static const unsigned int vin5_clk_mux[] = {

static const struct {
struct sh_pfc_pin_group common[320];
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_pin_group automotive[30];
+#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4483,6 +4487,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(vin5_clk),
},
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
.automotive = {
SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a),
@@ -4515,7 +4520,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
}
-
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
};

static const char * const audio_clk_groups[] = {
@@ -4574,6 +4579,7 @@ static const char * const canfd1_groups[] = {
"canfd1_data",
};

+#ifdef CONFIG_PINCTRL_PFC_R8A77951
static const char * const drif0_groups[] = {
"drif0_ctrl_a",
"drif0_data0_a",
@@ -4615,6 +4621,7 @@ static const char * const drif3_groups[] = {
"drif3_data0_b",
"drif3_data1_b",
};
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */

static const char * const du_groups[] = {
"du_rgb666",
@@ -5041,7 +5048,9 @@ static const char * const vin5_groups[] = {

static const struct {
struct sh_pfc_function common[53];
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_function automotive[4];
+#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(audio_clk),
@@ -5098,13 +5107,14 @@ static const struct {
SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(vin5),
},
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
.automotive = {
SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
}
-
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
};

static const struct pinmux_cfg_reg pinmux_config_regs[] = {
--
2.17.1


[PATCH 5.10.y-cip 04/16] pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions

Lad Prabhakar
 

commit 4356497e9eda8ec7dcd095b1ecd947ffe12917aa upstream.

Add pins, groups and functions for QSPIO[01].

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201119130926.25692-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a7796.c | 75 ++++++++++++++++++++++++++-
1 file changed, 73 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index 88e9c46003d9..6edac0b9ce73 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -3257,6 +3257,57 @@ static const unsigned int pwm6_b_mux[] = {
PWM6_B_MARK,
};

+/* - QSPI0 ------------------------------------------------------------------ */
+static const unsigned int qspi0_ctrl_pins[] = {
+ /* QSPI0_SPCLK, QSPI0_SSL */
+ PIN_QSPI0_SPCLK, PIN_QSPI0_SSL,
+};
+static const unsigned int qspi0_ctrl_mux[] = {
+ QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
+};
+static const unsigned int qspi0_data2_pins[] = {
+ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+ PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
+};
+static const unsigned int qspi0_data2_mux[] = {
+ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+};
+static const unsigned int qspi0_data4_pins[] = {
+ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+ PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
+ /* QSPI0_IO2, QSPI0_IO3 */
+ PIN_QSPI0_IO2, PIN_QSPI0_IO3,
+};
+static const unsigned int qspi0_data4_mux[] = {
+ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+ QSPI0_IO2_MARK, QSPI0_IO3_MARK,
+};
+/* - QSPI1 ------------------------------------------------------------------ */
+static const unsigned int qspi1_ctrl_pins[] = {
+ /* QSPI1_SPCLK, QSPI1_SSL */
+ PIN_QSPI1_SPCLK, PIN_QSPI1_SSL,
+};
+static const unsigned int qspi1_ctrl_mux[] = {
+ QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
+};
+static const unsigned int qspi1_data2_pins[] = {
+ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+ PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
+};
+static const unsigned int qspi1_data2_mux[] = {
+ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+};
+static const unsigned int qspi1_data4_pins[] = {
+ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+ PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
+ /* QSPI1_IO2, QSPI1_IO3 */
+ PIN_QSPI1_IO2, PIN_QSPI1_IO3,
+};
+static const unsigned int qspi1_data4_mux[] = {
+ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+ QSPI1_IO2_MARK, QSPI1_IO3_MARK,
+};
+
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX, TX */
@@ -4134,7 +4185,7 @@ static const unsigned int vin5_clk_mux[] = {
};

static const struct {
- struct sh_pfc_pin_group common[316];
+ struct sh_pfc_pin_group common[322];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_pin_group automotive[30];
#endif
@@ -4339,6 +4390,12 @@ static const struct {
SH_PFC_PIN_GROUP(pwm5_b),
SH_PFC_PIN_GROUP(pwm6_a),
SH_PFC_PIN_GROUP(pwm6_b),
+ SH_PFC_PIN_GROUP(qspi0_ctrl),
+ SH_PFC_PIN_GROUP(qspi0_data2),
+ SH_PFC_PIN_GROUP(qspi0_data4),
+ SH_PFC_PIN_GROUP(qspi1_ctrl),
+ SH_PFC_PIN_GROUP(qspi1_data2),
+ SH_PFC_PIN_GROUP(qspi1_data4),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -4829,6 +4886,18 @@ static const char * const pwm6_groups[] = {
"pwm6_b",
};

+static const char * const qspi0_groups[] = {
+ "qspi0_ctrl",
+ "qspi0_data2",
+ "qspi0_data4",
+};
+
+static const char * const qspi1_groups[] = {
+ "qspi1_ctrl",
+ "qspi1_data2",
+ "qspi1_data4",
+};
+
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@@ -5004,7 +5073,7 @@ static const char * const vin5_groups[] = {
};

static const struct {
- struct sh_pfc_function common[50];
+ struct sh_pfc_function common[52];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_function automotive[4];
#endif
@@ -5041,6 +5110,8 @@ static const struct {
SH_PFC_FUNCTION(pwm4),
SH_PFC_FUNCTION(pwm5),
SH_PFC_FUNCTION(pwm6),
+ SH_PFC_FUNCTION(qspi0),
+ SH_PFC_FUNCTION(qspi1),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif2),
--
2.17.1


[PATCH 5.10.y-cip 03/16] pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1

Lad Prabhakar
 

From: Biju Das <biju.das.jz@bp.renesas.com>

commit 74ce7a8044b07268817828af2d6268801ddc012b upstream.

This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201019132805.5996-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a7796.c | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index 55f0344a3d3e..88e9c46003d9 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -1831,6 +1831,7 @@ static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK,
};

+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
/* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */
@@ -2045,6 +2046,7 @@ static const unsigned int drif3_data1_b_pins[] = {
static const unsigned int drif3_data1_b_mux[] = {
RIF3_D1_B_MARK,
};
+#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */

/* - DU --------------------------------------------------------------------- */
static const unsigned int du_rgb666_pins[] = {
@@ -4133,7 +4135,9 @@ static const unsigned int vin5_clk_mux[] = {

static const struct {
struct sh_pfc_pin_group common[316];
+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_pin_group automotive[30];
+#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4453,6 +4457,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(vin5_clk),
},
+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
.automotive = {
SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a),
@@ -4485,6 +4490,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
}
+#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
};

static const char * const audio_clk_groups[] = {
@@ -4543,6 +4549,7 @@ static const char * const canfd1_groups[] = {
"canfd1_data",
};

+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
static const char * const drif0_groups[] = {
"drif0_ctrl_a",
"drif0_data0_a",
@@ -4584,6 +4591,7 @@ static const char * const drif3_groups[] = {
"drif3_data0_b",
"drif3_data1_b",
};
+#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */

static const char * const du_groups[] = {
"du_rgb666",
@@ -4997,7 +5005,9 @@ static const char * const vin5_groups[] = {

static const struct {
struct sh_pfc_function common[50];
+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_function automotive[4];
+#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(audio_clk),
@@ -5051,12 +5061,14 @@ static const struct {
SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(vin5),
},
+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
.automotive = {
SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
}
+#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
};

static const struct pinmux_cfg_reg pinmux_config_regs[] = {
--
2.17.1


[PATCH 5.10.y-cip 02/16] pinctrl: renesas: r8a77965: Add QSPI[01] pins, groups and functions

Lad Prabhakar
 

commit ffcd7f812dec2f1f27fe73b89c17a04ef6586325 upstream.

Add pins, groups and functions for QSPIO[01].

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201119130926.25692-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a77965.c | 75 +++++++++++++++++++++++++-
1 file changed, 73 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index 38b7b844abe9..530efa70698c 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -3408,6 +3408,57 @@ static const unsigned int pwm6_b_mux[] = {
PWM6_B_MARK,
};

+/* - QSPI0 ------------------------------------------------------------------ */
+static const unsigned int qspi0_ctrl_pins[] = {
+ /* QSPI0_SPCLK, QSPI0_SSL */
+ PIN_QSPI0_SPCLK, PIN_QSPI0_SSL,
+};
+static const unsigned int qspi0_ctrl_mux[] = {
+ QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
+};
+static const unsigned int qspi0_data2_pins[] = {
+ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+ PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
+};
+static const unsigned int qspi0_data2_mux[] = {
+ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+};
+static const unsigned int qspi0_data4_pins[] = {
+ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
+ PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
+ /* QSPI0_IO2, QSPI0_IO3 */
+ PIN_QSPI0_IO2, PIN_QSPI0_IO3,
+};
+static const unsigned int qspi0_data4_mux[] = {
+ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
+ QSPI0_IO2_MARK, QSPI0_IO3_MARK,
+};
+/* - QSPI1 ------------------------------------------------------------------ */
+static const unsigned int qspi1_ctrl_pins[] = {
+ /* QSPI1_SPCLK, QSPI1_SSL */
+ PIN_QSPI1_SPCLK, PIN_QSPI1_SSL,
+};
+static const unsigned int qspi1_ctrl_mux[] = {
+ QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
+};
+static const unsigned int qspi1_data2_pins[] = {
+ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+ PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
+};
+static const unsigned int qspi1_data2_mux[] = {
+ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+};
+static const unsigned int qspi1_data4_pins[] = {
+ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
+ PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
+ /* QSPI1_IO2, QSPI1_IO3 */
+ PIN_QSPI1_IO2, PIN_QSPI1_IO3,
+};
+static const unsigned int qspi1_data4_mux[] = {
+ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
+ QSPI1_IO2_MARK, QSPI1_IO3_MARK,
+};
+
/* - SATA --------------------------------------------------------------------*/
static const unsigned int sata0_devslp_a_pins[] = {
/* DEVSLP */
@@ -4381,7 +4432,7 @@ static const unsigned int vin5_clk_mux[] = {
};

static const struct {
- struct sh_pfc_pin_group common[318];
+ struct sh_pfc_pin_group common[324];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_pin_group automotive[30];
#endif
@@ -4586,6 +4637,12 @@ static const struct {
SH_PFC_PIN_GROUP(pwm5_b),
SH_PFC_PIN_GROUP(pwm6_a),
SH_PFC_PIN_GROUP(pwm6_b),
+ SH_PFC_PIN_GROUP(qspi0_ctrl),
+ SH_PFC_PIN_GROUP(qspi0_data2),
+ SH_PFC_PIN_GROUP(qspi0_data4),
+ SH_PFC_PIN_GROUP(qspi1_ctrl),
+ SH_PFC_PIN_GROUP(qspi1_data2),
+ SH_PFC_PIN_GROUP(qspi1_data4),
SH_PFC_PIN_GROUP(sata0_devslp_a),
SH_PFC_PIN_GROUP(sata0_devslp_b),
SH_PFC_PIN_GROUP(scif0_data),
@@ -5078,6 +5135,18 @@ static const char * const pwm6_groups[] = {
"pwm6_b",
};

+static const char * const qspi0_groups[] = {
+ "qspi0_ctrl",
+ "qspi0_data2",
+ "qspi0_data4",
+};
+
+static const char * const qspi1_groups[] = {
+ "qspi1_ctrl",
+ "qspi1_data2",
+ "qspi1_data4",
+};
+
static const char * const sata0_groups[] = {
"sata0_devslp_a",
"sata0_devslp_b",
@@ -5257,7 +5326,7 @@ static const char * const vin5_groups[] = {
};

static const struct {
- struct sh_pfc_function common[51];
+ struct sh_pfc_function common[53];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_function automotive[4];
#endif
@@ -5294,6 +5363,8 @@ static const struct {
SH_PFC_FUNCTION(pwm4),
SH_PFC_FUNCTION(pwm5),
SH_PFC_FUNCTION(pwm6),
+ SH_PFC_FUNCTION(qspi0),
+ SH_PFC_FUNCTION(qspi1),
SH_PFC_FUNCTION(sata0),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
--
2.17.1


[PATCH 5.10.y-cip 01/16] pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1

Lad Prabhakar
 

From: Biju Das <biju.das.jz@bp.renesas.com>

commit 74c5fdc5b87a9435d6afbdd7d22c874c160bafc6 upstream.

This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201019124258.4574-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a77965.c | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index 7a50b9b69a7d..38b7b844abe9 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -1847,6 +1847,7 @@ static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK,
};

+#ifdef CONFIG_PINCTRL_PFC_R8A77965
/* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */
@@ -2120,6 +2121,7 @@ static const unsigned int drif3_data1_b_pins[] = {
static const unsigned int drif3_data1_b_mux[] = {
RIF3_D1_B_MARK,
};
+#endif /* CONFIG_PINCTRL_PFC_R8A77965 */

/* - DU --------------------------------------------------------------------- */
static const unsigned int du_rgb666_pins[] = {
@@ -4380,7 +4382,9 @@ static const unsigned int vin5_clk_mux[] = {

static const struct {
struct sh_pfc_pin_group common[318];
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_pin_group automotive[30];
+#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4702,6 +4706,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(vin5_clk),
},
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
.automotive = {
SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a),
@@ -4734,6 +4739,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
}
+#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
};

static const char * const audio_clk_groups[] = {
@@ -4792,6 +4798,7 @@ static const char * const canfd1_groups[] = {
"canfd1_data",
};

+#ifdef CONFIG_PINCTRL_PFC_R8A77965
static const char * const drif0_groups[] = {
"drif0_ctrl_a",
"drif0_data0_a",
@@ -4833,6 +4840,7 @@ static const char * const drif3_groups[] = {
"drif3_data0_b",
"drif3_data1_b",
};
+#endif /* CONFIG_PINCTRL_PFC_R8A77965 */

static const char * const du_groups[] = {
"du_rgb666",
@@ -5250,7 +5258,9 @@ static const char * const vin5_groups[] = {

static const struct {
struct sh_pfc_function common[51];
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_function automotive[4];
+#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(audio_clk),
@@ -5305,12 +5315,14 @@ static const struct {
SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(vin5),
},
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
.automotive = {
SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
}
+#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
};

static const struct pinmux_cfg_reg pinmux_config_regs[] = {
--
2.17.1


[PATCH 5.10.y-cip 00/16] Renesas RZ/G2 sync patches from 4.19-cip to 5.10-cip

Lad Prabhakar
 

Hi All,

This patch series sync's patches from 4.19-cip to 5.10-cip.

All the patches have been cherry-picked from upstream.

Cheers,
Prabhakar

Biju Das (6):
pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1
pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1
pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1
pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0
clk: renesas: r8a774b1: Add RPC clocks
clk: renesas: r8a774a1: Add RPC clocks

Geert Uytterhoeven (1):
dt-bindings: pci: rcar-pci-ep: Document missing interrupts property

Lad Prabhakar (7):
pinctrl: renesas: r8a77965: Add QSPI[01] pins, groups and functions
pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions
pinctrl: renesas: r8a77951: Add QSPI[01] pins, groups and functions
pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups and functions
clk: renesas: r8a774c0: Add RPC clocks
memory: renesas-rpc-if: Make rpcif_enable/disable_rpm() as static
inline
dt-bindings: PCI: rcar-pci-host: Document r8a774e1 bindings

Marian-Cristian Rotariu (1):
dt-bindings: timer: renesas: tmu: Document r8a774e1 bindings

YueHaibing (1):
spi: spi-mem: Fix passing zero to 'PTR_ERR' warning

.../devicetree/bindings/pci/rcar-pci-ep.yaml | 9 ++
.../devicetree/bindings/pci/rcar-pci.txt | 1 +
.../devicetree/bindings/timer/renesas,tmu.txt | 1 +
drivers/clk/renesas/r8a774a1-cpg-mssr.c | 8 ++
drivers/clk/renesas/r8a774b1-cpg-mssr.c | 8 ++
drivers/clk/renesas/r8a774c0-cpg-mssr.c | 9 ++
drivers/clk/renesas/rcar-gen3-cpg.c | 28 ++++++
drivers/clk/renesas/rcar-gen3-cpg.h | 5 ++
drivers/memory/renesas-rpc-if.c | 13 ---
drivers/pinctrl/renesas/pfc-r8a77951.c | 89 ++++++++++++++++++-
drivers/pinctrl/renesas/pfc-r8a7796.c | 87 +++++++++++++++++-
drivers/pinctrl/renesas/pfc-r8a77965.c | 87 +++++++++++++++++-
drivers/pinctrl/renesas/pfc-r8a77990.c | 87 +++++++++++++++++-
drivers/spi/spi-mem.c | 2 +-
include/memory/renesas-rpc-if.h | 13 ++-
15 files changed, 421 insertions(+), 26 deletions(-)

--
2.17.1


Re: lab-cip-cybertrust will be temporarily offline

Chris Paterson
 

Hello Toyooka-san,

From: Hiraku Toyooka <hiraku.toyooka@cybertrust.co.jp>
Sent: 21 June 2021 07:43

Hi.

The lab-cip-cybertrust will be temporarily offline on June 25th due to physical
location change. I'm sorry for the inconvenience.
Thank you for the heads-up.

@nobuhiro1.iwamatsu@toshiba.co.jp, will this cause any issues for the next v4.19-cip release (Friday)?
Can we get the testing done early?

Kind regards, Chris


The schedule is as follows:

June 24th (Thu.) 10:00- (UTC)
- zcu102-02 and bbb-03 will be changed to offline.
- zcu102-01 will be still online.

June 25th (Fri.) 01:00- (UTC)
- zcu102-01 will be changed to offline.
- lab-cip-cybertrust will be changed to offline.

June 25th (Fri.) -10:00 (UTC)
- lab-cip-cybertrust will be changed to online.
- zcu102-01 will be changed to online first.
- zcu102-02 and bbb-03 will be changed to online following zcu102-01
(within a day).

Best regards,
--
Hiraku Toyooka
Cybertrust Japan Co., Ltd.


lab-cip-cybertrust will be temporarily offline

Hiraku Toyooka
 

Hi.

The lab-cip-cybertrust will be temporarily offline on June 25th due to physical
location change. I'm sorry for the inconvenience.

The schedule is as follows:

June 24th (Thu.) 10:00- (UTC)
- zcu102-02 and bbb-03 will be changed to offline.
- zcu102-01 will be still online.

June 25th (Fri.) 01:00- (UTC)
- zcu102-01 will be changed to offline.
- lab-cip-cybertrust will be changed to offline.

June 25th (Fri.) -10:00 (UTC)
- lab-cip-cybertrust will be changed to online.
- zcu102-01 will be changed to online first.
- zcu102-02 and bbb-03 will be changed to online following zcu102-01
(within a day).

Best regards,
--
Hiraku Toyooka
Cybertrust Japan Co., Ltd.


Re: New CVE entries this week

Masami Ichikawa
 

Hi!

2021年6月18日(金) 17:04 Pavel Machek <pavel@denx.de>:

Hi!

In last import, CVE-2020-36385 and CVE-2020-36386 was confused. That's
fixed now. And we have following new issues:

* 2021-06-13

CVE-2021-0129 -- Passkey Entry protocol of the Bluetooth Core is
vulnerable to an impersonation, fixed 4.9+

CVE-2021-0512 -- HID arrays, fixed 4.9+

CVE-2021-28691 -- Xen, fixed 5.10+

CVE-2021-3573 -- Bluetooth UAF, fixed 4.9+

* 2021-06-18

CVE-2021-32078 -- ARM: footbridge:, hopefully noone uses this

CVE-2021-34693 -- can: bcm: fix infoleak in struct bcm_msg_head

CVE-2020-36386 -- An issue was discovered in the Linux kernel before
5.8.1. net/bluetooth/hci_event.c has a slab out-of-bounds read in
hci_extended_inquiry_result_evt, aka CID-51c19bf3d5cf.
Thank you for the update.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany



--
Masami Ichikawa
Cybertrust Japan Co., Ltd.

Email :masami.ichikawa@cybertrust.co.jp
:masami.ichikawa@miraclelinux.com


Re: Request support to switch the CIP version

Lakshmi Natarajan <lakshmi.natarajan@...>
 

Hello,

Can you please support with the below query where we are looking to switch to a different CIP kernel revision.

Regards,
Lakshmi


On Thu, Jun 17, 2021 at 12:00 PM Lakshmi Natarajan <lakshmi.natarajan@...> wrote:
Hello,

We are currently using CIP Linux Kernel version 4.19. 140-cip33 in our Linux open source platform (ISAR).
We have to switch to revision  4.19.186.
Can you point us to the link to use in the .bb file and the SHA value for the same?
We are getting SHA failure when we try to download from this link.

Regards,
Lakshmi

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[isar-cip-core][PATCH v2 1/1] swupdate: Add option to use swupdate-handler-roundrobin

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@siemens.com>

The new SWUpdate round-robin handler is available under[1].
Add the Option `SWUPDATE_HANDLER_BOOT_HANDLER_CONFIG` to
set the source of the swupdate-handler-roundrobin configuration.

If another Lua handler should be used, set the variable
`SWUPDATE_USE_ROUND_ROBIN_HANDLER_REPO` to `0`. Add the alternative
handler to the repository and use the variable
`SWUPDATE_LUASCRIPT` to add the handler to the build.

[1]: https://gitlab.com/cip-project/cip-sw-updates/swupdate-handler-roundrobin

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
classes/swupdate-config.bbclass | 14 +-
kas/opt/ebg-secure-boot-base.yml | 1 +
.../files/secure-boot/sw-description.tmpl | 14 +-
recipes-core/images/files/sw-description.tmpl | 21 +-
.../swupdate.handler.efibootguard.ini | 16 +
.../files/swupdate.handler.efibootguard.ini | 26 +
.../swupdate/files/swupdate_handlers.lua | 453 ------------------
recipes-core/swupdate/swupdate.bb | 13 +-
8 files changed, 90 insertions(+), 468 deletions(-)
create mode 100644 recipes-core/swupdate/files/secureboot/swupdate.handler.efibootguard.ini
create mode 100644 recipes-core/swupdate/files/swupdate.handler.efibootguard.ini
delete mode 100644 recipes-core/swupdate/files/swupdate_handlers.lua

diff --git a/classes/swupdate-config.bbclass b/classes/swupdate-config.bbclass
index f67ca4f..dfa3579 100644
--- a/classes/swupdate-config.bbclass
+++ b/classes/swupdate-config.bbclass
@@ -17,14 +17,22 @@ BUILD_DEB_DEPENDS = " \
zlib1g-dev, debhelper, libconfig-dev, libarchive-dev, \
python-sphinx:native, dh-systemd, libsystemd-dev, libssl-dev, pkg-config"

+SRC_URI += " ${@ 'git://gitlab.com/cip-project/cip-sw-updates/swupdate-handler-roundrobin.git;protocol=https;destsuffix=swupdate-handler-roundrobin;name=swupdate-handler-roundrobin;nobranch=1' \
+ if d.getVar('SWUPDATE_USE_ROUND_ROBIN_HANDLER_REPO') == '1' else '' \
+ }"
+SRCREV_swupdate-handler-roundrobin ?= "6f561f136fdbe51d2e9066b934dfcb06b94c6624"
+
+SWUPDATE_USE_ROUND_ROBIN_HANDLER_REPO ?= "1"
+SWUPDATE_LUASCRIPT ?= "swupdate-handler-roundrobin/swupdate_handlers_roundrobin.lua"
+
KFEATURE_lua = ""
KFEATURE_lua[BUILD_DEB_DEPENDS] = "liblua5.3-dev"
KFEATURE_lua[KCONFIG_SNIPPETS] = "file://swupdate_defconfig_lua.snippet"

KFEATURE_luahandler = ""
KFEATURE_luahandler[KCONFIG_SNIPPETS] = "file://swupdate_defconfig_luahandler.snippet"
-KFEATURE_luahandler[SRC_URI] = "file://${SWUPDATE_LUASCRIPT}"
-
+KFEATURE_luahandler[SRC_URI] = "${@ 'file://${SWUPDATE_LUASCRIPT}' \
+ if d.getVar('SWUPDATE_USE_ROUND_ROBIN_HANDLER_REPO') == '0' else '' }"
KFEATURE_DEPS = ""
KFEATURE_DEPS[luahandler] = "lua"

@@ -59,8 +67,6 @@ KFEATURE_u-boot[DEPENDS] = "${@ 'libubootenv u-boot-${MACHINE}-config' \
else 'libubootenv'}"
KFEATURE_u-boot[KCONFIG_SNIPPETS] = "file://swupdate_defconfig_u-boot.snippet"

-SWUPDATE_LUASCRIPT ?= "swupdate_handlers.lua"
-
def get_bootloader_featureset(d):
bootloader = d.getVar("SWUPDATE_BOOTLOADER", True) or ""
if bootloader == "efibootguard":
diff --git a/kas/opt/ebg-secure-boot-base.yml b/kas/opt/ebg-secure-boot-base.yml
index 35fb42e..8182bd8 100644
--- a/kas/opt/ebg-secure-boot-base.yml
+++ b/kas/opt/ebg-secure-boot-base.yml
@@ -18,3 +18,4 @@ local_conf_header:
initramfs: |
IMAGE_INSTALL += "initramfs-abrootfs-secureboot"
SWU_DESCRIPTION = "secureboot"
+ SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG = "secureboot/swupdate.handler.${SWUPDATE_BOOTLOADER}.ini"
diff --git a/recipes-core/images/files/secure-boot/sw-description.tmpl b/recipes-core/images/files/secure-boot/sw-description.tmpl
index bce97d0..34a58a3 100644
--- a/recipes-core/images/files/secure-boot/sw-description.tmpl
+++ b/recipes-core/images/files/secure-boot/sw-description.tmpl
@@ -14,16 +14,22 @@ software =
name = "secure boot update"
images: ({
filename = "${ROOTFS_PARTITION_NAME}";
- device = "fedcba98-7654-3210-cafe-5e0710000001,fedcba98-7654-3210-cafe-5e0710000002";
+ device = "sda4,sda5";
type = "roundrobin";
- compressed = "true";
+ compressed = "zlib";
filesystem = "ext4";
+ properties: {
+ subtype = "image";
+ };
});
files: ({
filename = "linux.signed.efi";
path = "linux.signed.efi";
- type = "kernelfile";
- device = "sda2,sda3";
+ type = "roundrobin";
+ device = "sda4->sda2,sda5->sda3";
filesystem = "vfat";
+ properties: {
+ subtype = "kernel";
+ };
})
}
diff --git a/recipes-core/images/files/sw-description.tmpl b/recipes-core/images/files/sw-description.tmpl
index bb34088..3309271 100644
--- a/recipes-core/images/files/sw-description.tmpl
+++ b/recipes-core/images/files/sw-description.tmpl
@@ -16,21 +16,30 @@ software =
filename = "${ROOTFS_PARTITION_NAME}";
device = "fedcba98-7654-3210-cafe-5e0710000001,fedcba98-7654-3210-cafe-5e0710000002";
type = "roundrobin";
- compressed = "true";
+ compressed = "zlib";
filesystem = "ext4";
+ properties: {
+ subtype = "image";
+ };
});
files: ({
filename = "${KERNEL_IMAGE}";
path = "vmlinuz";
- type = "kernelfile";
- device = "sda2,sda3";
+ type = "roundrobin";
+ device = "fedcba98-7654-3210-cafe-5e0710000001->sda2,fedcba98-7654-3210-cafe-5e0710000002->sda3";
filesystem = "vfat";
+ properties: {
+ subtype = "kernel";
+ };
},
{
filename = "${INITRD_IMAGE}";
- path = "initrd.img";
- type = "kernelfile";
- device = "sda2,sda3";
+ path = "${INITRD_IMAGE}";
+ type = "roundrobin";
+ device = "fedcba98-7654-3210-cafe-5e0710000001->sda2,fedcba98-7654-3210-cafe-5e0710000002->sda3";
filesystem = "vfat";
+ properties: {
+ subtype = "initrd";
+ };
});
}
diff --git a/recipes-core/swupdate/files/secureboot/swupdate.handler.efibootguard.ini b/recipes-core/swupdate/files/secureboot/swupdate.handler.efibootguard.ini
new file mode 100644
index 0000000..4a109b7
--- /dev/null
+++ b/recipes-core/swupdate/files/secureboot/swupdate.handler.efibootguard.ini
@@ -0,0 +1,16 @@
+[image]
+chainhandler=raw
+
+[image.selector]
+method=getroot_rr
+key=root
+
+[kernel]
+chainhandler=rawfile
+
+[kernel.selector]
+method=getroot_rrmap
+key=root
+
+[kernel.bootenv]
+kernelfile=C:BOOT${rrindex}:linux.signed.efi
diff --git a/recipes-core/swupdate/files/swupdate.handler.efibootguard.ini b/recipes-core/swupdate/files/swupdate.handler.efibootguard.ini
new file mode 100644
index 0000000..3aee76c
--- /dev/null
+++ b/recipes-core/swupdate/files/swupdate.handler.efibootguard.ini
@@ -0,0 +1,26 @@
+[image]
+chainhandler=raw
+
+[image.selector]
+method=cmdline_rr
+key=root
+
+[image.bootenv]
+kernelparams=root=PARTUUID=${rrtarget} ${cmdline_root}
+
+[kernel]
+chainhandler=rawfile
+
+[kernel.selector]
+method=cmdline_rrmap
+key=root
+
+[kernel.bootenv]
+kernelfile=C:BOOT${rrindex}:vmlinuz
+
+[initrd]
+chainhandler=rawfile
+
+[initrd.selector]
+method=cmdline_rrmap
+key=root
diff --git a/recipes-core/swupdate/files/swupdate_handlers.lua b/recipes-core/swupdate/files/swupdate_handlers.lua
deleted file mode 100644
index f2ecc54..0000000
--- a/recipes-core/swupdate/files/swupdate_handlers.lua
+++ /dev/null
@@ -1,453 +0,0 @@
---[[
-
- Round-robin Image and File Handler.
-
- Copyright (C) 2019, Siemens AG
-
- Author: Christian Storm <christian.storm@siemens.com>
-
- SPDX-License-Identifier: GPL-2.0-or-later
-
- An `sw-description` file using these handlers may look like:
- software =
- {
- version = "0.1.0";
- images: ({
- filename = "rootfs.ext4";
- device = "sda4,sda5";
- type = "roundrobin";
- compressed = false;
- });
- files: ({
- filename = "vmlinuz";
- path = "vmlinuz";
- type = "kernelfile";
- device = "sda2,sda3";
- filesystem = "vfat";
- },
- {
- filename = "initrd.img";
- path = "initrd.img";
- type = "kernelfile";
- device = "sda2,sda3";
- filesystem = "vfat";
- });
- }
-
- The semantics is as follows: Instead of having a fixed target device,
- the 'roundrobin' image handler calculates the target device by parsing
- /proc/cmdline, matching the root=<device> kernel parameter against its
- 'device' attribute's list of devices, and sets the actual target
- device to the next 'device' attribute list entry in a round-robin
- manner. The actual flashing is done via chain-calling another handler,
- defaulting to the "raw" handler.
-
- The 'kernelfile' file handler reuses the 'roundrobin' handler's target
- device calculation by reading the actual target device from the same
- index into its 'device' attribute's list of devices. The actual placing
- of files into this partition is done via chain-calling another handler,
- defaulting to the "rawfile" handler.
-
- In the above example, if /dev/sda4 is currently booted according to
- /proc/cmdline, /dev/sda5 will be flashed and the vmlinuz and initrd.img
- files will be placed on /dev/sda3. If /dev/sda5 is booted, /dev/sda4
- will be flashed and the vmlinuz and initrd.img files are placed on
- /dev/sda2.
- In addition to "classical" device nodes as in this example, partition
- UUIDs as reported, e.g., by `blkid -s PARTUUID` are also supported.
- UBI volumes are supported as well by specifying a CSV list of
- ubi<number>:<label> items.
-
- Configuration is done via an INI-style configuration file located at
- /etc/swupdate.handler.ini or via compiled-in configuration (by
- embedding the Lua handler script into the SWUpdate binary via using
- CONFIG_EMBEDDED_LUA_HANDLER), the latter having precedence over the
- former. See the example configuration below.
- If uncommenting this example block, it will take precedence over any
- /etc/swupdate.handler.ini configuration file.
-
- The chain-called handlers can either be specified in the configuration,
- i.e., a static run-time setting, or via the 'chainhandler' property of
- an 'image' or 'file' section in the sw-description, with the latter
- taking precedence over the former, e.g.,
- ...
- images: ({
- filename = "rootfs.ext4";
- device = "sda4,sda5";
- type = "roundrobin";
- properties: {
- chainhandler = "myraw";
- };
- });
- ...
- Such a sw-description fragment will chain-call the imaginary "myraw"
- handler regardless of what's been configured in the compiled-in or the
- configuration file.
- When chain-calling the "rdiff_image" handler, its 'rdiffbase' property
- is subject to round-robin as well, i.e., the 'rdiffbase' property is
- expected to be a CSV list as for the 'device' property, and the actual
- 'rdiffbase' property value is calculated following the same round-robin
- calculation mechanism stated above prior to chain-calling the actual
- "rdiff_image" handler, e.g.,
- images: ({
- filename = "rootfs.ext4";
- type = "roundrobin";
- device = "sda4,sda5";
- properties: {
- chainhandler = "rdiff_image";
- rdiffbase="sda1,sda2";
- };
- });
- will set the 'rdiffbase' property to /dev/sda2 (/dev/sda1) if /dev/sda4
- (/dev/sda5) is the currently booted root file system according to
- /proc/cmdline parsing.
-
-]]
-
-
-local configuration = [[
-[bootloader]
-# Required: bootloader name, uboot and ebg currently supported.
-name=ebg
-# Required: bootloader-specific key-value pairs, e.g., for ebg:
-kernelname=linux.signed.efi
-# For relying on FAT labels, prefix bootlabels with 'L:', e.g., L:BOOT0.
-# For using custom labels, i.e., relying on the contents of an EFILABEL
-# file within the partition, prefix it with 'C:', e.g., C:BOOT0.
-bootlabel={ "C:BOOT0:", "C:BOOT1:" }
-
-# Optional: handler to chain-call for the 'roundrobin' handler,
-# defaulting to 'raw'
-[roundrobin]
-chainhandler=raw
-
-# Optional: handler to chain-call for the 'kernelfile' handler,
-# defaulting to 'rawfile'
-[kernelfile]
-chainhandler=rawfile
-]]
-
--- Default configuration file, tried if no compiled-in config is available.
-local cfgfile = "/etc/swupdate.handler.ini"
-
--- Table holding the configuration.
-local config = {}
-
--- Mandatory configuration [section] and keys
-local BOOTLOADERCFG = {
- ebg = {
- bootloader = {"name", "bootlabel", "kernelname"}
- },
- -- TODO fill with mandatory U-Boot configuration
- uboot = {
- bootloader = {"name"}
- }
-}
-
--- enum-alikes to make code more readable
-local BOOTLOADER = { EBG = "ebg", UBOOT = "uboot" }
-local PARTTYPE = { UUID = 1, PLAIN = 2, UBI = 3 }
-
--- Target table describing the target device the image is to be/has been flashed to.
-local rrtarget = {
- size = function(self)
- local _size = 0
- for index in pairs(self) do _size = _size + 1 end
- return _size - 1
- end
-}
-
--- Helper function parsing CSV fields of a struct img_type such as
--- the "device" fields or the "rdiffbase" property.
-local get_device_list = function(device_node_csv_list)
- local device_list = {}
- for item in device_node_csv_list:gmatch("([^,]+)") do
- local device_node = item:gsub("/dev/", "")
- device_list[#device_list+1] = device_node
- device_list[device_node] = #device_list
- end
- return device_list
-end
-
--- Helper function to determine device node location.
-local get_device_path = function(device_node)
- if device_node:match("ubi%d+:%S+") then
- return 0, device_node, PARTTYPE.UBI
- end
- local device_path = string.format("/dev/disk/by-partuuid/%s", device_node)
- local file = io.open(device_path, "rb" )
- if file then
- file:close()
- return 0, device_path, PARTTYPE.UUID
- end
- device_path = string.format("/dev/%s", device_node)
- file = io.open(device_path, "rb" )
- if file then
- file:close()
- return 0, device_path, PARTTYPE.PLAIN
- end
- swupdate.error(string.format("Cannot access target device node /dev/{,disk/by-partuuid}/%s", device_node))
- return 1, nil, nil
-end
-
--- Helper function parsing the INI-style configuration.
-local get_config = function()
- -- Return configuration right away if it's already parsed.
- if config ~= nil and #config > 0 then
- return config
- end
-
- -- Get configuration INI-style string.
- if not configuration then
- swupdate.trace(string.format("No compiled-in config found, trying %s", cfgfile))
- local file = io.open(cfgfile, "r" )
- if not file then
- swupdate.error(string.format("Cannot open config file %s", cfgfile))
- return nil
- end
- configuration = file:read("*a")
- file:close()
- end
- if configuration:sub(-1) ~= "\n" then
- configuration=configuration.."\n"
- end
-
- -- Parse INI-style contents into config table.
- local sec, key, value
- for line in configuration:gmatch("(.-)\n") do
- if line:match("^%[([%w%p]+)%][%s]*") then
- sec = line:match("^%[([%w%p]+)%][%s]*")
- config[sec] = {}
- elseif sec then
- key, value = line:match("^([%w%p]-)=(.*)$")
- if key and value then
- if tonumber(value) then value = tonumber(value) end
- if value == "true" then value = true end
- if value == "false" then value = false end
- if value:sub(1,1) == "{" then
- local _value = {}
- for _key, _ in value:gmatch("\"(%S+)\"") do
- table.insert(_value, _key)
- end
- value = _value
- end
- config[sec][key] = value
- else
- if not line:match("^$") and not line:match("^#") then
- swupdate.warn(string.format("Syntax error, skipping '%s'", line))
- end
- end
- else
- swupdate.error(string.format("Syntax error. no [section] encountered."))
- return nil
- end
- end
-
- -- Check config table for mandatory key existence.
- if config["bootloader"] == nil or config["bootloader"]["name"] == nil then
- swupdate.error(string.format("Syntax error. no [bootloader] encountered or name= missing therein."))
- return nil
- end
- local bcfg = BOOTLOADERCFG[config.bootloader.name]
- if not bcfg then
- swupdate.error(string.format("Bootloader unsupported, name=uboot|ebg missing in [bootloader]?."))
- return nil
- end
- for sec, _ in pairs(bcfg) do
- for _, key in pairs(bcfg[sec]) do
- if config[sec] == nil or config[sec][key] == nil then
- swupdate.error(string.format("Mandatory config key %s= in [%s] not found.", key, sec))
- end
- end
- end
-
- return config
-end
-
--- Round-robin image handler for updating the root partition.
-function handler_roundrobin(image)
- -- Read configuration.
- if not get_config() then
- swupdate.error("Cannot read configuration.")
- return 1
- end
-
- -- Check if we can chain-call the handler.
- local chained_handler = "raw"
- if image.properties ~= nil and image.properties["chainhandler"] ~= nil then
- chained_handler = image.properties["chainhandler"]
- elseif config["roundrobin"] ~= nil and config["roundrobin"]["chainhandler"] ~= nil then
- chained_handler = config["roundrobin"]["chainhandler"]
- end
- if not swupdate.handler[chained_handler] then
- swupdate.error(string.format("'%s' handler not available in SWUpdate distribution.", chained_handler))
- return 1
- end
-
- -- Get device list for round-robin.
- local devices = get_device_list(image.device)
- if #devices < 2 then
- swupdate.error("Specify at least 2 devices in the device= property for 'roundrobin'.")
- return 1
- end
-
- -- Check that rrtarget is unset, else a reboot may be pending.
- if rrtarget:size() > 0 then
- swupdate.warn("The 'roundrobin' handler has been run. Is a reboot pending?")
- end
-
- -- Determine current root device.
- local file = io.open("/proc/cmdline", "r")
- if not file then
- swupdate.error("Cannot open /proc/cmdline.")
- return 1
- end
- local cmdline = file:read("*l")
- file:close()
-
- local rootparam, rootdevice
- for item in cmdline:gmatch("%S+") do
- rootparam, rootdevice = item:match("(root=[%u=]*[/dev/]*(%S+))")
- if rootparam and rootdevice then break end
- end
- if not rootdevice then
- -- Use findmnt to get the rootdev
- rootdevice = io.popen('findmnt -nl / -o PARTUUID'):read("*l")
- if not rootdevice then
- swupdate.error("Cannot determine current root device.")
- return 1
- end
- end
- swupdate.info(string.format("Current root device is: %s", rootdevice))
-
- if not devices[rootdevice] then
- swupdate.error(string.format("Current root device '%s' is not in round-robin root devices list: %s", rootdevice, image.device:gsub("/dev/", "")))
- return 1
- end
-
- -- Perform round-robin calculation for target.
- local err
- rrtarget.index = devices[rootdevice] % #devices + 1
- rrtarget.device_node = devices[rrtarget.index]
- err, rrtarget.device_path, rrtarget.parttype = get_device_path(devices[rrtarget.index])
- if err ~= 0 then
- return 1
- end
- swupdate.info(string.format("Using '%s' as 'roundrobin' target via '%s' handler.", rrtarget.device_path, chained_handler))
-
- -- If the chain-called handler is rdiff_image, adapt the rdiffbase property
- if chained_handler == "rdiff_image" then
- if image.properties ~= nil and image.properties["rdiffbase"] ~= nil then
- local rdiffbase_devices = get_device_list(image.properties["rdiffbase"])
- if #rdiffbase_devices < 2 then
- swupdate.error("Specify at least 2 devices in the rdiffbase= property for 'roundrobin'.")
- return 1
- end
- err, image.propierties["rdiffbase"], _ = get_device_path(rdiffbase_devices[rrtarget.index])
- if err ~= 0 then
- return 1
- end
- swupdate.info(string.format("Using device %s as rdiffbase.", image.properties["rdiffbase"]))
- else
- swupdate.error("Property 'rdiffbase' is missing in sw-description.")
- return 1
- end
- end
-
- -- Actually flash the partition.
- local msg
- image.type = chained_handler
- image.device = rrtarget.device_path
- err, msg = swupdate.call_handler(chained_handler, image)
- if err ~= 0 then
- swupdate.error(string.format("Error chain-calling '%s' handler: %s", chained_handler, (msg or "")))
- return 1
- end
-
- if config.bootloader.name == BOOTLOADER.EBG then
- if rootparam then
- local value = cmdline:gsub(
- rootparam:gsub("%-", "%%-"),
- string.format("root=%s%s",
- (rrtarget.parttype == PARTTYPE.PLAIN and "") or (rrtarget.parttype == PARTTYPE.UBI and "") or "PARTUUID=",
- rrtarget.parttype == PARTTYPE.PLAIN and rrtarget.device_path or devices[rrtarget.index]
- )
- )
- swupdate.info(string.format("Setting EFI Bootguard environment: kernelparams=%s", value))
- swupdate.set_bootenv("kernelparams", value)
- end
- elseif config.bootloader.name == BOOTLOADER.UBOOT then
- -- Update U-Boot environment.
- swupdate.info(string.format("Setting U-Boot environment"))
- local value = rrtarget.index
- swupdate.set_bootenv("swupdpart", value);
- end
-
- return 0
-end
-
--- File handler for updating kernel files.
-function handler_kernelfile(image)
- -- Check if we can chain-call the handler.
- local chained_handler = "rawfile"
- if image.properties ~= nil and image.properties["chainhandler"] ~= nil then
- chained_handler = image.properties["chainhandler"]
- elseif config["kernelfile"] ~= nil and config["kernelfile"]["chainhandler"] ~= nil then
- chained_handler = config["kernelfile"]["chainhandler"]
- end
- if not swupdate.handler[chained_handler] then
- swupdate.error(string.format("'%s' handler not available in SWUpdate distribution."), chained_handler)
- return 1
- end
-
- -- Check that rrtarget is set, else the 'roundrobin' handler hasn't been run.
- if rrtarget:size() == 0 then
- swupdate.error("The 'roundrobin' handler hasn't been run.")
- swupdate.info("Place 'roundrobin' above 'kernelfile' in sw-description.")
- return 1
- end
-
- -- Get device list for round-robin.
- local devices = get_device_list(image.device)
- if #devices < 2 then
- swupdate.error("Specify at least 2 devices in the device= property for 'kernelfile'.")
- return 1
- end
- if rrtarget.index > #devices then
- swupdate.error("Cannot map kernel partition to root partition.")
- return 1
- end
-
- -- Perform round-robin indexing for target.
- local err
- err, image.device, _ = get_device_path(devices[rrtarget.index])
- if err ~= 0 then
- return 1
- end
- swupdate.info(string.format("Using '%s' as 'kernelfile' target via '%s' handler.", image.device, chained_handler))
-
- -- Actually copy the 'kernelfile' files.
- local msg
- image.type = chained_handler
- err, msg = swupdate.call_handler(chained_handler, image)
- if err ~= 0 then
- swupdate.error(string.format("Error chain-calling '%s' handler: %s", chained_handler, (msg or "")))
- return 1
- end
-
- if config.bootloader.name == BOOTLOADER.EBG then
- -- Update EFI Boot Guard environment: kernelfile
- local value = string.format("%s%s", config.bootloader.bootlabel[rrtarget.index], config.bootloader.kernelname)
- swupdate.info(string.format("Setting EFI Bootguard environment: kernelfile=%s", value))
- swupdate.set_bootenv("kernelfile", value)
- elseif config.bootloader.name == BOOTLOADER.UBOOT then
- -- Update U-Boot environment.
- swupdate.info(string.format("Setting U-Boot environment"))
- -- TODO
- end
-
- return 0
-end
-
-swupdate.register_handler("roundrobin", handler_roundrobin, swupdate.HANDLER_MASK.IMAGE_HANDLER)
-swupdate.register_handler("kernelfile", handler_kernelfile, swupdate.HANDLER_MASK.FILE_HANDLER)
diff --git a/recipes-core/swupdate/swupdate.bb b/recipes-core/swupdate/swupdate.bb
index 75eaf8d..4984a63 100644
--- a/recipes-core/swupdate/swupdate.bb
+++ b/recipes-core/swupdate/swupdate.bb
@@ -29,6 +29,8 @@ DEBIAN_DEPENDS = "${shlibs:Depends}, ${misc:Depends}"
inherit dpkg
inherit swupdate-config

+SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG ?= "swupdate.handler.${SWUPDATE_BOOTLOADER}.ini"
+SRC_URI += "file://${SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG}"
KFEATURES += "luahandler"

S = "${WORKDIR}/git"
@@ -46,5 +48,14 @@ do_prepare_build() {
echo "configs/${DEFCONFIG}" >> ${S}/.gitignore
fi
# luahandler
- install -m 0644 ${WORKDIR}/${SWUPDATE_LUASCRIPT} ${S}
+ if [ -e ${WORKDIR}/${SWUPDATE_LUASCRIPT} ]; then
+ install -m 0644 ${WORKDIR}/${SWUPDATE_LUASCRIPT} ${S}/swupdate_handlers.lua
+ fi
+ if [ -e ${WORKDIR}/swupdate.handler.${SWUPDATE_BOOTLOADER}.ini ]; then
+ install -m 0644 ${WORKDIR}/swupdate.handler.${SWUPDATE_BOOTLOADER}.ini ${S}/swupdate.handler.ini
+ echo "swupdate.handler.ini etc/" >> ${S}/debian/swupdate.install
+ elif [ -e ${WORKDIR}/${SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG} ]; then
+ install -m 0644 ${WORKDIR}/${SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG} ${S}/swupdate.handler.ini
+ echo "swupdate.handler.ini etc/" >> ${S}/debian/swupdate.install
+ fi
}
--
2.20.1


[isar-cip-core][PATCH v2 0/1] swupdate add new round robin handler

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@siemens.com>

Add the SWUpdate round-robin Lua handler from [1].

[1]: https://gitlab.com/cip-project/cip-sw-updates/swupdate-handler-roundrobin

Changes in V2:
- fix build
- removed unnecessary ustate variable
- adapted repository path

Quirin Gylstorff (1):
swupdate: Add option to use swupdate-handler-roundrobin

classes/swupdate-config.bbclass | 14 +-
kas/opt/ebg-secure-boot-base.yml | 1 +
.../files/secure-boot/sw-description.tmpl | 14 +-
recipes-core/images/files/sw-description.tmpl | 21 +-
.../swupdate.handler.efibootguard.ini | 16 +
.../files/swupdate.handler.efibootguard.ini | 26 +
.../swupdate/files/swupdate_handlers.lua | 453 ------------------
recipes-core/swupdate/swupdate.bb | 13 +-
8 files changed, 90 insertions(+), 468 deletions(-)
create mode 100644 recipes-core/swupdate/files/secureboot/swupdate.handler.efibootguard.ini
create mode 100644 recipes-core/swupdate/files/swupdate.handler.efibootguard.ini
delete mode 100644 recipes-core/swupdate/files/swupdate_handlers.lua

--
2.20.1


Re: [isar-cip-dev][PATCH 2/2] swupdate: Add option to use swupdate-handler-roundrobin

Jan Kiszka
 

On 18.06.21 15:33, Jan Kiszka wrote:
On 14.06.21 12:33, Jan Kiszka wrote:
On 11.06.21 16:30, Jan Kiszka wrote:
On 11.06.21 16:21, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>

The new SWUpdate round-robin handler is available under[1].
Add the Option `SWUPDATE_HANDLER_BOOT_HANDLER_CONFIG` to
set the source of the swupdate-handler-roundrobin configuration.

If another Lua handler should be used, set the variable
`SWUPDATE_USE_ROUND_ROBIN_HANDLER_REPO` to `0`. Add the alternative
handler to the repository and use the variable
`SWUPDATE_LUASCRIPT` to add the handler to the build.

[1]:https://gitlab.com/cip-playground/swupdate-handler-roundrobin/
What's still missing to get the script repo out of its playground? I
would obviously prefer already referencing the final URL if that is in
sight (I know there will be forwarding as well).
FYI: Handler repo has been moved to

https://gitlab.com/cip-project/cip-sw-updates/swupdate-handler-roundrobin.
OK, updated that myself: Both patches are now in next.
Dropped again, breaks CI, see
https://gitlab.com/cip-project/cip-core/isar-cip-core/-/pipelines/323454496.
Please have a look.

I've kept patch 1, though.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


Re: [isar-cip-dev][PATCH] linux-cip-common.inc: Uprev the cip-kernel-config

Srinuvasan Arjunan
 

Hi pavel,

    Did uprev for cip-kernel-config, this need to be merge .

Thanks,
Srinuvasan.A

On Tue, 15 Jun, 2021, 10:50 am Srinuvasan A, <srinuvasan_a@...> wrote:
Bump the cip-kernel-config revision for brings the User and Sync
kselftest.

Signed-off-by: Srinuvasan A <Srinuvasan_A@...>
---
 recipes-kernel/linux/linux-cip-common.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/recipes-kernel/linux/linux-cip-common.inc b/recipes-kernel/linux/linux-cip-common.inc
index 021efcd..6362408 100644
--- a/recipes-kernel/linux/linux-cip-common.inc
+++ b/recipes-kernel/linux/linux-cip-common.inc
@@ -25,6 +25,6 @@ SRC_URI_append = " ${@ "git://gitlab.com/cip-project/cip-kernel/cip-kernel-confi

 SRC_URI_append_bbb = "file://${KERNEL_DEFCONFIG}"

-SRCREV_cip-kernel-config ?= "9fa9154c77ee8eeca534aa436c23582c0c59c39f"
+SRCREV_cip-kernel-config ?= "b72318b9346f7262f6dd7511384ca61bd8b545c8"

 S = "${WORKDIR}/linux-cip-v${PV}"
--
2.25.1





Re: [isar-cip-dev][PATCH] linux-cip-common.inc: Uprev the cip-kernel-config

Jan Kiszka
 

On 15.06.21 07:20, Srinuvasan A wrote:
Bump the cip-kernel-config revision for brings the User and Sync
kselftest.

Signed-off-by: Srinuvasan A <Srinuvasan_A@mentor.com>
---
recipes-kernel/linux/linux-cip-common.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/recipes-kernel/linux/linux-cip-common.inc b/recipes-kernel/linux/linux-cip-common.inc
index 021efcd..6362408 100644
--- a/recipes-kernel/linux/linux-cip-common.inc
+++ b/recipes-kernel/linux/linux-cip-common.inc
@@ -25,6 +25,6 @@ SRC_URI_append = " ${@ "git://gitlab.com/cip-project/cip-kernel/cip-kernel-confi

SRC_URI_append_bbb = "file://${KERNEL_DEFCONFIG}"

-SRCREV_cip-kernel-config ?= "9fa9154c77ee8eeca534aa436c23582c0c59c39f"
+SRCREV_cip-kernel-config ?= "b72318b9346f7262f6dd7511384ca61bd8b545c8"

S = "${WORKDIR}/linux-cip-v${PV}"
Thanks, applied.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


Re: [isar-cip-dev][PATCH 2/2] swupdate: Add option to use swupdate-handler-roundrobin

Jan Kiszka
 

On 14.06.21 12:33, Jan Kiszka wrote:
On 11.06.21 16:30, Jan Kiszka wrote:
On 11.06.21 16:21, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>

The new SWUpdate round-robin handler is available under[1].
Add the Option `SWUPDATE_HANDLER_BOOT_HANDLER_CONFIG` to
set the source of the swupdate-handler-roundrobin configuration.

If another Lua handler should be used, set the variable
`SWUPDATE_USE_ROUND_ROBIN_HANDLER_REPO` to `0`. Add the alternative
handler to the repository and use the variable
`SWUPDATE_LUASCRIPT` to add the handler to the build.

[1]:https://gitlab.com/cip-playground/swupdate-handler-roundrobin/
What's still missing to get the script repo out of its playground? I
would obviously prefer already referencing the final URL if that is in
sight (I know there will be forwarding as well).
FYI: Handler repo has been moved to

https://gitlab.com/cip-project/cip-sw-updates/swupdate-handler-roundrobin.
OK, updated that myself: Both patches are now in next.

Thanks,
Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


New CVE entries this week

Pavel Machek
 

Hi!

In last import, CVE-2020-36385 and CVE-2020-36386 was confused. That's
fixed now. And we have following new issues:

* 2021-06-13

CVE-2021-0129 -- Passkey Entry protocol of the Bluetooth Core is
vulnerable to an impersonation, fixed 4.9+

CVE-2021-0512 -- HID arrays, fixed 4.9+

CVE-2021-28691 -- Xen, fixed 5.10+

CVE-2021-3573 -- Bluetooth UAF, fixed 4.9+

* 2021-06-18

CVE-2021-32078 -- ARM: footbridge:, hopefully noone uses this

CVE-2021-34693 -- can: bcm: fix infoleak in struct bcm_msg_head

CVE-2020-36386 -- An issue was discovered in the Linux kernel before
5.8.1. net/bluetooth/hci_event.c has a slab out-of-bounds read in
hci_extended_inquiry_result_evt, aka CID-51c19bf3d5cf.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: New CVE entries this week

Pavel Machek
 

Hi!

CVE-2020-36385 -- An issue was discovered in the Linux kernel before 5.8.1. net/bluetooth/hci_event.c has a slab out-of-bounds read in hci_extended_inquiry_result_evt, aka CID-51c19bf3d5cf.
According to the CVE-2020-36385.yml it describes 'RDMA/ucma: Rework
ucma_migrate_id() to avoid races with destroy'. However According to
the CVE-2020-36385.yml it describes 'RDMA/ucma: Rework
ucma_migrate_id() to avoid races with destroy'. However, the
description of 'An issue was discovered in the Linux kernel before
5.8.1 ...' seems like CVE-2020-36386.
You are right, something went wrong with the import. It is corrected
now.

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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