Date   

[isar-cip-core][PATCH] kas/opt/ebg-secure-boot-*: Make Backports for OVMF version depended

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@...>

For Debian Buster we need to backport a new version of the OVMF package
with contains the necessary option for secureboot with qemu.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---

Changes since RFC:
- move back to ebg-secure-boot-snakeoil.yml

kas/opt/ebg-secure-boot-snakeoil.yml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 9f3eae9..5aa5eff 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -33,6 +33,7 @@ local_conf_header:
IMAGER_INSTALL += "ebg-secure-boot-snakeoil"

ovmf: |
- # snakeoil certs are only part of backports
- DISTRO_APT_SOURCES_append = " conf/distro/debian-buster-backports.list"
- DISTRO_APT_PREFERENCES_append = " conf/distro/preferences.ovmf-snakeoil.conf"
+ # snakeoil certs are only part of backports, for Debian 11 and later the are not necessary
+ OVERRIDES_append = ":${BASE_DISTRO_CODENAME}"
+ DISTRO_APT_SOURCES_append_buster = " conf/distro/debian-buster-backports.list"
+ DISTRO_APT_PREFERENCES_append_buster = " conf/distro/preferences.ovmf-snakeoil.conf"
--
2.34.1


[isar-cip-core][PATCH v2] Make read-only rootfs a inc file

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..9f3eae9 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml

-target: cip-core-image-read-only

local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS_append = " read-only.inc"
swupdate: |
IMAGE_INSTALL_append = " swupdate"
IMAGE_INSTALL_append = " swupdate-handler-roundrobin"

verity-img: |
SECURE_IMAGE_FSTYPE = "squashfs"
- VERITY_IMAGE_RECIPE = "cip-core-image-read-only"
IMAGE_TYPE = "secure-swupdate-img"
WKS_FILE = "${MACHINE}-efibootguard-secureboot.wks.in"

diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 2cecde3..9bf21ff 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -18,4 +18,5 @@ IMAGE_INSTALL += "customizations"

# for swupdate
SWU_DESCRIPTION ??= "swupdate"
-include ${SWU_DESCRIPTION}.inc
+CIP_IMAGE_OPTIONS ?= "${SWU_DESCRIPTION}.inc"
+include ${CIP_IMAGE_OPTIONS}
diff --git a/recipes-core/images/cip-core-image-read-only.bb b/recipes-core/images/read-only.inc
similarity index 78%
rename from recipes-core/images/cip-core-image-read-only.bb
rename to recipes-core/images/read-only.inc
index 79cd6bf..604caa0 100644
--- a/recipes-core/images/cip-core-image-read-only.bb
+++ b/recipes-core/images/read-only.inc
@@ -1,4 +1,13 @@
-require cip-core-image.bb
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2021
+#
+# Authors:
+# Quirin Gylstorff <Quriin.Gylstorff@...>
+#
+# SPDX-License-Identifier: MIT
+#

SQUASHFS_EXCLUDE_DIRS += "home var"

diff --git a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
index a7fbf5a..f0d2d68 100644
--- a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
+++ b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
@@ -24,7 +24,7 @@ TEMPLATE_VARS += "VERITY_BEHAVIOR_ON_CORRUPTION"

DEBIAN_DEPENDS = "initramfs-tools, cryptsetup"

-VERITY_IMAGE_RECIPE ?= "cip-core-image-read-only"
+VERITY_IMAGE_RECIPE ?= "cip-core-image"

VERITY_ENV_FILE = "${DEPLOY_DIR_IMAGE}/${VERITY_IMAGE_RECIPE}-${DISTRO}-${MACHINE}.verity.env"

diff --git a/start-qemu.sh b/start-qemu.sh
index 4ab3861..24df490 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -45,9 +45,6 @@ if [ -z "${TARGET_IMAGE}" ];then
if grep -s -q "IMAGE_SECURITY: true" .config.yaml; then
TARGET_IMAGE="cip-core-image-security"
fi
- if [ -n "${SECURE_BOOT}" ]; then
- TARGET_IMAGE="cip-core-image-read-only"
- fi
fi

case "$1" in
--
2.34.1


Re: [isar-cip-core][PATCH] Make read-only rootfs a inc file

Jan Kiszka
 

On 17.12.21 14:50, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..807b0d7 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml

-target: cip-core-image-read-only

local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS += "read-only.inc"
I think you want _append here to that the default assignment in
cip-core-image.bb also works.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


Re: [isar-cip-core][PATCH] Make read-only rootfs a inc file

Jan Kiszka
 

On 17.12.21 15:19, Jan Kiszka wrote:
On 17.12.21 14:50, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..807b0d7 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml

-target: cip-core-image-read-only

local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS += "read-only.inc"
swupdate: |
IMAGE_INSTALL_append = " swupdate"
IMAGE_INSTALL_append = " swupdate-handler-roundrobin"

verity-img: |
SECURE_IMAGE_FSTYPE = "squashfs"
- VERITY_IMAGE_RECIPE = "cip-core-image-read-only"
IMAGE_TYPE = "secure-swupdate-img"
WKS_FILE = "${MACHINE}-efibootguard-secureboot.wks.in"

diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 2cecde3..9bf21ff 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -18,4 +18,5 @@ IMAGE_INSTALL += "customizations"

# for swupdate
SWU_DESCRIPTION ??= "swupdate"
-include ${SWU_DESCRIPTION}.inc
+CIP_IMAGE_OPTIONS ?= "${SWU_DESCRIPTION}.inc"
+include ${CIP_IMAGE_OPTIONS}
diff --git a/recipes-core/images/cip-core-image-read-only.bb b/recipes-core/images/read-only.inc
similarity index 78%
rename from recipes-core/images/cip-core-image-read-only.bb
rename to recipes-core/images/read-only.inc
index 79cd6bf..604caa0 100644
--- a/recipes-core/images/cip-core-image-read-only.bb
+++ b/recipes-core/images/read-only.inc
@@ -1,4 +1,13 @@
-require cip-core-image.bb
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2021
+#
+# Authors:
+# Quirin Gylstorff <Quriin.Gylstorff@...>
+#
+# SPDX-License-Identifier: MIT
+#

SQUASHFS_EXCLUDE_DIRS += "home var"

diff --git a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
index a7fbf5a..f0d2d68 100644
--- a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
+++ b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
@@ -24,7 +24,7 @@ TEMPLATE_VARS += "VERITY_BEHAVIOR_ON_CORRUPTION"

DEBIAN_DEPENDS = "initramfs-tools, cryptsetup"

-VERITY_IMAGE_RECIPE ?= "cip-core-image-read-only"
+VERITY_IMAGE_RECIPE ?= "cip-core-image"

VERITY_ENV_FILE = "${DEPLOY_DIR_IMAGE}/${VERITY_IMAGE_RECIPE}-${DISTRO}-${MACHINE}.verity.env"

diff --git a/start-qemu.sh b/start-qemu.sh
index 4ab3861..24df490 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -45,9 +45,6 @@ if [ -z "${TARGET_IMAGE}" ];then
if grep -s -q "IMAGE_SECURITY: true" .config.yaml; then
TARGET_IMAGE="cip-core-image-security"
fi
- if [ -n "${SECURE_BOOT}" ]; then
- TARGET_IMAGE="cip-core-image-read-only"
- fi
fi

case "$1" in
Thanks, applied to next.
We have a regression, you already saw it. Dropping this, waiting for v2.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


Re: [isar-cip-core][RFC PATCH] kas/opt/ebg-secure-boot-*: Make Backports for OVMF version depended

Jan Kiszka
 

On 17.12.21 15:22, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>

For Debian Buster we need to backport a new version of the OVMF package
with contains the necessary option for secureboot with qemu.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-base.yml | 6 ++++++
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ----
2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/kas/opt/ebg-secure-boot-base.yml b/kas/opt/ebg-secure-boot-base.yml
index 8f769b6..5a3d751 100644
--- a/kas/opt/ebg-secure-boot-base.yml
+++ b/kas/opt/ebg-secure-boot-base.yml
@@ -19,3 +19,9 @@ local_conf_header:
IMAGE_INSTALL += "initramfs-abrootfs-secureboot"
SWU_DESCRIPTION = "secureboot"
SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG = "secureboot/swupdate.handler.${SWUPDATE_BOOTLOADER}.ini"
+
+ ovmf: |
+ # snakeoil certs are only part of backports, for Debian 11 and later the are not necessary
Why moving this block here? It talks about "snakeoil", but the related
file for that is below?

+ OVERRIDES_append = ":${BASE_DISTRO_CODENAME}"
+ DISTRO_APT_SOURCES_append_buster = " conf/distro/debian-buster-backports.list"
+ DISTRO_APT_PREFERENCES_append_buster = " conf/distro/preferences.ovmf-snakeoil.conf"
diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 807b0d7..9a3ff94 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -32,7 +32,3 @@ local_conf_header:
IMAGER_BUILD_DEPS += "ebg-secure-boot-snakeoil ovmf-binaries"
IMAGER_INSTALL += "ebg-secure-boot-snakeoil"

- ovmf: |
- # snakeoil certs are only part of backports
- DISTRO_APT_SOURCES_append = " conf/distro/debian-buster-backports.list"
- DISTRO_APT_PREFERENCES_append = " conf/distro/preferences.ovmf-snakeoil.conf"
Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


[isar-cip-core][RFC PATCH] kas/opt/ebg-secure-boot-*: Make Backports for OVMF version depended

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@...>

For Debian Buster we need to backport a new version of the OVMF package
with contains the necessary option for secureboot with qemu.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-base.yml | 6 ++++++
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ----
2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/kas/opt/ebg-secure-boot-base.yml b/kas/opt/ebg-secure-boot-base.yml
index 8f769b6..5a3d751 100644
--- a/kas/opt/ebg-secure-boot-base.yml
+++ b/kas/opt/ebg-secure-boot-base.yml
@@ -19,3 +19,9 @@ local_conf_header:
IMAGE_INSTALL += "initramfs-abrootfs-secureboot"
SWU_DESCRIPTION = "secureboot"
SWUPDATE_ROUND_ROBIN_HANDLER_CONFIG = "secureboot/swupdate.handler.${SWUPDATE_BOOTLOADER}.ini"
+
+ ovmf: |
+ # snakeoil certs are only part of backports, for Debian 11 and later the are not necessary
+ OVERRIDES_append = ":${BASE_DISTRO_CODENAME}"
+ DISTRO_APT_SOURCES_append_buster = " conf/distro/debian-buster-backports.list"
+ DISTRO_APT_PREFERENCES_append_buster = " conf/distro/preferences.ovmf-snakeoil.conf"
diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 807b0d7..9a3ff94 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -32,7 +32,3 @@ local_conf_header:
IMAGER_BUILD_DEPS += "ebg-secure-boot-snakeoil ovmf-binaries"
IMAGER_INSTALL += "ebg-secure-boot-snakeoil"

- ovmf: |
- # snakeoil certs are only part of backports
- DISTRO_APT_SOURCES_append = " conf/distro/debian-buster-backports.list"
- DISTRO_APT_PREFERENCES_append = " conf/distro/preferences.ovmf-snakeoil.conf"
--
2.34.1


Re: [isar-cip-core][PATCH] Make read-only rootfs a inc file

Jan Kiszka
 

On 17.12.21 14:50, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..807b0d7 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml

-target: cip-core-image-read-only

local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS += "read-only.inc"
swupdate: |
IMAGE_INSTALL_append = " swupdate"
IMAGE_INSTALL_append = " swupdate-handler-roundrobin"

verity-img: |
SECURE_IMAGE_FSTYPE = "squashfs"
- VERITY_IMAGE_RECIPE = "cip-core-image-read-only"
IMAGE_TYPE = "secure-swupdate-img"
WKS_FILE = "${MACHINE}-efibootguard-secureboot.wks.in"

diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 2cecde3..9bf21ff 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -18,4 +18,5 @@ IMAGE_INSTALL += "customizations"

# for swupdate
SWU_DESCRIPTION ??= "swupdate"
-include ${SWU_DESCRIPTION}.inc
+CIP_IMAGE_OPTIONS ?= "${SWU_DESCRIPTION}.inc"
+include ${CIP_IMAGE_OPTIONS}
diff --git a/recipes-core/images/cip-core-image-read-only.bb b/recipes-core/images/read-only.inc
similarity index 78%
rename from recipes-core/images/cip-core-image-read-only.bb
rename to recipes-core/images/read-only.inc
index 79cd6bf..604caa0 100644
--- a/recipes-core/images/cip-core-image-read-only.bb
+++ b/recipes-core/images/read-only.inc
@@ -1,4 +1,13 @@
-require cip-core-image.bb
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2021
+#
+# Authors:
+# Quirin Gylstorff <Quriin.Gylstorff@...>
+#
+# SPDX-License-Identifier: MIT
+#

SQUASHFS_EXCLUDE_DIRS += "home var"

diff --git a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
index a7fbf5a..f0d2d68 100644
--- a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
+++ b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
@@ -24,7 +24,7 @@ TEMPLATE_VARS += "VERITY_BEHAVIOR_ON_CORRUPTION"

DEBIAN_DEPENDS = "initramfs-tools, cryptsetup"

-VERITY_IMAGE_RECIPE ?= "cip-core-image-read-only"
+VERITY_IMAGE_RECIPE ?= "cip-core-image"

VERITY_ENV_FILE = "${DEPLOY_DIR_IMAGE}/${VERITY_IMAGE_RECIPE}-${DISTRO}-${MACHINE}.verity.env"

diff --git a/start-qemu.sh b/start-qemu.sh
index 4ab3861..24df490 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -45,9 +45,6 @@ if [ -z "${TARGET_IMAGE}" ];then
if grep -s -q "IMAGE_SECURITY: true" .config.yaml; then
TARGET_IMAGE="cip-core-image-security"
fi
- if [ -n "${SECURE_BOOT}" ]; then
- TARGET_IMAGE="cip-core-image-read-only"
- fi
fi

case "$1" in
Thanks, applied to next.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


Re: [isar-cip-core][PATCH] Make read-only rootfs a inc file

Quirin Gylstorff
 

On 12/17/21 14:53, Jan Kiszka wrote:
On 17.12.21 14:50, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..807b0d7 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml
-target: cip-core-image-read-only
local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS += "read-only.inc"
swupdate: |
IMAGE_INSTALL_append = " swupdate"
IMAGE_INSTALL_append = " swupdate-handler-roundrobin"
verity-img: |
SECURE_IMAGE_FSTYPE = "squashfs"
- VERITY_IMAGE_RECIPE = "cip-core-image-read-only"
IMAGE_TYPE = "secure-swupdate-img"
WKS_FILE = "${MACHINE}-efibootguard-secureboot.wks.in"
diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 2cecde3..9bf21ff 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -18,4 +18,5 @@ IMAGE_INSTALL += "customizations"
# for swupdate
SWU_DESCRIPTION ??= "swupdate"
-include ${SWU_DESCRIPTION}.inc
+CIP_IMAGE_OPTIONS ?= "${SWU_DESCRIPTION}.inc"
+include ${CIP_IMAGE_OPTIONS}
Is just
include
an valid bitbake statement? I think this is what will happen when
CIP_IMAGE_OPTIONS is empty, right?
It should not fail according to [1] and my testing.

[1]: https://www.yoctoproject.org/docs/1.6/bitbake-user-manual/bitbake-user-manual.html#include-directive

Quirin


diff --git a/recipes-core/images/cip-core-image-read-only.bb b/recipes-core/images/read-only.inc
similarity index 78%
rename from recipes-core/images/cip-core-image-read-only.bb
rename to recipes-core/images/read-only.inc
index 79cd6bf..604caa0 100644
--- a/recipes-core/images/cip-core-image-read-only.bb
+++ b/recipes-core/images/read-only.inc
@@ -1,4 +1,13 @@
-require cip-core-image.bb
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2021
+#
+# Authors:
+# Quirin Gylstorff <Quriin.Gylstorff@...>
+#
+# SPDX-License-Identifier: MIT
+#
SQUASHFS_EXCLUDE_DIRS += "home var"
diff --git a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
index a7fbf5a..f0d2d68 100644
--- a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
+++ b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
@@ -24,7 +24,7 @@ TEMPLATE_VARS += "VERITY_BEHAVIOR_ON_CORRUPTION"
DEBIAN_DEPENDS = "initramfs-tools, cryptsetup"
-VERITY_IMAGE_RECIPE ?= "cip-core-image-read-only"
+VERITY_IMAGE_RECIPE ?= "cip-core-image"
VERITY_ENV_FILE = "${DEPLOY_DIR_IMAGE}/${VERITY_IMAGE_RECIPE}-${DISTRO}-${MACHINE}.verity.env"
diff --git a/start-qemu.sh b/start-qemu.sh
index 4ab3861..24df490 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -45,9 +45,6 @@ if [ -z "${TARGET_IMAGE}" ];then
if grep -s -q "IMAGE_SECURITY: true" .config.yaml; then
TARGET_IMAGE="cip-core-image-security"
fi
- if [ -n "${SECURE_BOOT}" ]; then
- TARGET_IMAGE="cip-core-image-read-only"
- fi
fi
case "$1" in
Otherwise, helpful cleanup.
Jan


Re: [isar-cip-core][PATCH] Make read-only rootfs a inc file

Jan Kiszka
 

On 17.12.21 14:50, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..807b0d7 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml

-target: cip-core-image-read-only

local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS += "read-only.inc"
swupdate: |
IMAGE_INSTALL_append = " swupdate"
IMAGE_INSTALL_append = " swupdate-handler-roundrobin"

verity-img: |
SECURE_IMAGE_FSTYPE = "squashfs"
- VERITY_IMAGE_RECIPE = "cip-core-image-read-only"
IMAGE_TYPE = "secure-swupdate-img"
WKS_FILE = "${MACHINE}-efibootguard-secureboot.wks.in"

diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 2cecde3..9bf21ff 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -18,4 +18,5 @@ IMAGE_INSTALL += "customizations"

# for swupdate
SWU_DESCRIPTION ??= "swupdate"
-include ${SWU_DESCRIPTION}.inc
+CIP_IMAGE_OPTIONS ?= "${SWU_DESCRIPTION}.inc"
+include ${CIP_IMAGE_OPTIONS}
Is just

include

an valid bitbake statement? I think this is what will happen when
CIP_IMAGE_OPTIONS is empty, right?

diff --git a/recipes-core/images/cip-core-image-read-only.bb b/recipes-core/images/read-only.inc
similarity index 78%
rename from recipes-core/images/cip-core-image-read-only.bb
rename to recipes-core/images/read-only.inc
index 79cd6bf..604caa0 100644
--- a/recipes-core/images/cip-core-image-read-only.bb
+++ b/recipes-core/images/read-only.inc
@@ -1,4 +1,13 @@
-require cip-core-image.bb
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2021
+#
+# Authors:
+# Quirin Gylstorff <Quriin.Gylstorff@...>
+#
+# SPDX-License-Identifier: MIT
+#

SQUASHFS_EXCLUDE_DIRS += "home var"

diff --git a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
index a7fbf5a..f0d2d68 100644
--- a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
+++ b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
@@ -24,7 +24,7 @@ TEMPLATE_VARS += "VERITY_BEHAVIOR_ON_CORRUPTION"

DEBIAN_DEPENDS = "initramfs-tools, cryptsetup"

-VERITY_IMAGE_RECIPE ?= "cip-core-image-read-only"
+VERITY_IMAGE_RECIPE ?= "cip-core-image"

VERITY_ENV_FILE = "${DEPLOY_DIR_IMAGE}/${VERITY_IMAGE_RECIPE}-${DISTRO}-${MACHINE}.verity.env"

diff --git a/start-qemu.sh b/start-qemu.sh
index 4ab3861..24df490 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -45,9 +45,6 @@ if [ -z "${TARGET_IMAGE}" ];then
if grep -s -q "IMAGE_SECURITY: true" .config.yaml; then
TARGET_IMAGE="cip-core-image-security"
fi
- if [ -n "${SECURE_BOOT}" ]; then
- TARGET_IMAGE="cip-core-image-read-only"
- fi
fi

case "$1" in
Otherwise, helpful cleanup.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


[isar-cip-core][PATCH] Make read-only rootfs a inc file

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@...>

This allows downstream recipes to include the kas option
and use the include as base without recreating some parts
of the recipes.

Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...>
---
kas/opt/ebg-secure-boot-snakeoil.yml | 4 ++--
recipes-core/images/cip-core-image.bb | 3 ++-
.../{cip-core-image-read-only.bb => read-only.inc} | 11 ++++++++++-
.../initramfs-verity-hook_0.1.bb | 2 +-
start-qemu.sh | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
rename recipes-core/images/{cip-core-image-read-only.bb => read-only.inc} (78%)

diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index 1cfbacc..807b0d7 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -14,16 +14,16 @@ header:
includes:
- kas/opt/ebg-secure-boot-base.yml

-target: cip-core-image-read-only

local_conf_header:
+ image-options: |
+ CIP_IMAGE_OPTIONS += "read-only.inc"
swupdate: |
IMAGE_INSTALL_append = " swupdate"
IMAGE_INSTALL_append = " swupdate-handler-roundrobin"

verity-img: |
SECURE_IMAGE_FSTYPE = "squashfs"
- VERITY_IMAGE_RECIPE = "cip-core-image-read-only"
IMAGE_TYPE = "secure-swupdate-img"
WKS_FILE = "${MACHINE}-efibootguard-secureboot.wks.in"

diff --git a/recipes-core/images/cip-core-image.bb b/recipes-core/images/cip-core-image.bb
index 2cecde3..9bf21ff 100644
--- a/recipes-core/images/cip-core-image.bb
+++ b/recipes-core/images/cip-core-image.bb
@@ -18,4 +18,5 @@ IMAGE_INSTALL += "customizations"

# for swupdate
SWU_DESCRIPTION ??= "swupdate"
-include ${SWU_DESCRIPTION}.inc
+CIP_IMAGE_OPTIONS ?= "${SWU_DESCRIPTION}.inc"
+include ${CIP_IMAGE_OPTIONS}
diff --git a/recipes-core/images/cip-core-image-read-only.bb b/recipes-core/images/read-only.inc
similarity index 78%
rename from recipes-core/images/cip-core-image-read-only.bb
rename to recipes-core/images/read-only.inc
index 79cd6bf..604caa0 100644
--- a/recipes-core/images/cip-core-image-read-only.bb
+++ b/recipes-core/images/read-only.inc
@@ -1,4 +1,13 @@
-require cip-core-image.bb
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2021
+#
+# Authors:
+# Quirin Gylstorff <Quriin.Gylstorff@...>
+#
+# SPDX-License-Identifier: MIT
+#

SQUASHFS_EXCLUDE_DIRS += "home var"

diff --git a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
index a7fbf5a..f0d2d68 100644
--- a/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
+++ b/recipes-initramfs/initramfs-verity-hook/initramfs-verity-hook_0.1.bb
@@ -24,7 +24,7 @@ TEMPLATE_VARS += "VERITY_BEHAVIOR_ON_CORRUPTION"

DEBIAN_DEPENDS = "initramfs-tools, cryptsetup"

-VERITY_IMAGE_RECIPE ?= "cip-core-image-read-only"
+VERITY_IMAGE_RECIPE ?= "cip-core-image"

VERITY_ENV_FILE = "${DEPLOY_DIR_IMAGE}/${VERITY_IMAGE_RECIPE}-${DISTRO}-${MACHINE}.verity.env"

diff --git a/start-qemu.sh b/start-qemu.sh
index 4ab3861..24df490 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -45,9 +45,6 @@ if [ -z "${TARGET_IMAGE}" ];then
if grep -s -q "IMAGE_SECURITY: true" .config.yaml; then
TARGET_IMAGE="cip-core-image-security"
fi
- if [ -n "${SECURE_BOOT}" ]; then
- TARGET_IMAGE="cip-core-image-read-only"
- fi
fi

case "$1" in
--
2.34.1


Re: [PATCH 5.10.y-cip 23/24] clk: renesas: rzg2l: Add support to handle coupled clocks

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 17 December 2021 10:38
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 23/24] clk: renesas: rzg2l: Add support to handle coupled clocks

Hi!

From: Biju Das <biju.das.jz@...>

commit 32897e6fff196a5de4981030466ae391dfe56c7b upstream.

The AXI and CHI clocks use the same register bit for controlling clock
output. Add a new clock type for coupled clocks, which sets the
CPG_CLKON_ETH.CLK[01]_ON bit when at least one clock is enabled, and
clears the bit only when both clocks are disabled.
So the clocks can have different properties (frequency?), but can only be enabled/disabled together?
So we can't handle them as one clock?
Since there are two clock lines going to the IP with different parents and just one bit to handle this, for this reason its implemented as coupled clock.

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 11/24] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 17 December 2021 10:19
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 11/24] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's

Hi!

commit 68a45525297b2e9afbd9bba807ddd2c9f69beee6 upstream.

Add initial DTSI for RZ/G2{L,LC} SoC's.

File structure:
r9a07g044.dtsi => RZ/G2L family SoC common parts r9a07g044l1.dtsi =>
RZ/G2L R9A07G044L1 SoC specific parts r9a07g044l2.dtsi => RZ/G2L
R9A07G044L2 SoC specific parts
I just want to double check:

+ scif0: serial@1004b800 {
+ compatible = "renesas,scif-r9a07g044";
+ reg = <0 0x1004b800 0 0x400>;
+ interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi",
+ "bri", "dri", "tei";
Are the last two interrupts supposed to be same?
Yes, as "dri" and "tei" share the interrupt.

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 05/24] clk: renesas: Add CPG core wrapper for RZ/G2L SoC

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 17 December 2021 10:11
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 05/24] clk: renesas: Add CPG core wrapper for RZ/G2L SoC

Hi!

commit ef3c613ccd68a78727b817c3dacf4a68d1ffc67f upstream.

Add CPG core wrapper for RZ/G2L family.

Based on a patch in the BSP by Binh Nguyen
<binh.nguyen.jz@...>.
Some comments below.

+static struct clk * __init
+rzg2l_cpg_pll_clk_register(const struct cpg_core_clk *core,
...
+ pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL);
+ if (!pll_clk) {
+ clk = ERR_PTR(-ENOMEM);
+ return NULL;
+ }
I believe this wanted to return clk? But I'd recommend just directly returning the ERR_PTR().
The later patches do return ERR_PTR(-ENOMEM);

+static struct clk
+*rzg2l_cpg_clk_src_twocell_get(struct of_phandle_args *clkspec,
+ void *data)
...
+ if (IS_ERR(clk))
+ dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx,
+ PTR_ERR(clk));
Is "\n" missing?
Will fix that upstream.

+static void __init
+rzg2l_cpg_register_mod_clk(const struct rzg2l_mod_clk *mod,
+ const struct rzg2l_cpg_info *info,
+ struct rzg2l_cpg_priv *priv)
+{
+ struct mstp_clock *clock = NULL;
...
+ parent = priv->clks[mod->parent];
+ if (IS_ERR(parent)) {
+ clk = parent;
+ goto fail;
+ }
+
+ clock = devm_kzalloc(dev, sizeof(*clock), GFP_KERNEL);
+ if (!clock) {
+ clk = ERR_PTR(-ENOMEM);
+ goto fail;
+ }
...
+fail:
+ dev_err(dev, "Failed to register %s clock %s: %ld\n", "module",
+ mod->name, PTR_ERR(clk));
+ kfree(clock);
Should this be devm_kfree? (And is devm_kfree(NULL) ok?)
Agreed will fix that upstream and backport later. Yes devm_kfree(NULL) is OK see [0]

+static bool rzg2l_cpg_is_pm_clk(const struct of_phandle_args
+*clkspec) {
+ if (clkspec->args_count != 2)
+ return false;
+
+ switch (clkspec->args[0]) {
+ case CPG_MOD:
+ return true;
+
+ default:
+ return false;
+ }
+}
"return clkspec->args[0] == CPG_MOD" would be simpler way to say this.
Agreed.

+static int __init rzg2l_cpg_probe(struct platform_device *pdev) {
...
+ error = rzg2l_cpg_reset_controller_register(priv);
+ if (error)
+ return error;
+
+ return 0;
+}
You can just return error unconditionally.
Agreed.

+static const struct of_device_id rzg2l_cpg_match[] = {
+ { /* sentinel */ }
+};
It matches nothing? Aha, id is added in next patch.

+/**
+ * Definitions of CPG Core Clocks
+ *
+ * These include:
+ * - Clock outputs exported to DT
+ * - External input clocks
+ * - Internal CPG clocks
+ */
This is not kerneldoc -> should not be marked with /**.
Agreed.

[0] https://elixir.bootlin.com/linux/v5.16-rc5/source/drivers/base/devres.c#L1053

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 00/24] Add CPG and initial DTS/I for Renesas RZ/G2L SoC + SMARC EVK

Pavel Machek
 

Hi!

This patch series adds the following:
* Serial support
* Clock support
* Initial RZ/G2L SoC DTSI
- CPU
- CPG
- GIC
* Initial device tree for RZ/G2L SMARC EVK
- memory
- External input clock
- SCIF

All the patches have been cherry picked from 5.16-rc5. For testing purpose
MR [0] can be used.
I will check this series, and I am also checking the build.

https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/431663140
Thank you. I checked the series and only found some details (some of
them were fixed later in the series). I believe we can apply it.

Reviewed-by: Pavel Machek <pavel@...>
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 23/24] clk: renesas: rzg2l: Add support to handle coupled clocks

Pavel Machek
 

Hi!

From: Biju Das <biju.das.jz@...>

commit 32897e6fff196a5de4981030466ae391dfe56c7b upstream.

The AXI and CHI clocks use the same register bit for controlling clock
output. Add a new clock type for coupled clocks, which sets the
CPG_CLKON_ETH.CLK[01]_ON bit when at least one clock is enabled, and
clears the bit only when both clocks are disabled.
So the clocks can have different properties (frequency?), but can only
be enabled/disabled together? So we can't handle them as one clock?

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 11/24] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's

Pavel Machek
 

Hi!

commit 68a45525297b2e9afbd9bba807ddd2c9f69beee6 upstream.

Add initial DTSI for RZ/G2{L,LC} SoC's.

File structure:
r9a07g044.dtsi => RZ/G2L family SoC common parts
r9a07g044l1.dtsi => RZ/G2L R9A07G044L1 SoC specific parts
r9a07g044l2.dtsi => RZ/G2L R9A07G044L2 SoC specific parts
I just want to double check:

+ scif0: serial@1004b800 {
+ compatible = "renesas,scif-r9a07g044";
+ reg = <0 0x1004b800 0 0x400>;
+ interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eri", "rxi", "txi",
+ "bri", "dri", "tei";
Are the last two interrupts supposed to be same?

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 05/24] clk: renesas: Add CPG core wrapper for RZ/G2L SoC

Pavel Machek
 

Hi!

commit ef3c613ccd68a78727b817c3dacf4a68d1ffc67f upstream.

Add CPG core wrapper for RZ/G2L family.

Based on a patch in the BSP by Binh Nguyen
<binh.nguyen.jz@...>.
Some comments below.

+static struct clk * __init
+rzg2l_cpg_pll_clk_register(const struct cpg_core_clk *core,
...
+ pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL);
+ if (!pll_clk) {
+ clk = ERR_PTR(-ENOMEM);
+ return NULL;
+ }
I believe this wanted to return clk? But I'd recommend just directly
returning the ERR_PTR().

+static struct clk
+*rzg2l_cpg_clk_src_twocell_get(struct of_phandle_args *clkspec,
+ void *data)
...
+ if (IS_ERR(clk))
+ dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx,
+ PTR_ERR(clk));
Is "\n" missing?

+static void __init
+rzg2l_cpg_register_mod_clk(const struct rzg2l_mod_clk *mod,
+ const struct rzg2l_cpg_info *info,
+ struct rzg2l_cpg_priv *priv)
+{
+ struct mstp_clock *clock = NULL;
...
+ parent = priv->clks[mod->parent];
+ if (IS_ERR(parent)) {
+ clk = parent;
+ goto fail;
+ }
+
+ clock = devm_kzalloc(dev, sizeof(*clock), GFP_KERNEL);
+ if (!clock) {
+ clk = ERR_PTR(-ENOMEM);
+ goto fail;
+ }
...
+fail:
+ dev_err(dev, "Failed to register %s clock %s: %ld\n", "module",
+ mod->name, PTR_ERR(clk));
+ kfree(clock);
Should this be devm_kfree? (And is devm_kfree(NULL) ok?)

+static bool rzg2l_cpg_is_pm_clk(const struct of_phandle_args *clkspec)
+{
+ if (clkspec->args_count != 2)
+ return false;
+
+ switch (clkspec->args[0]) {
+ case CPG_MOD:
+ return true;
+
+ default:
+ return false;
+ }
+}
"return clkspec->args[0] == CPG_MOD" would be simpler way to say this.

+static int __init rzg2l_cpg_probe(struct platform_device *pdev)
+{
...
+ error = rzg2l_cpg_reset_controller_register(priv);
+ if (error)
+ return error;
+
+ return 0;
+}
You can just return error unconditionally.

+static const struct of_device_id rzg2l_cpg_match[] = {
+ { /* sentinel */ }
+};
It matches nothing? Aha, id is added in next patch.

+/**
+ * Definitions of CPG Core Clocks
+ *
+ * These include:
+ * - Clock outputs exported to DT
+ * - External input clocks
+ * - Internal CPG clocks
+ */
This is not kerneldoc -> should not be marked with /**.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 00/24] Add CPG and initial DTS/I for Renesas RZ/G2L SoC + SMARC EVK

Nobuhiro Iwamatsu
 

Hi Prabhakar,

This patch series adds the following:
* Serial support
* Clock support
* Initial RZ/G2L SoC DTSI
- CPU
- CPG
- GIC
* Initial device tree for RZ/G2L SMARC EVK
- memory
- External input clock
- SCIF

All the patches have been cherry picked from 5.16-rc5. For testing purpose
MR [0] can be used.
I will check this series, and I am also checking the build.
https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/431663140

Best regards,
Nobuhiro

________________________________________
差出人: cip-dev@... <cip-dev@...> が Lad Prabhakar <prabhakar.mahadev-lad.rj@...> の代理で送信
送信日時: 2021年12月16日 21:54
宛先: cip-dev@...; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT); Pavel Machek
CC: Biju Das
件名: [cip-dev] [PATCH 5.10.y-cip 00/24] Add CPG and initial DTS/I for Renesas RZ/G2L SoC + SMARC EVK

Hi All,

This patch series adds the following:
* Serial support
* Clock support
* Initial RZ/G2L SoC DTSI
- CPU
- CPG
- GIC
* Initial device tree for RZ/G2L SMARC EVK
- memory
- External input clock
- SCIF

All the patches have been cherry picked from 5.16-rc5. For testing purpose
MR [0] can be used.

[0] https://gitlab.com/cip-project/cip-kernel/
cip-kernel-config/-/merge_requests/52

Cheers,
Prabhakar

Biju Das (9):
serial: sh-sci: Add support for RZ/G2L SoC
clk: renesas: r9a07g044: Rename divider table
clk: renesas: r9a07g044: Fix P1 Clock
clk: renesas: r9a07g044: Add P2 Clock support
clk: renesas: rzg2l: Add multi clock PM support
dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions
clk: renesas: rzg2l: Add support to handle MUX clocks
clk: renesas: rzg2l: Add support to handle coupled clocks
clk: renesas: rzg2l: Fix clk status function

Dan Carpenter (2):
clk: renesas: rzg2l: Fix a double free on error
clk: renesas: rzg2l: Avoid mixing error pointers and NULL

Dmitry Baryshkov (1):
clk: mux: provide devm_clk_hw_register_mux()

Geert Uytterhoeven (1):
clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch]

Lad Prabhakar (9):
dt-bindings: serial: renesas,scif: Document r9a07g044 bindings
dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver
dt-bindings: clock: Add r9a07g044 CPG Clock Definitions
clk: renesas: Add CPG core wrapper for RZ/G2L SoC
clk: renesas: Add support for R9A07G044 SoC
arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's
arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK
arm64: dts: renesas: r9a07g044: Add SYSC node
clk: renesas: rzg2l: Fix off-by-one check in
rzg2l_cpg_clk_src_twocell_get()

Yang Li (2):
clk: renesas: rzg2l: Remove unneeded semicolon
clk: renesas: rzg2l: Fix return value and unused assignment

.../bindings/clock/renesas,rzg2l-cpg.yaml | 83 ++
.../bindings/serial/renesas,scif.yaml | 4 +
arch/arm64/boot/dts/renesas/Makefile | 2 +
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 132 +++
arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi | 25 +
.../boot/dts/renesas/r9a07g044l2-smarc.dts | 21 +
arch/arm64/boot/dts/renesas/r9a07g044l2.dtsi | 13 +
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 27 +
drivers/clk/clk-mux.c | 35 +
drivers/clk/renesas/Kconfig | 9 +
drivers/clk/renesas/Makefile | 2 +
drivers/clk/renesas/r9a07g044-cpg.c | 142 +++
drivers/clk/renesas/rzg2l-cpg.c | 844 ++++++++++++++++++
drivers/clk/renesas/rzg2l-cpg.h | 176 ++++
drivers/tty/serial/sh-sci.c | 12 +-
drivers/tty/serial/sh-sci.h | 1 +
include/dt-bindings/clock/r9a07g044-cpg.h | 219 +++++
include/linux/clk-provider.h | 13 +
18 files changed, 1759 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l2.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
create mode 100644 drivers/clk/renesas/r9a07g044-cpg.c
create mode 100644 drivers/clk/renesas/rzg2l-cpg.c
create mode 100644 drivers/clk/renesas/rzg2l-cpg.h
create mode 100644 include/dt-bindings/clock/r9a07g044-cpg.h

--
2.17.1


Re: [PATCH v3] swupdate: Add nodoc for buster and bullseye

Jan Kiszka
 

On 16.12.21 17:48, Vijai Kumar K wrote:
Including documentation makes the build fail in buster and bullseye.
Remove it.

Signed-off-by: Vijai Kumar K <Vijaikumar_Kanagarajan@...>
---
recipes-core/swupdate/swupdate_2021.04-1+debian-gbp.bb | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/recipes-core/swupdate/swupdate_2021.04-1+debian-gbp.bb b/recipes-core/swupdate/swupdate_2021.04-1+debian-gbp.bb
index a4d67fe..e25ee4c 100644
--- a/recipes-core/swupdate/swupdate_2021.04-1+debian-gbp.bb
+++ b/recipes-core/swupdate/swupdate_2021.04-1+debian-gbp.bb
@@ -44,12 +44,14 @@ SWUPDATE_BUILD_PROFILES += "cross nocheck"
# modify for debian buster build
SRC_URI_append_buster = " file://0009-debian-prepare-build-for-isar-debian-buster.patch"

-# disable documentation due to missing packages in debian buster
+# disable documentation due to missing packages
+SWUPDATE_BUILD_PROFILES_append = " nodoc "
+
# disable create filesystem due to missing symbols in debian buster
# disable webserver due to missing symbols in debian buster
-SWUPDATE_BUILD_PROFILES_append_buster = " nodoc \
- pkg.swupdate.nocreatefs \
- pkg.swupdate.nowebserver "
+SWUPDATE_BUILD_PROFILES_append_buster = " \
+ pkg.swupdate.nocreatefs \
+ pkg.swupdate.nowebserver "
# In debian buster the git-compression defaults to gz and does not detect other
# compression formats.
GBP_EXTRA_OPTIONS += "--git-compression=xz"
Thanks, applied.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK

Nobuhiro Iwamatsu
 

Hi Chris,

We are planning to propose it as a CIP reference board and we plan to add some hardware to the CIP's LAVA infrastructure.
If the board is not accepted as a CIP reference board, we would still like to add support for it in the CIP Kernel as we have done for other non-reference boards such as the iWave RZ/G1E, HiHope RZ/G2H boards etc.
I see. Thanks for the explanation.

Best regards,
Nobuhiro
________________________________________
差出人: Chris Paterson <Chris.Paterson2@...>
送信日時: 2021年12月16日 18:52
宛先: iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT); cip-dev@...; Prabhakar Mahadev Lad
CC: pavel@...; Biju Das
件名: RE: [cip-dev] [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK

Hello,

From: nobuhiro1.iwamatsu@...
<nobuhiro1.iwamatsu@...>
Sent: 16 December 2021 00:40

Hi all,

I have reviewed patches and they look okay to me. I'll proceed with
testing.

Do we have suitable board in the test lab / is there plan to add one?
We don't have any boards in the CIP labs yet, but there is a plan to add
some.

I think I need to add the board to LAB first. Of course, source code reviews
and
build tests are possible.
And If my understand is correctoly, I think this is a new board that is not on
the
reference board list. I don't think this has been discussed at TSC.
I think it needs to be on the agenda at TSC, whether it's a reference board for
the 5.10-cip kernel.
We are planning to propose it as a CIP reference board and we plan to add some hardware to the CIP's LAVA infrastructure.
If the board is not accepted as a CIP reference board, we would still like to add support for it in the CIP Kernel as we have done for other non-reference boards such as the iWave RZ/G1E, HiHope RZ/G2H boards etc.

Kind regards, Chris

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