Date   

[RESEND PATCH 5.10.y-cip 13/40] mmc: renesas_sdhi: populate hook for longer busy_wait

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit b191deced78a12e26a827db03745b0da6cbc4f0e upstream.

Make use of the EXTOP bit in R-Car Gen3 SoCs to have a twice as large
busy wait duration.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201125213001.15003-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 20 ++++++++++++++++++++
drivers/mmc/host/tmio_mmc.h | 2 ++
2 files changed, 22 insertions(+)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 980c50b9226e..8306a5b5b06e 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -561,6 +561,7 @@ static int renesas_sdhi_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_io
static void renesas_sdhi_reset(struct tmio_mmc_host *host)
{
struct renesas_sdhi *priv = host_to_priv(host);
+ u16 val;

if (priv->scc_ctl) {
renesas_sdhi_disable_scc(host->mmc);
@@ -573,6 +574,21 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
}

sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_INIT_RCAR2);
+
+ if (sd_ctrl_read16(host, CTL_VERSION) >= SDHI_VER_GEN3_SD) {
+ val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
+ val |= CARD_OPT_EXTOP;
+ sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, val);
+ }
+}
+
+static unsigned int renesas_sdhi_gen3_get_cycles(struct tmio_mmc_host *host)
+{
+ u16 num, val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
+
+ num = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
+ return 1 << ((val & CARD_OPT_EXTOP ? 14 : 13) + num);
+
}

#define SH_MOBILE_SDHI_MIN_TAP_ROW 3
@@ -1072,6 +1088,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
quirks->hs400_calib_table + 1);
}

+ /* these have an EXTOP bit */
+ if (ver >= SDHI_VER_GEN3_SD)
+ host->get_timeout_cycles = renesas_sdhi_gen3_get_cycles;
+
/* Enable tuning iff we have an SCC and a supported mode */
if (of_data && of_data->scc_offset &&
(host->mmc->caps & MMC_CAP_UHS_SDR104 ||
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index f60559bc413a..784fa6ed5843 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -82,7 +82,9 @@
/* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
#define CARD_OPT_TOP_MASK 0xf0
#define CARD_OPT_TOP_SHIFT 4
+#define CARD_OPT_EXTOP BIT(9) /* first appeared on R-Car Gen3 SDHI */
#define CARD_OPT_WIDTH8 BIT(13)
+#define CARD_OPT_ALWAYS1 BIT(14)
#define CARD_OPT_WIDTH BIT(15)

/* Definitions for values the CTL_SDIO_STATUS register can take */
--
2.17.1


[RESEND PATCH 5.10.y-cip 12/40] mmc: tmio: add hook for custom busy_wait calculation

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 58959f89dd3d8cc8bedcd2d665496603098b29a2 upstream.

Newer SDHI variants can 'wait while busy' longer than the generic TMIO.
Provide a hook to get the maximum cycle count to wait for. If the hook
is not populated, fall back to a generic version which works well with
all older TMIO/SDHI variants.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201125213001.15003-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/tmio_mmc.h | 1 +
drivers/mmc/host/tmio_mmc_core.c | 17 ++++++++++++-----
2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 819198af17f4..f60559bc413a 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -181,6 +181,7 @@ struct tmio_mmc_host {
void (*reset)(struct tmio_mmc_host *host);
bool (*check_retune)(struct tmio_mmc_host *host);
void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
+ unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);

void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
void (*hs400_downgrade)(struct tmio_mmc_host *host);
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index a896595cf575..85dc5b9f4e60 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -885,16 +885,20 @@ static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
}

-static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
+static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
{
u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
- unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
- unsigned int cycles;

val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
- cycles = 1 << (13 + val);
+ return 1 << (13 + val);
+}
+
+static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
+{
+ unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;

- host->mmc->max_busy_timeout = cycles / (clk_rate / MSEC_PER_SEC);
+ host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
+ (clk_rate / MSEC_PER_SEC);
}

/* Set MMC clock / power.
@@ -1114,6 +1118,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
_host->write16_hook = NULL;

+ if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
+ _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
+
_host->set_pwr = pdata->set_pwr;

ret = tmio_mmc_init_ocr(_host);
--
2.17.1


[RESEND PATCH 5.10.y-cip 11/40] mmc: tmio: set max_busy_timeout

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 30ae3e13caeaa47884c222ebf5711ce27ed25f19 upstream.

Set max_busy_timeouts for variants known to support the TOPxx bits in
the SD_OPTION register. The timeout mechanism was running in the
background but not yet properly handled in the driver. So, let the MMC
core know when to not use R1B to avoid unhandled timeouts.

My datasheets for older variants (tmio_mmc.c) suggest that they support
it, too. However, actual bit descriptions are lacking, so I chose an
opt-in approach.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201125213001.15003-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 3 +++
drivers/mmc/host/tmio_mmc.h | 2 ++
drivers/mmc/host/tmio_mmc_core.c | 15 +++++++++++++++
drivers/mmc/host/uniphier-sd.c | 1 +
include/linux/mfd/tmio.h | 7 ++++++-
5 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 751e21243ebf..980c50b9226e 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -1046,6 +1046,9 @@ int renesas_sdhi_probe(struct platform_device *pdev,
/* All SDHI have SDIO status bits which must be 1 */
mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;

+ /* All SDHI support HW busy detection */
+ mmc_data->flags |= TMIO_MMC_USE_BUSY_TIMEOUT;
+
dev_pm_domain_start(&pdev->dev);

ret = renesas_sdhi_clk_enable(host);
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 7ff41185896a..819198af17f4 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -80,6 +80,8 @@
#define CLK_CTL_SCLKEN BIT(8)

/* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
+#define CARD_OPT_TOP_MASK 0xf0
+#define CARD_OPT_TOP_SHIFT 4
#define CARD_OPT_WIDTH8 BIT(13)
#define CARD_OPT_WIDTH BIT(15)

diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index ac4e7874a3f1..a896595cf575 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -885,6 +885,18 @@ static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
}

+static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
+{
+ u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
+ unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
+ unsigned int cycles;
+
+ val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
+ cycles = 1 << (13 + val);
+
+ host->mmc->max_busy_timeout = cycles / (clk_rate / MSEC_PER_SEC);
+}
+
/* Set MMC clock / power.
* Note: This controller uses a simple divider scheme therefore it cannot
* run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
@@ -943,6 +955,9 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
break;
}

+ if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
+ tmio_mmc_max_busy_timeout(host);
+
/* Let things settle. delay taken from winCE driver */
usleep_range(140, 200);
if (PTR_ERR(host->mrq) == -EINTR)
diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c
index 196e94bf37f0..73d5bebd0f33 100644
--- a/drivers/mmc/host/uniphier-sd.c
+++ b/drivers/mmc/host/uniphier-sd.c
@@ -586,6 +586,7 @@ static int uniphier_sd_probe(struct platform_device *pdev)

tmio_data = &priv->tmio_data;
tmio_data->flags |= TMIO_MMC_32BIT_DATA_PORT;
+ tmio_data->flags |= TMIO_MMC_USE_BUSY_TIMEOUT;

host = tmio_mmc_host_alloc(pdev, tmio_data);
if (IS_ERR(host))
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 8ba042430d8e..27264fe4b3b9 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -55,7 +55,12 @@
*/
#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)

-/* BIT(5) is unused */
+/*
+ * Use the busy timeout feature. Probably all TMIO versions support it. Yet,
+ * we don't have documentation for old variants, so we enable only known good
+ * variants with this flag. Can be removed once all variants are known good.
+ */
+#define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5)

/*
* Some controllers have CMD12 automatically
--
2.17.1


[RESEND PATCH 5.10.y-cip 10/40] mmc: renesas_sdhi: sort includes

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit ab07a1356043f07142ba351253904ef8c42ecd4f upstream.

Better prevent double includes.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201111100244.15823-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index c061c68c41d1..751e21243ebf 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -18,22 +18,22 @@
*
*/

-#include <linux/kernel.h>
#include <linux/clk.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/slot-gpio.h>
-#include <linux/mfd/tmio.h>
-#include <linux/sh_dma.h>
-#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinctrl-state.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
#include <linux/regulator/consumer.h>
+#include <linux/sh_dma.h>
+#include <linux/slab.h>
#include <linux/sys_soc.h>

#include "renesas_sdhi.h"
--
2.17.1


[RESEND PATCH 5.10.y-cip 09/40] mmc: renesas_sdhi: don't hardcode SDIF values

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 0e08a411585214360938022ca3f50a9f1cd91753 upstream.

Use a macro to name the hardcoded values. Also, move the SDIF register
definition into the SDHI driver because this is an SDHI extension.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201111100244.15823-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 7 +++++--
drivers/mmc/host/tmio_mmc.h | 1 -
2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 0d46896176c6..c061c68c41d1 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -49,6 +49,9 @@
#define HOST_MODE_GEN3_32BIT (HOST_MODE_GEN3_WMODE | HOST_MODE_GEN3_BUSWIDTH)
#define HOST_MODE_GEN3_64BIT 0

+#define CTL_SDIF_MODE 0xe6
+#define SDIF_MODE_HS400 BIT(0)
+
#define SDHI_VER_GEN2_SDR50 0x490c
#define SDHI_VER_RZ_A1 0x820b
/* very old datasheets said 0x490c for SDR104, too. They are wrong! */
@@ -381,7 +384,7 @@ static void renesas_sdhi_hs400_complete(struct mmc_host *mmc)
sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));

/* Set HS400 mode */
- sd_ctrl_write16(host, CTL_SDIF_MODE, 0x0001 |
+ sd_ctrl_write16(host, CTL_SDIF_MODE, SDIF_MODE_HS400 |
sd_ctrl_read16(host, CTL_SDIF_MODE));

sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,
@@ -529,7 +532,7 @@ static void renesas_sdhi_reset_hs400_mode(struct tmio_mmc_host *host,
sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));

/* Reset HS400 mode */
- sd_ctrl_write16(host, CTL_SDIF_MODE, ~0x0001 &
+ sd_ctrl_write16(host, CTL_SDIF_MODE, ~SDIF_MODE_HS400 &
sd_ctrl_read16(host, CTL_SDIF_MODE));

sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos);
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 9546e542619c..7ff41185896a 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -42,7 +42,6 @@
#define CTL_DMA_ENABLE 0xd8
#define CTL_RESET_SD 0xe0
#define CTL_VERSION 0xe2
-#define CTL_SDIF_MODE 0xe6

/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
#define TMIO_STOP_STP BIT(0)
--
2.17.1


[RESEND PATCH 5.10.y-cip 08/40] mmc: renesas_sdhi: improve HOST_MODE usage

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 4533c3eb893d8d6881f792a855fa5e11d5ddf0c2 upstream.

HOST_MODE should have a CTL_ prefix, too. This makes the code more
readable because we immediately know what it is. Also, remove the
hardcoded values with something readable, too.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201111100244.15823-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index eb33bbf368e5..0d46896176c6 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -39,7 +39,15 @@
#include "renesas_sdhi.h"
#include "tmio_mmc.h"

-#define HOST_MODE 0xe4
+#define CTL_HOST_MODE 0xe4
+#define HOST_MODE_GEN2_SDR50_WMODE BIT(0)
+#define HOST_MODE_GEN2_SDR104_WMODE BIT(0)
+#define HOST_MODE_GEN3_WMODE BIT(0)
+#define HOST_MODE_GEN3_BUSWIDTH BIT(8)
+
+#define HOST_MODE_GEN3_16BIT HOST_MODE_GEN3_WMODE
+#define HOST_MODE_GEN3_32BIT (HOST_MODE_GEN3_WMODE | HOST_MODE_GEN3_BUSWIDTH)
+#define HOST_MODE_GEN3_64BIT 0

#define SDHI_VER_GEN2_SDR50 0x490c
#define SDHI_VER_RZ_A1 0x820b
@@ -60,26 +68,26 @@ static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
*/
switch (sd_ctrl_read16(host, CTL_VERSION)) {
case SDHI_VER_GEN2_SDR50:
- val = (width == 32) ? 0x0001 : 0x0000;
+ val = (width == 32) ? HOST_MODE_GEN2_SDR50_WMODE : 0;
break;
case SDHI_VER_GEN2_SDR104:
- val = (width == 32) ? 0x0000 : 0x0001;
+ val = (width == 32) ? 0 : HOST_MODE_GEN2_SDR104_WMODE;
break;
case SDHI_VER_GEN3_SD:
case SDHI_VER_GEN3_SDMMC:
if (width == 64)
- val = 0x0000;
+ val = HOST_MODE_GEN3_64BIT;
else if (width == 32)
- val = 0x0101;
+ val = HOST_MODE_GEN3_32BIT;
else
- val = 0x0001;
+ val = HOST_MODE_GEN3_16BIT;
break;
default:
/* nothing to do */
return;
}

- sd_ctrl_write16(host, HOST_MODE, val);
+ sd_ctrl_write16(host, CTL_HOST_MODE, val);
}

static int renesas_sdhi_clk_enable(struct tmio_mmc_host *host)
@@ -800,7 +808,7 @@ static int renesas_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
case CTL_SD_MEM_CARD_OPT:
case CTL_TRANSACTION_CTL:
case CTL_DMA_ENABLE:
- case HOST_MODE:
+ case CTL_HOST_MODE:
if (host->pdata->flags & TMIO_MMC_HAVE_CBSY)
bit = TMIO_STAT_CMD_BUSY;
fallthrough;
--
2.17.1


[RESEND PATCH 5.10.y-cip 07/40] mmc: renesas_sdhi: remove superfluous SCLKEN

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 8c8310a6c2a6b86edadf15d511f4c1b332516b21 upstream.

All previously called functions handle SCLKEN on their own, no need to
enable it again in sdhi_reset().

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110162151.37622-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 3 ---
1 file changed, 3 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 9eb3aaeeffc7..eb33bbf368e5 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -556,9 +556,6 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
renesas_sdhi_reset_hs400_mode(host, priv);
priv->needs_adjust_hs400 = false;

- sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
- sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-
sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
--
2.17.1


[RESEND PATCH 5.10.y-cip 06/40] mmc: renesas_sdhi: merge the SCC reset functions

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 80d0be81102405f1172f9b017feef323e5931959 upstream.

There is no user of renesas_sdhi_reset_scc() anymore, only
renesas_sdhi_disable_scc() so merge these functions into one. I guess
the seperation was cruft anyhow. The BSP doesn't have it anymore and I
can't recall the reason we had it.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110162151.37622-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index da8c9cf5a942..9eb3aaeeffc7 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -424,9 +424,11 @@ static void renesas_sdhi_hs400_complete(struct mmc_host *mmc)
priv->needs_adjust_hs400 = true;
}

-static void renesas_sdhi_reset_scc(struct tmio_mmc_host *host,
- struct renesas_sdhi *priv)
+static void renesas_sdhi_disable_scc(struct mmc_host *mmc)
{
+ struct tmio_mmc_host *host = mmc_priv(mmc);
+ struct renesas_sdhi *priv = host_to_priv(host);
+
sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));

@@ -434,14 +436,6 @@ static void renesas_sdhi_reset_scc(struct tmio_mmc_host *host,
~SH_MOBILE_SDHI_SCC_CKSEL_DTSEL &
sd_scc_read32(host, priv,
SH_MOBILE_SDHI_SCC_CKSEL));
-}
-
-static void renesas_sdhi_disable_scc(struct mmc_host *mmc)
-{
- struct tmio_mmc_host *host = mmc_priv(mmc);
- struct renesas_sdhi *priv = host_to_priv(host);
-
- renesas_sdhi_reset_scc(host, priv);

sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL,
~SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN &
--
2.17.1


[RESEND PATCH 5.10.y-cip 05/40] mmc: renesas_sdhi: clear TAPEN when resetting, too

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 183edc060e6969a3afe83f663b534f6324fb7e3a upstream.

We want to clear TAPEN in a software reset, too, to have a completely
known state. Especially when we doing the initial reset during boot to
clear previous firmware states.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110162151.37622-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index e264ba2bff29..da8c9cf5a942 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -558,7 +558,7 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
struct renesas_sdhi *priv = host_to_priv(host);

if (priv->scc_ctl) {
- renesas_sdhi_reset_scc(host, priv);
+ renesas_sdhi_disable_scc(host->mmc);
renesas_sdhi_reset_hs400_mode(host, priv);
priv->needs_adjust_hs400 = false;

--
2.17.1


[RESEND PATCH 5.10.y-cip 04/40] mmc: renesas_sdhi: simplify reset routine a little

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 9f809065d86dec2070263acedaa5758f8c9e95a9 upstream.

The 'reset' pointer is only populated for Gen2+. So, we don't need to
check for that flag inside the routine.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110142058.36393-5-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index fc210c314e6c..e264ba2bff29 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -552,6 +552,7 @@ static int renesas_sdhi_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_io
return 0;
}

+/* only populated for TMIO_MMC_MIN_RCAR2 */
static void renesas_sdhi_reset(struct tmio_mmc_host *host)
{
struct renesas_sdhi *priv = host_to_priv(host);
@@ -569,9 +570,7 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
}

- if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
- sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK,
- TMIO_MASK_INIT_RCAR2);
+ sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_INIT_RCAR2);
}

#define SH_MOBILE_SDHI_MIN_TAP_ROW 3
--
2.17.1


[RESEND PATCH 5.10.y-cip 03/40] mmc: renesas_sdhi: populate SCC pointer at the proper place

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit d14ac691bb6f6ebaa7eeec21ca04dd47300ff5b6 upstream.

The SCC pointer is currently filled whenever the SoC is Gen2+. This is
wrong because there is a Gen2-variant without SCC (SDHI_VER_GEN2_SDR50).
We have been lucky because the writes to unintended registers have not
caused problems so far. But further refactoring work exposed the
problem. So, move the pointer initialization to the place where we know
that the SDHI instance supports tuning. And also populate the 'reset'
pointer unconditionally to make sure the interrupt enable register is
always properly set for Gen2+.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110142058.36393-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 9dc9824e1f76..fc210c314e6c 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -1012,11 +1012,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->ops.start_signal_voltage_switch =
renesas_sdhi_start_signal_voltage_switch;
host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27;
-
- if (of_data && of_data->scc_offset) {
- priv->scc_ctl = host->ctl + of_data->scc_offset;
- host->reset = renesas_sdhi_reset;
- }
+ host->reset = renesas_sdhi_reset;
}

/* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
@@ -1096,6 +1092,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
if (!hit)
dev_warn(&host->pdev->dev, "Unknown clock rate for tuning\n");

+ priv->scc_ctl = host->ctl + of_data->scc_offset;
host->check_retune = renesas_sdhi_check_scc_error;
host->ops.execute_tuning = renesas_sdhi_execute_tuning;
host->ops.prepare_hs400_tuning = renesas_sdhi_prepare_hs400_tuning;
--
2.17.1


[RESEND PATCH 5.10.y-cip 02/40] mmc: renesas_sdhi: probe into TMIO after SCC parameters have been setup

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit b161d87dfd3d9f3fb064a089a9e521d0e5d3e38f upstream.

Setting up the SCC parameters does not need a probed TMIO device. But in
the near future, probing the TMIO device needs the SCC parameters setup.
So, fix the ordering.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110142058.36393-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index d5e7bbdffc53..9dc9824e1f76 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -1072,10 +1072,6 @@ int renesas_sdhi_probe(struct platform_device *pdev,
quirks->hs400_calib_table + 1);
}

- ret = tmio_mmc_host_probe(host);
- if (ret < 0)
- goto edisclk;
-
/* Enable tuning iff we have an SCC and a supported mode */
if (of_data && of_data->scc_offset &&
(host->mmc->caps & MMC_CAP_UHS_SDR104 ||
@@ -1107,6 +1103,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->ops.hs400_complete = renesas_sdhi_hs400_complete;
}

+ ret = tmio_mmc_host_probe(host);
+ if (ret < 0)
+ goto edisclk;
+
num_irqs = platform_irq_count(pdev);
if (num_irqs < 0) {
ret = num_irqs;
--
2.17.1


[RESEND PATCH 5.10.y-cip 01/40] mmc: renesas_sdhi: only reset SCC when its pointer is populated

Lad Prabhakar
 

From: Wolfram Sang <wsa+renesas@...>

commit 45bffc371fefd8537804b001080a47c6b69d5efa upstream.

Only re-initialize SCC and tuning when an SCC was found during probe().
This is currently a noop because all R-Car Gen2+ are considered to have
an SCC. But this will change in a later patch, so we need this
preparation.

Signed-off-by: Wolfram Sang <wsa+renesas@...>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@...>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...>
Link: https://lore.kernel.org/r/20201110142058.36393-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
drivers/mmc/host/renesas_sdhi_core.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 782879d46ff4..d5e7bbdffc53 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -556,16 +556,18 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
{
struct renesas_sdhi *priv = host_to_priv(host);

- renesas_sdhi_reset_scc(host, priv);
- renesas_sdhi_reset_hs400_mode(host, priv);
- priv->needs_adjust_hs400 = false;
+ if (priv->scc_ctl) {
+ renesas_sdhi_reset_scc(host, priv);
+ renesas_sdhi_reset_hs400_mode(host, priv);
+ priv->needs_adjust_hs400 = false;

- sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
- sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
+ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
+ sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));

- sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
- ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
- sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
+ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
+ ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
+ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
+ }

if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK,
--
2.17.1


[RESEND PATCH 5.10.y-cip 00/40] Add SD/eMMC support for Renesas RZ/G2L SoC

Lad Prabhakar
 

Hi All,

This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
enables this interfaces on Renesas RZ/G2L SMARC EVK.

All the patches have been cherry picked from v5.17 release.

Resending as I had missed a patch (0001) earlier, reset of the patches
havent been changed. And also for some reason patches didnt make into
patchwork.

Cheers,
Prabhakar

Biju Das (9):
mmc: tmio: reinit card irqs in reset routine
clk: renesas: rzg2l: Add SDHI clk mux support
clk: renesas: r9a07g044: Add SDHI clock and reset entries
dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning
dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings
dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
arm64: dts: renesas: r9a07g044: Add SDHI nodes
arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform

Geert Uytterhoeven (1):
clk: renesas: rzg2l: Add missing kerneldoc for resets

Lad Prabhakar (2):
clk: renesas: rzg2l: Check return value of pm_genpd_init()
clk: renesas: rzg2l: propagate return value
of_genpd_add_provider_simple()

Masaharu Hayakawa (1):
mmc: tmio: Add data timeout error detection

Rob Herring (2):
dt-bindings: Fix errors in 'if' schemas
dt-bindings: Drop redundant minItems/maxItems

Takeshi Saito (1):
mmc: tmio: restore bus width when resetting

Wolfram Sang (22):
mmc: renesas_sdhi: only reset SCC when its pointer is populated
mmc: renesas_sdhi: probe into TMIO after SCC parameters have been
setup
mmc: renesas_sdhi: populate SCC pointer at the proper place
mmc: renesas_sdhi: simplify reset routine a little
mmc: renesas_sdhi: clear TAPEN when resetting, too
mmc: renesas_sdhi: merge the SCC reset functions
mmc: renesas_sdhi: remove superfluous SCLKEN
mmc: renesas_sdhi: improve HOST_MODE usage
mmc: renesas_sdhi: don't hardcode SDIF values
mmc: renesas_sdhi: sort includes
mmc: tmio: set max_busy_timeout
mmc: tmio: add hook for custom busy_wait calculation
mmc: renesas_sdhi: populate hook for longer busy_wait
mmc: tmio: support custom irq masks
mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL
mmc: tmio: abort DMA before reset
mmc: renesas_sdhi: break SCC reset into own function
mmc: renesas_sdhi: do hard reset if possible
mmc: tmio: always flag retune when resetting and a card is present
mmc: tmio: always restore irq register
mmc: tmio: reenable card irqs after the reset callback
dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock

Yoshihiro Shimoda (2):
mmc: renesas_internal_dmac: add pre_req and post_req support
mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune

.../devicetree/bindings/mmc/renesas,sdhi.yaml | 153 ++++++++++++------
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 32 ++++
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 143 ++++++++++++++++
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 62 +++++++
drivers/clk/renesas/r9a07g044-cpg.c | 36 +++++
drivers/clk/renesas/rzg2l-cpg.c | 136 +++++++++++++++-
drivers/clk/renesas/rzg2l-cpg.h | 19 +++
drivers/mmc/host/Kconfig | 1 +
drivers/mmc/host/renesas_sdhi.h | 2 +
drivers/mmc/host/renesas_sdhi_core.c | 153 ++++++++++++------
drivers/mmc/host/renesas_sdhi_internal_dmac.c | 91 ++++++++++-
drivers/mmc/host/tmio_mmc.h | 11 +-
drivers/mmc/host/tmio_mmc_core.c | 88 ++++++----
drivers/mmc/host/uniphier-sd.c | 1 +
include/linux/mfd/tmio.h | 7 +-
15 files changed, 794 insertions(+), 141 deletions(-)

--
2.17.1


Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC

Lad Prabhakar
 

Hi Pavel, Nobuhiro,

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 31 March 2022 10:28
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Biju Das
<biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas
RZ/G2L SoC

Hi!

This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
enables this interfaces on Renesas RZ/G2L SMARC EVK.

All the patches have been cherry picked from v5.17 release.
I tried to apply the patches on top of 5.10.106-cip4, and could not. Can
you double check series applies properly?
Sorry about that, I realized now I had missed a patch!

Will resend the series (with 40 patches).

Cheers,
Prabhakar

8bb6e30b765989a3c0924158316d689e16317cd1
CIP: Bump version suffix to -cip4 after merge from stable commit
66f600a7a5460b6acab5272ac9f54f842927a50d
Merge tag 'v5.10.106' into linux-5.10.y-cip

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant minItems/maxItems

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 31 March 2022 11:22
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Biju Das
<biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant
minItems/maxItems

Hi!

This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.
Do we have the improved meta-scheme in 5.10.X? Are we actually running the
dts schema checks?
Right 5.10.x will use older schemas. Let me know your thoughts If you want me to drop this patch.

I guess it is not a big deal either way.
Im hoping you are ok with this change.

Cheers,
Prabhakar

Best regards,
Pavel

+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -74,7 +74,6 @@ properties:

clock-names:
minItems: 1
- maxItems: 2
items:
- const: core
- const: cd
@@ -106,7 +105,6 @@ properties:

pinctrl-names:
minItems: 1
- maxItems: 2
items:
- const: default
- const: state_uhs
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 31 March 2022 11:20
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Biju Das
<biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if
possible

Hi!

commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream.

All recent SDHI instances can be reset via the reset controller. If
one is found, use it instead of the open coded reset. This is to get a
future-proof sane reset state.
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device
*pdev,
if (ret)
goto efree;

+ priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev,
NULL);
+ if (IS_ERR(priv->rstc))
+ return PTR_ERR(priv->rstc);
+
I believe this needs to goto to appropriate error path, not return
directly.
Yes you are right this needs to land into appropriate error path.

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 31 March 2022 11:19
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Biju Das
<biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition
of cmd/data timeout for retune

Hi!

commit ed2fab9a8229cc70fe03032e48d0ec375df6013e upstream.

According to the datasheet, this controller needs retune when cmd or
data timeout happens. So, add a condition into .check_retune().
@@ -790,11 +792,19 @@ static bool renesas_sdhi_check_scc_error(struct
tmio_mmc_host *host)
if (mmc_doing_tune(host->mmc))
return false;

+ if (((mrq->cmd->error == -ETIMEDOUT) ||
+ (mrq->data && mrq->data->error == -ETIMEDOUT)) &&
+ ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
+ (host->ops.get_cd && host->ops.get_cd(host->mmc))))
+ ret |= true;
I'd preffer simple "ret = true" here.
Agreed.

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 31 March 2022 11:16
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Biju Das
<biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add
pre_req and post_req support

Hi!

commit 69e7d76afdb54243df957351804c0f1afca46d0f upstream.

Add pre_req and post_req support to improve performance.

Inspired by a patch in the BSP by Masaharu Hayakawa.
+/*
+ * renesas_sdhi_internal_dmac_map() will be called with two difference
"two different"?
Agreed.

+ /* This DMAC cannot handle if buffer is not 128-bytes alignment */
"aligned"?
Ditto.

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 31 March 2022 11:15
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>; Biju Das
<biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes

Hi!

From: Wolfram Sang <wsa+renesas@...>

commit ab07a1356043f07142ba351253904ef8c42ecd4f upstream.

Better prevent double includes.
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -18,22 +18,22 @@
*
*/

-#include <linux/kernel.h>
#include <linux/clk.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/slot-gpio.h>
-#include <linux/mfd/tmio.h>
-#include <linux/sh_dma.h>
-#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinctrl-state.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
#include <linux/regulator/consumer.h>
+#include <linux/sh_dma.h>
+#include <linux/slab.h>
#include <linux/sys_soc.h>

#include "renesas_sdhi.h"
In these cases we usually sort be include length, first ("reverse xmass
tree").
My understating was most subsystems prefer alphabetical.

Cheers,
Prabhakar

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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