From: Biju Das <biju.das@...> Renesas RZ/G1E (R8A7745) SoC GPIO blocks are identical to the R-Car Gen2 family. Add support for its GPIO controllers. Signed-off-by: Biju Das

From: Biju Das <biju.das@...> Adding pinctrl support for scif4 interface. Signed-off-by: Biju Das <biju.das@...> Signed-off-by: Simon Horman

From: Sergei Shtylyov <sergei.shtylyov@...> Define the generic R8A7745 part of the PFC device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@...> Reviewed-by:

From: Biju Das <biju.das@...> Add i2c5 pin groups and function to r8a7745 PFC driver. Signed-off-by: Biju Das <biju.das@...> Reviewed-by: Fabrizio Castro

This patch adds tpu groups and function to r8a7745/r8a7794. Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> Signed-off-by: Geert

This patch adds PFC PWM[0123456] pin groups and functions, enabling PWM on the r8a7794 and r8a7745. Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das

This patch adds can_clk function to r8a7745/r8a7794 which is cleaner, and allows for independent configuration. We keep the can_clk* pins definitions from within can0_groups and can1_groups for

This patch adds PFC CAN0 and CAN1 pin groups and functions, enabling CAN bus on the RZ/G1E. Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das

From: Sergei Shtylyov <sergei.shtylyov@...> Renesas RZ/G1E (R8A7745) is pin compatible with R-Car E2 (R8A7794), however it doesn't have several automotive specific

From: Sergei Shtylyov <sergei.shtylyov@...> The R8A7794 PFC driver was apparently based on the preliminary revisions of the user's manual which had some signals and MOD_SEL register

From: Sergei Shtylyov <sergei.shtylyov@...> The ATA_AVTP_* signals are documented as reserved in the recent R-Car E2 user's manual (the only remaining mention is in the table 5.2 and I

From: Sergei Shtylyov <sergei.shtylyov@...> The R8A7794 PFC driver was apparently based on the preliminary revisions of the user's manual which called I2C5 device IIC0 and IIC0 device

From: Sergei Shtylyov <sergei.shtylyov@...> All R8A7794 manuals I have here (0.50 and 1.10) agree that the PFC driver has ATAG0# and ATAWR0# signals in IPSR12 swapped -- fix

From: Koji Matsuoka <koji.matsuoka.xm@...> r8a7794 PFC DU support from the R-Car Gen2 v1.9.4 BSP [Magnus: added the description, added missing dot clock output signals, separated CDE and

From: Andrey Gusakov <andrey.gusakov@...> GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values are listed instead of 4... [Sergei: fixed up the formatting, renamed,

From: Sergei Shtylyov <sergei.shtylyov@...> Add the EtherAVB pin groups to the R8A7794 PFC driver. Based on the patches by Mitsuhiro Kimura

From: Ryo Kataoka <ryo.kataoka.wt@...> Add the audio clock pin groups to the R8A7794 PFC driver. [Sergei: fixed pin group names to reflect the reality, fixed pin names in the comments to

From: Ryo Kataoka <ryo.kataoka.wt@...> Add the SSI pin groups to the R8A7794 PFC driver. [Sergei: fixed inconsistent alternate pin group naming, split SSI5/6 pin groups into data/control

From: Geert Uytterhoeven <geert+renesas@...> Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG)

From: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@...> Acked-by: Laurent