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[PATCH 14/36] dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 668a8187e8b7875d515eacab88cef7f97fb4a1b3 upstream.
Add binding documentation for the RZ/G2H (R8A774E1) Clock Pulse
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 668a8187e8b7875d515eacab88cef7f97fb4a1b3 upstream.
Add binding documentation for the RZ/G2H (R8A774E1) Clock Pulse
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By
Biju Das <biju.das.jz@...>
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#5195
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[PATCH 03/36] soc: renesas: rcar-sysc: Add r8a774e1 support
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit f446ade0952aed929186139f3643d714d9d2a855 upstream
Add support for RZ/G2H (R8A774E1) SoC power areas to the R-Car
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit f446ade0952aed929186139f3643d714d9d2a855 upstream
Add support for RZ/G2H (R8A774E1) SoC power areas to the R-Car
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By
Biju Das <biju.das.jz@...>
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#5194
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[PATCH 02/36] dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit f639fb66d17e2e25049503b7c2c568457a9b5c6f upstream.
Document bindings for the RZ/G2H (aka R8A774E1) SYSC
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit f639fb66d17e2e25049503b7c2c568457a9b5c6f upstream.
Document bindings for the RZ/G2H (aka R8A774E1) SYSC
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By
Biju Das <biju.das.jz@...>
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#5193
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[PATCH 18/36] pinctrl: sh-pfc: r8a7795: Fix VIN versioned groups
From: Jacopo Mondi <jacopo+renesas@...>
commit 184844ccda4138402846bf4b42c28ac5f16a458a upstream.
Versioned VIN groups can appear on different sets of pins. Using the
VIN_DATA_PIN_GROUP macro
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From: Jacopo Mondi <jacopo+renesas@...>
commit 184844ccda4138402846bf4b42c28ac5f16a458a upstream.
Versioned VIN groups can appear on different sets of pins. Using the
VIN_DATA_PIN_GROUP macro
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By
Biju Das <biju.das.jz@...>
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#5192
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[PATCH 16/36] arm64: defconfig: Enable R8A774E1 SoC
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 7f8fe81eb75004dca73aa19127093977a3c8a154 upstream.
Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 7f8fe81eb75004dca73aa19127093977a3c8a154 upstream.
Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64
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By
Biju Das <biju.das.jz@...>
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#5191
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[PATCH 10/36] clk: renesas: Add r8a774e1 CPG Core Clock Definitions
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit ef1c9924287d11660cfc7900aeeeb4732188743e upstream.
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit ef1c9924287d11660cfc7900aeeeb4732188743e upstream.
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed
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By
Biju Das <biju.das.jz@...>
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#5190
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[PATCH 08/36] soc: renesas: rcar-rst: Add support for RZ/G2H
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 7f8fa833dc739c4a28574c335eb08dbde2cb23d0 upstream.
Add support for RZ/G2H (R8A774E1) to the R-Car RST
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 7f8fa833dc739c4a28574c335eb08dbde2cb23d0 upstream.
Add support for RZ/G2H (R8A774E1) to the R-Car RST
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By
Biju Das <biju.das.jz@...>
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#5189
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[PATCH 05/36] dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 1f52719bb71f6ead0bcf19c212a30f05c2237058 upstream.
Add device tree bindings documentation for the Renesas RZ/G2H
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 1f52719bb71f6ead0bcf19c212a30f05c2237058 upstream.
Add device tree bindings documentation for the Renesas RZ/G2H
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By
Biju Das <biju.das.jz@...>
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#5188
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[PATCH 12/36] clk: renesas: cpg-mssr: Mark clocks as critical only if on at boot
From: Ulrich Hecht <uli+renesas@...>
commit ed4a11807d2a35ccfc0d00371f20b826f670b5f2 upstream.
This allows us to add the RWDT clock to the list of critical clocks without
keeping it enabled
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From: Ulrich Hecht <uli+renesas@...>
commit ed4a11807d2a35ccfc0d00371f20b826f670b5f2 upstream.
This allows us to add the RWDT clock to the list of critical clocks without
keeping it enabled
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By
Biju Das <biju.das.jz@...>
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#5187
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[PATCH 15/36] clk: renesas: cpg-mssr: Add r8a774e1 support
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit c8a53fa1d211936ddcabf82ff991c18672b3d63a upstream.
Add support for the RZ/G2H (R8A774E1) SoC to the Renesas
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit c8a53fa1d211936ddcabf82ff991c18672b3d63a upstream.
Add support for the RZ/G2H (R8A774E1) SoC to the Renesas
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By
Biju Das <biju.das.jz@...>
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#5186
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[PATCH 13/36] clk: renesas: rzg2: Mark RWDT clocks as critical
From: Ulrich Hecht <uli+renesas@...>
commit 52bc5ea6edde35bc65ed6ecd7639534e78002c74 upstream.
Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change
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From: Ulrich Hecht <uli+renesas@...>
commit 52bc5ea6edde35bc65ed6ecd7639534e78002c74 upstream.
Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change
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By
Biju Das <biju.das.jz@...>
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#5185
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[PATCH 04/36] soc: renesas: Add Renesas R8A774E1 config option
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit b88fc411e0e9c38058f6e3d2afdc96aaced4e72c upstream.
Add configuration option for the RZ/G2H (R8A774E1)
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit b88fc411e0e9c38058f6e3d2afdc96aaced4e72c upstream.
Add configuration option for the RZ/G2H (R8A774E1)
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By
Biju Das <biju.das.jz@...>
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#5184
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[PATCH 19/36] pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions
From: Takeshi Kihara <takeshi.kihara.df@...>
commit e244ff6f913f6ce4c77a00647462bc34c4221f46 upstream.
This patch adds I2C{0,3,5} pins, groups and functions to
the R8A7795 ES1.x SoC.
These
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From: Takeshi Kihara <takeshi.kihara.df@...>
commit e244ff6f913f6ce4c77a00647462bc34c4221f46 upstream.
This patch adds I2C{0,3,5} pins, groups and functions to
the R8A7795 ES1.x SoC.
These
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By
Biju Das <biju.das.jz@...>
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#5183
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[PATCH 17/36] pinctrl: sh-pfc: r8a77965: Fix DU_DOTCLKIN3 drive/bias control
From: Geert Uytterhoeven <geert+renesas@...>
commit a34cd9dfd03fa9ec380405969f1d638bc63b8d63 upstream.
R-Car Gen3 Hardware Manual Errata for Rev. 2.00 of October 24, 2019
changed the
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From: Geert Uytterhoeven <geert+renesas@...>
commit a34cd9dfd03fa9ec380405969f1d638bc63b8d63 upstream.
R-Car Gen3 Hardware Manual Errata for Rev. 2.00 of October 24, 2019
changed the
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By
Biju Das <biju.das.jz@...>
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#5182
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[PATCH 06/36] soc: renesas: Identify RZ/G2H
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 5b83cc42cf871d3079cc370432de6b5925c71ce5 upstream.
This patch adds support for identifying the RZ/G2H (r8a774e1)
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 5b83cc42cf871d3079cc370432de6b5925c71ce5 upstream.
This patch adds support for identifying the RZ/G2H (r8a774e1)
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By
Biju Das <biju.das.jz@...>
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#5181
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[PATCH 01/36] dt-bindings: power: Add r8a774e1 SYSC power domain definitions
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit e24779649c840ce1ecb638a30e7c821075630184 upstream.
This patch adds power domain indices for the RZ/G2H (r8a774e1)
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit e24779649c840ce1ecb638a30e7c821075630184 upstream.
This patch adds power domain indices for the RZ/G2H (r8a774e1)
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By
Biju Das <biju.das.jz@...>
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#5180
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[PATCH 00/36] Add Hihope RZ/G2H basic board support
This patch series add basic support for Hihope RZ/G2H based on
r8a774e1 SoC to 4.19.y-cip kernel. All patches in this series
are cherry-picked from mainline.
This patch series depends on [1]
[1]:
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This patch series add basic support for Hihope RZ/G2H based on
r8a774e1 SoC to 4.19.y-cip kernel. All patches in this series
are cherry-picked from mainline.
This patch series depends on [1]
[1]:
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By
Biju Das <biju.das.jz@...>
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#5179
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[PATCH 11/36] clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks
From: Sergei Shtylyov <sergei.shtylyov@...>
commit 0d67c0340a60829c5c1b7d09629d23bbd67696f3 upstream.
I was unable to get clk_set_rate() setting a lower RPC-IF clock frequency
and
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From: Sergei Shtylyov <sergei.shtylyov@...>
commit 0d67c0340a60829c5c1b7d09629d23bbd67696f3 upstream.
I was unable to get clk_set_rate() setting a lower RPC-IF clock frequency
and
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By
Biju Das <biju.das.jz@...>
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#5178
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[PATCH 09/36] clk: renesas: rcar-gen3: Add RPC clocks
From: Sergei Shtylyov <sergei.shtylyov@...>
commit db4a0073cc82a95d8d1a9b05fde82355fcce77d8 upstream.
The RPCSRC internal clock is controlled by the RPCCKCR.DIV[4:3] on all
the R-Car
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From: Sergei Shtylyov <sergei.shtylyov@...>
commit db4a0073cc82a95d8d1a9b05fde82355fcce77d8 upstream.
The RPCSRC internal clock is controlled by the RPCCKCR.DIV[4:3] on all
the R-Car
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By
Biju Das <biju.das.jz@...>
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#5177
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[PATCH 07/36] dt-bindings: reset: rcar-rst: Document r8a774e1 reset module
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 4d938a27e18d9c9a85041bb9a94f645a0a132f37 upstream.
Document bindings for the RZ/G2H (R8A774E1) reset
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 4d938a27e18d9c9a85041bb9a94f645a0a132f37 upstream.
Document bindings for the RZ/G2H (R8A774E1) reset
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By
Biju Das <biju.das.jz@...>
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#5176
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