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[PATCH 4.19.y-cip 3/7] arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 615d1a9ebcfb90d5ddbfd887d42eda5dc8b03303 upstream.
Add RZ/G2H (R8A774E1) IPMMU nodes.
Signed-off-by: Marian-Cristian
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 615d1a9ebcfb90d5ddbfd887d42eda5dc8b03303 upstream.
Add RZ/G2H (R8A774E1) IPMMU nodes.
Signed-off-by: Marian-Cristian
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By
Biju Das <biju.das.jz@...>
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#5215
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[PATCH 4.19.y-cip 2/7] iommu/ipmmu-vmsa: Hook up R8A774E1 DT matching code
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 4b2aa7a6f9b793cadbda898476c8a16d374f1b3a upstream.
Add support for RZ/G2H (R8A774E1) SoC IPMMUs.
Signed-off-by:
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 4b2aa7a6f9b793cadbda898476c8a16d374f1b3a upstream.
Add support for RZ/G2H (R8A774E1) SoC IPMMUs.
Signed-off-by:
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By
Biju Das <biju.das.jz@...>
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#5214
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[PATCH 4.19.y-cip 1/7] dt-bindings: iommu: renesas,ipmmu-vmsa: Add r8a774e1 support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 8a71c743bf5ecdcfb439662e4cef89d7b1132495 upstream.
Document RZ/G2H (R8A774E1) SoC bindings.
Reviewed-by: Geert Uytterhoeven
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 8a71c743bf5ecdcfb439662e4cef89d7b1132495 upstream.
Document RZ/G2H (R8A774E1) SoC bindings.
Reviewed-by: Geert Uytterhoeven
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By
Biju Das <biju.das.jz@...>
·
#5213
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[PATCH 24/36] pinctrl: sh-pfc: r8a7795-es1: Add TPU pins, groups and functions
From: Geert Uytterhoeven <geert+renesas@...>
commit 0cbdf1b876243c73a795783ce69004302e250a43 upstream.
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on revision ES1.x
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From: Geert Uytterhoeven <geert+renesas@...>
commit 0cbdf1b876243c73a795783ce69004302e250a43 upstream.
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on revision ES1.x
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By
Biju Das <biju.das.jz@...>
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#5212
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[PATCH 36/36] arm64: dts: renesas: Add HiHope RZ/G2H sub board support
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit adbe62e93c1e793ad08d5e913151137b6c24daa4 upstream.
The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit adbe62e93c1e793ad08d5e913151137b6c24daa4 upstream.
The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main
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By
Biju Das <biju.das.jz@...>
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#5211
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[PATCH 27/36] pinctrl: sh-pfc: r8a7795: Use new macros for non-GPIO pins
From: Geert Uytterhoeven <geert+renesas@...>
commit 42ee6c3395465cea948a462b4605fc7fa53e3704 upstream.
Update the R-Car H3 ES2.0 and later pin control driver to use the new
macros for
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From: Geert Uytterhoeven <geert+renesas@...>
commit 42ee6c3395465cea948a462b4605fc7fa53e3704 upstream.
Update the R-Car H3 ES2.0 and later pin control driver to use the new
macros for
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By
Biju Das <biju.das.jz@...>
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#5210
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[PATCH 25/36] pinctrl: sh-pfc: r8a7795: Add TPU pins, groups and functions
From: Geert Uytterhoeven <geert+renesas@...>
commit 9141d4558fcc635c4ec3b5ddd99f24d8df7fe6e0 upstream.
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on revisions ES2.x
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From: Geert Uytterhoeven <geert+renesas@...>
commit 9141d4558fcc635c4ec3b5ddd99f24d8df7fe6e0 upstream.
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on revisions ES2.x
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By
Biju Das <biju.das.jz@...>
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#5209
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[PATCH 21/36] pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions
From: Geert Uytterhoeven <geert+renesas@...>
commit 99fdb920f5534d1c2f4b30c12eca4224ea260198 upstream.
Use union vin_data16 and VIN_DATA_PIN_GROUP() to reduce redundancies in
pin definitions
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From: Geert Uytterhoeven <geert+renesas@...>
commit 99fdb920f5534d1c2f4b30c12eca4224ea260198 upstream.
Use union vin_data16 and VIN_DATA_PIN_GROUP() to reduce redundancies in
pin definitions
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By
Biju Das <biju.das.jz@...>
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#5208
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[PATCH 30/36] pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
From: Geert Uytterhoeven <geert+renesas@...>
commit f2bc07562748c23609743ded0630ec965f9e4fec upstream.
Despite using the same compatible values ("r8a7795"-based) because of
historical reasons,
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From: Geert Uytterhoeven <geert+renesas@...>
commit f2bc07562748c23609743ded0630ec965f9e4fec upstream.
Despite using the same compatible values ("r8a7795"-based) because of
historical reasons,
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By
Biju Das <biju.das.jz@...>
·
#5207
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[PATCH 28/36] pinctrl: sh-pfc: pfc-r8a7795-es1: Fix typo in pinmux macro for SCL3
From: Keiya Nobuta <nobuta.keiya@...>
commit dcfdaa92a417706c880daa4f94396a1cd53278d0 upstream.
SCL3 is assigned to GPSR2 bit7 referred by IP1_23_20 macro.
Signed-off-by: Keiya Nobuta
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From: Keiya Nobuta <nobuta.keiya@...>
commit dcfdaa92a417706c880daa4f94396a1cd53278d0 upstream.
SCL3 is assigned to GPSR2 bit7 referred by IP1_23_20 macro.
Signed-off-by: Keiya Nobuta
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By
Biju Das <biju.das.jz@...>
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#5206
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[PATCH 23/36] pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions
From: Takeshi Kihara <takeshi.kihara.df@...>
commit 624a7a12cc0cc776c9c82347ffe5ddce7218eeca upstream.
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the
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From: Takeshi Kihara <takeshi.kihara.df@...>
commit 624a7a12cc0cc776c9c82347ffe5ddce7218eeca upstream.
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the
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By
Biju Das <biju.das.jz@...>
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#5205
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[PATCH 22/36] pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume
From: Marek Vasut <marek.vasut+renesas@...>
commit d92ee9cf8ec8d7fe1d7dbc4b3ee459419b1e5533 upstream.
The TDSELCTRL register is responsible for configuring the SDHI/MMC clock
return path delay
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From: Marek Vasut <marek.vasut+renesas@...>
commit d92ee9cf8ec8d7fe1d7dbc4b3ee459419b1e5533 upstream.
The TDSELCTRL register is responsible for configuring the SDHI/MMC clock
return path delay
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By
Biju Das <biju.das.jz@...>
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#5204
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[PATCH 34/36] dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 6dfb9f369c00fe90f982eaf28032a889a89ee4b8 upstream.
This patch adds board HiHope RZ/G2H (the main board, powered by
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit 6dfb9f369c00fe90f982eaf28032a889a89ee4b8 upstream.
This patch adds board HiHope RZ/G2H (the main board, powered by
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By
Biju Das <biju.das.jz@...>
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#5203
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[PATCH 35/36] arm64: dts: renesas: Add HiHope RZ/G2H main board support
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit deadcd50771bc06ad03a3d09c568a0f66694e053 upstream.
Basic support for the HiHope RZ/G2H main board:
- Memory,
-
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit deadcd50771bc06ad03a3d09c568a0f66694e053 upstream.
Basic support for the HiHope RZ/G2H main board:
- Memory,
-
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By
Biju Das <biju.das.jz@...>
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#5202
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[PATCH 20/36] pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions
From: Takeshi Kihara <takeshi.kihara.df@...>
commit 100431b61dc5a591913b16971af644d8bf622599 upstream.
This patch adds I2C{0,3,5} pins, groups and functions to the R8A7795 SoC.
These pins
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From: Takeshi Kihara <takeshi.kihara.df@...>
commit 100431b61dc5a591913b16971af644d8bf622599 upstream.
This patch adds I2C{0,3,5} pins, groups and functions to the R8A7795 SoC.
These pins
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By
Biju Das <biju.das.jz@...>
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#5201
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[PATCH 33/36] arm64: dts: renesas: Initial r8a774e1 SoC device tree
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Basic support for the RZ/G2H SoC.
Signed-off-by: Marian-Cristian Rotariu
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Basic support for the RZ/G2H SoC.
Signed-off-by: Marian-Cristian Rotariu
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By
Biju Das <biju.das.jz@...>
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#5200
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[PATCH 32/36] pinctrl: sh-pfc: pfc-r8a77951: Add R8A774E1 PFC support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit a5e8b53adeb4b458971dfd6232b71299010e981a upstream.
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (R8A77951),
however
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit a5e8b53adeb4b458971dfd6232b71299010e981a upstream.
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (R8A77951),
however
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By
Biju Das <biju.das.jz@...>
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#5199
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[PATCH 31/36] dt-bindings: pinctrl: sh-pfc: Document r8a774e1 PFC support
From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit d33cfc2e591a90f540cd696240ff953b8aaba17d upstream.
Document PFC support for the RZ/G2H (R8A774E1)
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From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
commit d33cfc2e591a90f540cd696240ff953b8aaba17d upstream.
Document PFC support for the RZ/G2H (R8A774E1)
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By
Biju Das <biju.das.jz@...>
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#5198
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[PATCH 29/36] pinctrl: sh-pfc: pfc-r8a7795: Fix typo in pinmux macro for SCL3
From: Keiya Nobuta <nobuta.keiya@...>
commit 772f9daf336d047ef018bf41e218cb04df4146e5 upstream.
SCL3 is assigned to GPSR2 bit7 referred by IP1_23_20 macro.
Signed-off-by: Keiya Nobuta
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From: Keiya Nobuta <nobuta.keiya@...>
commit 772f9daf336d047ef018bf41e218cb04df4146e5 upstream.
SCL3 is assigned to GPSR2 bit7 referred by IP1_23_20 macro.
Signed-off-by: Keiya Nobuta
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By
Biju Das <biju.das.jz@...>
·
#5197
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[PATCH 26/36] pinctrl: sh-pfc: r8a7795-es1: Use new macros for non-GPIO pins
From: Geert Uytterhoeven <geert+renesas@...>
commit 4f062bcb5889722efcaf71eed280439e976a112d upstream.
Update the R-Car H3 ES1.x pin control driver to use the new macros for
describing pins
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From: Geert Uytterhoeven <geert+renesas@...>
commit 4f062bcb5889722efcaf71eed280439e976a112d upstream.
Update the R-Car H3 ES1.x pin control driver to use the new macros for
describing pins
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By
Biju Das <biju.das.jz@...>
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#5196
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