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[PATCH 4.4.y-cip 22/30] pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group
From: Geert Uytterhoeven <geert+renesas@...>
commit 66e9fe1ec73929a9f7326856699d262bab8e9fb0 upstream.
The pin controller drivers for all R-Car Gen2 SoCs have entries for the
EtherAVB TX_ER
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From: Geert Uytterhoeven <geert+renesas@...>
commit 66e9fe1ec73929a9f7326856699d262bab8e9fb0 upstream.
The pin controller drivers for all R-Car Gen2 SoCs have entries for the
EtherAVB TX_ER
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By
Biju Das <biju.das.jz@...>
·
#5312
·
|
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[PATCH 4.4.y-cip 21/30] pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
From: Geert Uytterhoeven <geert+renesas@...>
commit 53ec9ccd1c62b644d81674e013b1800dd88ec92b upstream.
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the
|
From: Geert Uytterhoeven <geert+renesas@...>
commit 53ec9ccd1c62b644d81674e013b1800dd88ec92b upstream.
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the
|
By
Biju Das <biju.das.jz@...>
·
#5311
·
|
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[PATCH 4.4.y-cip 20/30] pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
From: Geert Uytterhoeven <geert+renesas@...>
commit 01af9ecbd7bd7d688c54d73a7fa8f7e10ab29d8c upstream.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Kuninori Morimoto
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From: Geert Uytterhoeven <geert+renesas@...>
commit 01af9ecbd7bd7d688c54d73a7fa8f7e10ab29d8c upstream.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Kuninori Morimoto
|
By
Biju Das <biju.das.jz@...>
·
#5310
·
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[PATCH 4.4.y-cip 19/30] dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit baf674bf717f8224f33e453e1df92a96c4d6ce48 upstream.
Document PFC support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit baf674bf717f8224f33e453e1df92a96c4d6ce48 upstream.
Document PFC support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad
|
By
Biju Das <biju.das.jz@...>
·
#5309
·
|
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[PATCH 4.4.y-cip 18/30] dt-bindings: mmc: renesas,mmcif: Document r8a7742 DT bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 194f9b21ad64740eb9675703037fe42113cea65c upstream.
Add support for r8a7742 SoC. Renesas RZ/G1H (R8A7742) MMCIF is identical
to
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 194f9b21ad64740eb9675703037fe42113cea65c upstream.
Add support for r8a7742 SoC. Renesas RZ/G1H (R8A7742) MMCIF is identical
to
|
By
Biju Das <biju.das.jz@...>
·
#5308
·
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[PATCH 4.4.y-cip 17/30] dt-bindings: serial: renesas,hscif: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 65994c09bc66d7241be2f7d6eb3b43f894ba2db0 upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible HSCIF ports,
so
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 65994c09bc66d7241be2f7d6eb3b43f894ba2db0 upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible HSCIF ports,
so
|
By
Biju Das <biju.das.jz@...>
·
#5307
·
|
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[PATCH 4.4.y-cip 16/30] dt-bindings: serial: renesas,scifb: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 3cf1601ab00ce55820e6130611f536b326563a7e upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFB ports,
so
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 3cf1601ab00ce55820e6130611f536b326563a7e upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFB ports,
so
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By
Biju Das <biju.das.jz@...>
·
#5306
·
|
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[PATCH 4.4.y-cip 15/30] dt-bindings: serial: renesas,scif: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 8908a822663f6958f56174120de383ff955874be upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIF ports,
so
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 8908a822663f6958f56174120de383ff955874be upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIF ports,
so
|
By
Biju Das <biju.das.jz@...>
·
#5305
·
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[PATCH 4.4.y-cip 14/30] dt-bindings: serial: renesas,scifa: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 0280a04ed9dbdaaae552b79b7a704625bd8e27cf upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFA ports,
so
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 0280a04ed9dbdaaae552b79b7a704625bd8e27cf upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFA ports,
so
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By
Biju Das <biju.das.jz@...>
·
#5304
·
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[PATCH 4.4.y-cip 13/30] ARM: multi_v7_defconfig: Enable r8a7742 SoC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 44b6141ebe936808fc59b386e3e259bef6c9bba6 upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 44b6141ebe936808fc59b386e3e259bef6c9bba6 upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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By
Biju Das <biju.das.jz@...>
·
#5303
·
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[PATCH 4.4.y-cip 12/30] ARM: shmobile: defconfig: Enable r8a7742 SoC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 1a90c5ba48c43aeaeccebcd3e092888b670a4bab upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 1a90c5ba48c43aeaeccebcd3e092888b670a4bab upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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By
Biju Das <biju.das.jz@...>
·
#5302
·
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[PATCH 4.4.y-cip 11/30] ARM: debug-ll: Add support for r8a7742
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 96866b1a1d32318b6bbc321a762bf79db1f4686e upstream.
Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses
SCIFA2
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 96866b1a1d32318b6bbc321a762bf79db1f4686e upstream.
Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses
SCIFA2
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By
Biju Das <biju.das.jz@...>
·
#5301
·
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[PATCH 4.4.y-cip 10/30] soc: renesas: Add Renesas R8A7742 config option
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit cdc8abe763c99a6c2b854d7096eaf1ea21017a42 upstream.
Add configuration option for the RZ/G1H (R8A77420) SoC.
Signed-off-by: Lad
|
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit cdc8abe763c99a6c2b854d7096eaf1ea21017a42 upstream.
Add configuration option for the RZ/G1H (R8A77420) SoC.
Signed-off-by: Lad
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By
Biju Das <biju.das.jz@...>
·
#5300
·
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[PATCH 4.4.y-cip 09/30] ARM: shmobile: r8a7742: Basic SoC support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 135e7a156ae2c1a7a1f0c1d44bf2b3daece04bbf upstream.
Add minimal support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 135e7a156ae2c1a7a1f0c1d44bf2b3daece04bbf upstream.
Add minimal support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad
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By
Biju Das <biju.das.jz@...>
·
#5299
·
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[PATCH 4.4.y-cip 08/30] clk: shmobile: Compile clk-rcar-gen2.c when using the r8a7742
This patch makes sure clk-rcar-gen2,c gets compiled when
CONFIG_ARCH_R8A7742 is selected, similarly to what done by
commit:
7bac4ad3e40f ("CIP: Build essential clock driver for Renesas
RZ/G1
|
This patch makes sure clk-rcar-gen2,c gets compiled when
CONFIG_ARCH_R8A7742 is selected, similarly to what done by
commit:
7bac4ad3e40f ("CIP: Build essential clock driver for Renesas
RZ/G1
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By
Biju Das <biju.das.jz@...>
·
#5298
·
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[PATCH 4.4.y-cip 07/30] clk: shmobile: Document r8a7742 CPG DIV6 clock support
Document r8a7742 CPG DIV6 clock support.
The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new
|
Document r8a7742 CPG DIV6 clock support.
The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new
|
By
Biju Das <biju.das.jz@...>
·
#5297
·
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[PATCH 4.4.y-cip 06/30] clk: shmobile: Document r8a7742 MSTP clock support
Document r8a7742 MSTP clock support.
The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new
|
Document r8a7742 MSTP clock support.
The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new
|
By
Biju Das <biju.das.jz@...>
·
#5296
·
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[PATCH 4.4.y-cip 05/30] clk: shmobile: Document r8a7742 CPG clock support
Document r8a7742 CPG clock support.
The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new
|
Document r8a7742 CPG clock support.
The clock driver architecture has changed quite dramatically
over time, there is nothing we can backport from mainline
for this, hence the new
|
By
Biju Das <biju.das.jz@...>
·
#5295
·
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[PATCH 4.4.y-cip 04/30] ARM: shmobile: r8a7742: Add clock index macros for DT sources
Add macros usable by device tree sources to reference r8a7742 clocks by
index.
Unfortunately there is nothing that we can backport from mainline
for this, as the architecture of the clock driver has
|
Add macros usable by device tree sources to reference r8a7742 clocks by
index.
Unfortunately there is nothing that we can backport from mainline
for this, as the architecture of the clock driver has
|
By
Biju Das <biju.das.jz@...>
·
#5294
·
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[PATCH 4.4.y-cip 03/30] soc: renesas: rcar-rst: Add support for RZ/G1H
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 2f71832755a9422f5a62a13ea3e805df7b173837 upstream.
Add support for RZ/G1H (R8A7742) to the R-Car RST driver.
Signed-off-by: Lad
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 2f71832755a9422f5a62a13ea3e805df7b173837 upstream.
Add support for RZ/G1H (R8A7742) to the R-Car RST driver.
Signed-off-by: Lad
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By
Biju Das <biju.das.jz@...>
·
#5293
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