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[PATCH 4.4.y-cip 29/30] dt-bindings: arm: renesas: Document iW-RainboW-G21D-Qseven-RZG1H board
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 0b5832238d369a71f90a221d17b92761595c8067 upsream.
Document the iW-RainboW-G21D-Qseven-RZG1H device tree bindings,
listing it as a
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 0b5832238d369a71f90a221d17b92761595c8067 upsream.
Document the iW-RainboW-G21D-Qseven-RZG1H device tree bindings,
listing it as a
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By
Biju Das <biju.das.jz@...>
·
#5319
·
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[PATCH 4.4.y-cip 28/30] ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 269785eaba09172c5189e30d2202084586aeabdd upstream.
Add support for iWave RZ/G1H Qseven System On Module.
Signed-off-by: Lad
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 269785eaba09172c5189e30d2202084586aeabdd upstream.
Add support for iWave RZ/G1H Qseven System On Module.
Signed-off-by: Lad
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By
Biju Das <biju.das.jz@...>
·
#5318
·
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[PATCH 4.4.y-cip 27/30] dt-bindings: arm: renesas: Document iW-RainboW-G21M-Qseven-RZG1H SoM
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 844beed47182903212d8230ac6d729be1287733e upstream.
Document the iW-RainboW-G21M-Qseven-RZG1H device tree bindings,
listing it as
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 844beed47182903212d8230ac6d729be1287733e upstream.
Document the iW-RainboW-G21M-Qseven-RZG1H device tree bindings,
listing it as
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By
Biju Das <biju.das.jz@...>
·
#5317
·
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[PATCH 4.4.y-cip 26/30] ARM: dts: r8a7742: Add GPIO nodes
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 7fc3b53a7bd6ebfffd22a75f57175b80fa3df834
Describe GPIO blocks in the R8A7742 device tree.
Signed-off-by: Lad Prabhakar
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 7fc3b53a7bd6ebfffd22a75f57175b80fa3df834
Describe GPIO blocks in the R8A7742 device tree.
Signed-off-by: Lad Prabhakar
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By
Biju Das <biju.das.jz@...>
·
#5316
·
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[PATCH 4.4.y-cip 25/30] dt-bindings: gpio: renesas, rcar-gpio: Add r8a7742 (RZ/G1H) support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 39c7c93de02c2c0c150ff41f33068c201b964050 upstream.
Renesas RZ/G1H (R8A7742) SoC GPIO blocks are identical to the R-Car
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 39c7c93de02c2c0c150ff41f33068c201b964050 upstream.
Renesas RZ/G1H (R8A7742) SoC GPIO blocks are identical to the R-Car
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By
Biju Das <biju.das.jz@...>
·
#5315
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[PATCH 4.4.y-cip 24/30] ARM: dts: r8a7742: Initial SoC device tree
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit eb4cdda7a30b3f9894fd5a58e0201fa57861183f upstream.
The initial R8A7742 SoC device tree including CPU[0-8], PMU, PFC,
CPG, RST,
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit eb4cdda7a30b3f9894fd5a58e0201fa57861183f upstream.
The initial R8A7742 SoC device tree including CPU[0-8], PMU, PFC,
CPG, RST,
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By
Biju Das <biju.das.jz@...>
·
#5314
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[PATCH 4.4.y-cip 23/30] pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 4ecc7ff82ecfdf44997ed2a1016945fc8f6fca3e upstream.
Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790),
however it
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 4ecc7ff82ecfdf44997ed2a1016945fc8f6fca3e upstream.
Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790),
however it
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By
Biju Das <biju.das.jz@...>
·
#5313
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[PATCH 4.4.y-cip 22/30] pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group
From: Geert Uytterhoeven <geert+renesas@...>
commit 66e9fe1ec73929a9f7326856699d262bab8e9fb0 upstream.
The pin controller drivers for all R-Car Gen2 SoCs have entries for the
EtherAVB TX_ER
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From: Geert Uytterhoeven <geert+renesas@...>
commit 66e9fe1ec73929a9f7326856699d262bab8e9fb0 upstream.
The pin controller drivers for all R-Car Gen2 SoCs have entries for the
EtherAVB TX_ER
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By
Biju Das <biju.das.jz@...>
·
#5312
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[PATCH 4.4.y-cip 21/30] pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
From: Geert Uytterhoeven <geert+renesas@...>
commit 53ec9ccd1c62b644d81674e013b1800dd88ec92b upstream.
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the
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From: Geert Uytterhoeven <geert+renesas@...>
commit 53ec9ccd1c62b644d81674e013b1800dd88ec92b upstream.
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the
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By
Biju Das <biju.das.jz@...>
·
#5311
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[PATCH 4.4.y-cip 20/30] pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
From: Geert Uytterhoeven <geert+renesas@...>
commit 01af9ecbd7bd7d688c54d73a7fa8f7e10ab29d8c upstream.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Kuninori Morimoto
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From: Geert Uytterhoeven <geert+renesas@...>
commit 01af9ecbd7bd7d688c54d73a7fa8f7e10ab29d8c upstream.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Kuninori Morimoto
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By
Biju Das <biju.das.jz@...>
·
#5310
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[PATCH 4.4.y-cip 19/30] dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit baf674bf717f8224f33e453e1df92a96c4d6ce48 upstream.
Document PFC support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit baf674bf717f8224f33e453e1df92a96c4d6ce48 upstream.
Document PFC support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad
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By
Biju Das <biju.das.jz@...>
·
#5309
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[PATCH 4.4.y-cip 18/30] dt-bindings: mmc: renesas,mmcif: Document r8a7742 DT bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 194f9b21ad64740eb9675703037fe42113cea65c upstream.
Add support for r8a7742 SoC. Renesas RZ/G1H (R8A7742) MMCIF is identical
to
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 194f9b21ad64740eb9675703037fe42113cea65c upstream.
Add support for r8a7742 SoC. Renesas RZ/G1H (R8A7742) MMCIF is identical
to
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By
Biju Das <biju.das.jz@...>
·
#5308
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[PATCH 4.4.y-cip 17/30] dt-bindings: serial: renesas,hscif: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 65994c09bc66d7241be2f7d6eb3b43f894ba2db0 upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible HSCIF ports,
so
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 65994c09bc66d7241be2f7d6eb3b43f894ba2db0 upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible HSCIF ports,
so
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By
Biju Das <biju.das.jz@...>
·
#5307
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[PATCH 4.4.y-cip 16/30] dt-bindings: serial: renesas,scifb: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 3cf1601ab00ce55820e6130611f536b326563a7e upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFB ports,
so
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 3cf1601ab00ce55820e6130611f536b326563a7e upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFB ports,
so
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By
Biju Das <biju.das.jz@...>
·
#5306
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[PATCH 4.4.y-cip 15/30] dt-bindings: serial: renesas,scif: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 8908a822663f6958f56174120de383ff955874be upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIF ports,
so
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 8908a822663f6958f56174120de383ff955874be upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIF ports,
so
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By
Biju Das <biju.das.jz@...>
·
#5305
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[PATCH 4.4.y-cip 14/30] dt-bindings: serial: renesas,scifa: Document r8a7742 bindings
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 0280a04ed9dbdaaae552b79b7a704625bd8e27cf upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFA ports,
so
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 0280a04ed9dbdaaae552b79b7a704625bd8e27cf upstream.
RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFA ports,
so
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By
Biju Das <biju.das.jz@...>
·
#5304
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[PATCH 4.4.y-cip 13/30] ARM: multi_v7_defconfig: Enable r8a7742 SoC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 44b6141ebe936808fc59b386e3e259bef6c9bba6 upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 44b6141ebe936808fc59b386e3e259bef6c9bba6 upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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By
Biju Das <biju.das.jz@...>
·
#5303
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[PATCH 4.4.y-cip 12/30] ARM: shmobile: defconfig: Enable r8a7742 SoC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 1a90c5ba48c43aeaeccebcd3e092888b670a4bab upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 1a90c5ba48c43aeaeccebcd3e092888b670a4bab upstream.
Enable recently added r8a7742 (RZ/G1H) SoC.
Signed-off-by: Lad Prabhakar
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By
Biju Das <biju.das.jz@...>
·
#5302
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[PATCH 4.4.y-cip 11/30] ARM: debug-ll: Add support for r8a7742
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 96866b1a1d32318b6bbc321a762bf79db1f4686e upstream.
Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses
SCIFA2
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit 96866b1a1d32318b6bbc321a762bf79db1f4686e upstream.
Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses
SCIFA2
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By
Biju Das <biju.das.jz@...>
·
#5301
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[PATCH 4.4.y-cip 10/30] soc: renesas: Add Renesas R8A7742 config option
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit cdc8abe763c99a6c2b854d7096eaf1ea21017a42 upstream.
Add configuration option for the RZ/G1H (R8A77420) SoC.
Signed-off-by: Lad
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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
commit cdc8abe763c99a6c2b854d7096eaf1ea21017a42 upstream.
Add configuration option for the RZ/G1H (R8A77420) SoC.
Signed-off-by: Lad
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By
Biju Das <biju.das.jz@...>
·
#5300
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