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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Hello Pavel,
We don't have any boards in the CIP labs yet, but there is a plan to add some.
Kind regards, Chris
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Hello Pavel,
We don't have any boards in the CIP labs yet, but there is a plan to add some.
Kind regards, Chris
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By
Chris Paterson
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#7110
·
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Hi Pavel,
By
Lad Prabhakar
·
#7109
·
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Hi!
I have reviewed patches and they look okay to me. I'll proceed with
testing.
Do we have suitable board in the test lab / is there plan to add one?
Best regards,
Pavel
--
DENX Software
|
Hi!
I have reviewed patches and they look okay to me. I'll proceed with
testing.
Do we have suitable board in the test lab / is there plan to add one?
Best regards,
Pavel
--
DENX Software
|
By
Pavel Machek
·
#7108
·
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[PATCH 5.10.y-cip 7/7] arm64: defconfig: Enable ARCH_R9A07G044
commit 27a79a723d48dbeccb4fe6f7ede47e67642e6a4a upstream.
Enable the Renesas RZ/G2L SoC variants in the ARM64 defconfig.
Signed-off-by: Lad Prabhakar
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commit 27a79a723d48dbeccb4fe6f7ede47e67642e6a4a upstream.
Enable the Renesas RZ/G2L SoC variants in the ARM64 defconfig.
Signed-off-by: Lad Prabhakar
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By
Lad Prabhakar
·
#7107
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[PATCH 5.10.y-cip 6/7] soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
commit 187cd57db09355fd169c661fa1c44bda06b013e8 upstream.
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.
Signed-off-by: Lad Prabhakar
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commit 187cd57db09355fd169c661fa1c44bda06b013e8 upstream.
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.
Signed-off-by: Lad Prabhakar
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By
Lad Prabhakar
·
#7106
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[PATCH 5.10.y-cip 5/7] soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
commit f3b154529fb89e9feae18d5e9da40559172d8d19 upstream.
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas
RZ/G2L SoC variants.
Signed-off-by: Lad Prabhakar
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commit f3b154529fb89e9feae18d5e9da40559172d8d19 upstream.
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas
RZ/G2L SoC variants.
Signed-off-by: Lad Prabhakar
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By
Lad Prabhakar
·
#7105
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[PATCH 5.10.y-cip 4/7] dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller
commit 972f67be8929ac095df6a8bbce738b4f39e984cb upstream.
Add DT binding documentation for SYSC controller found on
RZ/G2{L,LC,UL} SoC's.
SYSC block contains the LSI_DEVID register which is used to
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commit 972f67be8929ac095df6a8bbce738b4f39e984cb upstream.
Add DT binding documentation for SYSC controller found on
RZ/G2{L,LC,UL} SoC's.
SYSC block contains the LSI_DEVID register which is used to
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By
Lad Prabhakar
·
#7104
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[PATCH 5.10.y-cip 3/7] dt-bindings: arm: renesas: Document SMARC EVK
commit 4affc072e4fef6d1778f957037f255a6acdd44e2 upstream.
Document Renesas SMARC EVK board which are based on RZ/G2L (R9A07G044)
SoC. The SMARC EVK consists of RZ/G2L SoM module and SMARC carrier
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commit 4affc072e4fef6d1778f957037f255a6acdd44e2 upstream.
Document Renesas SMARC EVK board which are based on RZ/G2L (R9A07G044)
SoC. The SMARC EVK consists of RZ/G2L SoM module and SMARC carrier
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By
Lad Prabhakar
·
#7103
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[PATCH 5.10.y-cip 2/7] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants
commit 2cd22416745fe1f0f6b6fa70c09438f85e20c693 upstream.
Add device tree bindings documentation for Renesas RZ/G2{L,LC}
SoC variants.
Signed-off-by: Lad Prabhakar
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commit 2cd22416745fe1f0f6b6fa70c09438f85e20c693 upstream.
Add device tree bindings documentation for Renesas RZ/G2{L,LC}
SoC variants.
Signed-off-by: Lad Prabhakar
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By
Lad Prabhakar
·
#7102
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[PATCH 5.10.y-cip 1/7] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC
commit 305b80780879117b3448da42afe95af312393fbd upstream.
Add device tree bindings documentation for Renesas RZ/G2UL SoC.
Signed-off-by: Lad Prabhakar
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commit 305b80780879117b3448da42afe95af312393fbd upstream.
Add device tree bindings documentation for Renesas RZ/G2UL SoC.
Signed-off-by: Lad Prabhakar
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By
Lad Prabhakar
·
#7101
·
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[PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Hi All,
This patch series adds initial support for Renesas RZ/G2L SoC [0] and
Renesas RZ/G2L SMARC EVK [1].
The RZ/G2L microprocessor includes a Cortex-A55 (1.2 GHz) CPU, 16-bit
DDR3L/DDR4
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Hi All,
This patch series adds initial support for Renesas RZ/G2L SoC [0] and
Renesas RZ/G2L SMARC EVK [1].
The RZ/G2L microprocessor includes a Cortex-A55 (1.2 GHz) CPU, 16-bit
DDR3L/DDR4
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By
Lad Prabhakar
·
#7100
·
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Re: Renesas RZ/G2L support for 5.10-cip
Hi Nobuhiro,
By
Lad Prabhakar
·
#7099
·
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Re: Renesas RZ/G2L support for 5.10-cip
Hi Prabhakar,
I suggest splitting it up and sending it by feature if possible.
In this case, we can review each feature separately.
Best regards,
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Hi Prabhakar,
I suggest splitting it up and sending it by feature if possible.
In this case, we can review each feature separately.
Best regards,
|
By
Nobuhiro Iwamatsu
·
#7098
·
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Renesas RZ/G2L support for 5.10-cip
Hi Nobuhiro, Pavel,
I have prepared ~105 patches adding support for Renesas RZ/G2L on 5.10-cip (all patches cherry picked from v5.16-rc5). Is it OK if I bulk post the patches or do you prefer them in
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Hi Nobuhiro, Pavel,
I have prepared ~105 patches adding support for Renesas RZ/G2L on 5.10-cip (all patches cherry picked from v5.16-rc5). Is it OK if I bulk post the patches or do you prefer them in
|
By
Lad Prabhakar
·
#7097
·
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Re: [isar-cip-core][PATCH v2] conf/machine/*: Add variable to set version of kernel defconfig
Thanks, applied.
Jan
--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux
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Thanks, applied.
Jan
--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux
|
By
Jan Kiszka
·
#7096
·
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[isar-cip-core][PATCH v2] conf/machine/*: Add variable to set version of kernel defconfig
From: Quirin Gylstorff <quirin.gylstorff@...>
This fixes an issue, that the defconfig from kernel 4.19.X does not
work with kernel 5.10.X. The kernel boots but cannot find any qemu
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From: Quirin Gylstorff <quirin.gylstorff@...>
This fixes an issue, that the defconfig from kernel 4.19.X does not
work with kernel 5.10.X. The kernel boots but cannot find any qemu
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By
Quirin Gylstorff
·
#7095
·
|
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cip/linux-4.4.y-cip baseline: 102 runs, 2 regressions (v4.4.294-cip66)
#kernelci
cip/linux-4.4.y-cip baseline: 102 runs, 2 regressions (v4.4.294-cip66)
Regressions Summary
-------------------
platform | arch | lab | compiler | defconfig |
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cip/linux-4.4.y-cip baseline: 102 runs, 2 regressions (v4.4.294-cip66)
Regressions Summary
-------------------
platform | arch | lab | compiler | defconfig |
|
By
kernelci.org bot <bot@...>
·
#7094
·
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cip/linux-4.19.y-cip baseline: 137 runs, 4 regressions (v4.19.220-cip63)
#kernelci
cip/linux-4.19.y-cip baseline: 137 runs, 4 regressions (v4.19.220-cip63)
Regressions Summary
-------------------
platform | arch | lab | compiler | defconfig
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cip/linux-4.19.y-cip baseline: 137 runs, 4 regressions (v4.19.220-cip63)
Regressions Summary
-------------------
platform | arch | lab | compiler | defconfig
|
By
kernelci.org bot <bot@...>
·
#7093
·
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cip/linux-4.4.y-cip build: 187 builds: 8 failed, 179 passed, 6 errors, 48 warnings (v4.4.294-cip66)
#kernelci
cip/linux-4.4.y-cip build: 187 builds: 8 failed, 179 passed, 6 errors, 48 warnings (v4.4.294-cip66)
Full Build Summary:
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cip/linux-4.4.y-cip build: 187 builds: 8 failed, 179 passed, 6 errors, 48 warnings (v4.4.294-cip66)
Full Build Summary:
|
By
kernelci.org bot <bot@...>
·
#7092
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cip/linux-4.19.y-cip build: 118 builds: 1 failed, 117 passed, 2 errors, 13 warnings (v4.19.220-cip63)
#kernelci
cip/linux-4.19.y-cip build: 118 builds: 1 failed, 117 passed, 2 errors, 13 warnings (v4.19.220-cip63)
Full Build Summary:
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cip/linux-4.19.y-cip build: 118 builds: 1 failed, 117 passed, 2 errors, 13 warnings (v4.19.220-cip63)
Full Build Summary:
|
By
kernelci.org bot <bot@...>
·
#7091
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