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[RESEND PATCH 5.10.y-cip 38/40] arm64: dts: renesas: r9a07g044: Add SDHI nodes
From: Biju Das <biju.das.jz@...>
commit a83ad872f4ba6b9fbf81b9f70d6ff6d61d74bf7e upstream.
Add SDHI{0, 1} nodes to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das
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From: Biju Das <biju.das.jz@...>
commit a83ad872f4ba6b9fbf81b9f70d6ff6d61d74bf7e upstream.
Add SDHI{0, 1} nodes to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das
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By
Lad Prabhakar
·
#7949
·
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[RESEND PATCH 5.10.y-cip 37/40] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
From: Biju Das <biju.das.jz@...>
commit 217c7d1840b5377543eff84fe28409d0bd4d3433 upstream.
Rename the below RZ/G2L clocks to match with the clock names used in
R-Car Gen2 and later
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From: Biju Das <biju.das.jz@...>
commit 217c7d1840b5377543eff84fe28409d0bd4d3433 upstream.
Rename the below RZ/G2L clocks to match with the clock names used in
R-Car Gen2 and later
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By
Lad Prabhakar
·
#7948
·
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[RESEND PATCH 5.10.y-cip 36/40] dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock
From: Wolfram Sang <wsa+renesas@...>
commit e051025efac3929ca7e3e2f2c8860d3447366ebc upstream.
This only applies to R-Car Gen2 and later generations, so we need
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From: Wolfram Sang <wsa+renesas@...>
commit e051025efac3929ca7e3e2f2c8860d3447366ebc upstream.
This only applies to R-Car Gen2 and later generations, so we need
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By
Lad Prabhakar
·
#7947
·
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[RESEND PATCH 5.10.y-cip 35/40] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings
From: Biju Das <biju.das.jz@...>
commit bfadee4554c3782bfbc5943866bd2ad44d631e50 upstream.
Document RZ/G2L SDHI controller bindings.
Signed-off-by: Biju Das
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From: Biju Das <biju.das.jz@...>
commit bfadee4554c3782bfbc5943866bd2ad44d631e50 upstream.
Document RZ/G2L SDHI controller bindings.
Signed-off-by: Biju Das
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By
Lad Prabhakar
·
#7946
·
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[RESEND PATCH 5.10.y-cip 34/40] dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning
From: Biju Das <biju.das.jz@...>
commit 4aba5dc71eae041aa1a9240de10ad2e30e9f32dd upstream.
Fix dtbs-check warning pinctrl-names:0:'default' was expected
for r8a77470-iwg23s-sbc.dts
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From: Biju Das <biju.das.jz@...>
commit 4aba5dc71eae041aa1a9240de10ad2e30e9f32dd upstream.
Fix dtbs-check warning pinctrl-names:0:'default' was expected
for r8a77470-iwg23s-sbc.dts
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By
Lad Prabhakar
·
#7945
·
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[RESEND PATCH 5.10.y-cip 33/40] dt-bindings: Drop redundant minItems/maxItems
From: Rob Herring <robh@...>
commit 972d6a7dcec3ad3226661034c5d8cb2d30585157 upstream.
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is
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From: Rob Herring <robh@...>
commit 972d6a7dcec3ad3226661034c5d8cb2d30585157 upstream.
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is
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By
Lad Prabhakar
·
#7944
·
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[RESEND PATCH 5.10.y-cip 32/40] dt-bindings: Fix errors in 'if' schemas
From: Rob Herring <robh@...>
commit 9183908e70e913d2db052588172968da55d82af5 upstream.
Properties in if/then schemas weren't getting checked by the meta-schemas.
Enabling meta-schema checks
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From: Rob Herring <robh@...>
commit 9183908e70e913d2db052588172968da55d82af5 upstream.
Properties in if/then schemas weren't getting checked by the meta-schemas.
Enabling meta-schema checks
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By
Lad Prabhakar
·
#7943
·
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[RESEND PATCH 5.10.y-cip 31/40] clk: renesas: r9a07g044: Add SDHI clock and reset entries
From: Biju Das <biju.das.jz@...>
commit 373bd6f487562e8727bc842e9983b093d57968cc upstream.
Add SDHI{0,1} mux, clock and reset entries to CPG driver.
Signed-off-by: Biju Das
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From: Biju Das <biju.das.jz@...>
commit 373bd6f487562e8727bc842e9983b093d57968cc upstream.
Add SDHI{0,1} mux, clock and reset entries to CPG driver.
Signed-off-by: Biju Das
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By
Lad Prabhakar
·
#7942
·
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[RESEND PATCH 5.10.y-cip 30/40] clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
commit 33748744f15a110a233b6ae0380f476006e770f0 upstream.
of_genpd_add_provider_simple() might fail, this patch makes sure we check
the return value of of_genpd_add_provider_simple() by propagating
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commit 33748744f15a110a233b6ae0380f476006e770f0 upstream.
of_genpd_add_provider_simple() might fail, this patch makes sure we check
the return value of of_genpd_add_provider_simple() by propagating
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By
Lad Prabhakar
·
#7941
·
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[RESEND PATCH 5.10.y-cip 29/40] clk: renesas: rzg2l: Check return value of pm_genpd_init()
commit 27527a3d3b162e4512798c058c0e8a216c721187 upstream.
Make sure we check the return value of pm_genpd_init() which might fail.
Also add a devres action to remove the power-domain in-case the
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commit 27527a3d3b162e4512798c058c0e8a216c721187 upstream.
Make sure we check the return value of pm_genpd_init() which might fail.
Also add a devres action to remove the power-domain in-case the
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By
Lad Prabhakar
·
#7940
·
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[RESEND PATCH 5.10.y-cip 28/40] clk: renesas: rzg2l: Add missing kerneldoc for resets
From: Geert Uytterhoeven <geert+renesas@...>
commit 099ee03271208c880aa33b8833edfacd5010a89a upstream.
make W=1:
drivers/clk/renesas/rzg2l-cpg.c:95: warning: Function parameter or member
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From: Geert Uytterhoeven <geert+renesas@...>
commit 099ee03271208c880aa33b8833edfacd5010a89a upstream.
make W=1:
drivers/clk/renesas/rzg2l-cpg.c:95: warning: Function parameter or member
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By
Lad Prabhakar
·
#7939
·
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[RESEND PATCH 5.10.y-cip 27/40] clk: renesas: rzg2l: Add SDHI clk mux support
From: Biju Das <biju.das.jz@...>
commit eaff33646f4cb6a541d01013b0a222f03f6dfac3 upstream.
Add SDHI clk mux support to select SDHI clock from different clock
sources.
As per HW manual,
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From: Biju Das <biju.das.jz@...>
commit eaff33646f4cb6a541d01013b0a222f03f6dfac3 upstream.
Add SDHI clk mux support to select SDHI clock from different clock
sources.
As per HW manual,
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By
Lad Prabhakar
·
#7938
·
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[RESEND PATCH 5.10.y-cip 26/40] mmc: tmio: reinit card irqs in reset routine
From: Biju Das <biju.das.jz@...>
commit e315b1f3a170f368da5618f8a598e68880302ed1 upstream.
Refactor the code so that card detect irqs are always reenabled after a
reset. This avoids doing
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From: Biju Das <biju.das.jz@...>
commit e315b1f3a170f368da5618f8a598e68880302ed1 upstream.
Refactor the code so that card detect irqs are always reenabled after a
reset. This avoids doing
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By
Lad Prabhakar
·
#7937
·
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[RESEND PATCH 5.10.y-cip 25/40] mmc: tmio: reenable card irqs after the reset callback
From: Wolfram Sang <wsa+renesas@...>
commit 90935eb303e0d12f3d3d0383262e65290321f5f6 upstream.
The reset callback may clear the internal card detect interrupts, so
make sure to
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From: Wolfram Sang <wsa+renesas@...>
commit 90935eb303e0d12f3d3d0383262e65290321f5f6 upstream.
The reset callback may clear the internal card detect interrupts, so
make sure to
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By
Lad Prabhakar
·
#7936
·
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[RESEND PATCH 5.10.y-cip 24/40] mmc: tmio: always restore irq register
From: Wolfram Sang <wsa+renesas@...>
commit 0751d56ef1f25c4206626dff99445db34dedf437 upstream.
Currently, only SDHI on R-Car Gen2+ reinitializes the irq register
during reset but it
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From: Wolfram Sang <wsa+renesas@...>
commit 0751d56ef1f25c4206626dff99445db34dedf437 upstream.
Currently, only SDHI on R-Car Gen2+ reinitializes the irq register
during reset but it
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By
Lad Prabhakar
·
#7935
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[RESEND PATCH 5.10.y-cip 23/40] mmc: tmio: always flag retune when resetting and a card is present
From: Wolfram Sang <wsa+renesas@...>
commit 6e5c951b4c3a0bd9aa5838ecec98f3c795c83ff1 upstream.
After reset, we manually flagged retune in runtime resume, but missed it
in the
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From: Wolfram Sang <wsa+renesas@...>
commit 6e5c951b4c3a0bd9aa5838ecec98f3c795c83ff1 upstream.
After reset, we manually flagged retune in runtime resume, but missed it
in the
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By
Lad Prabhakar
·
#7934
·
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[RESEND PATCH 5.10.y-cip 22/40] mmc: renesas_sdhi: do hard reset if possible
From: Wolfram Sang <wsa+renesas@...>
commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream.
All recent SDHI instances can be reset via the reset controller. If one
is found, use
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From: Wolfram Sang <wsa+renesas@...>
commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream.
All recent SDHI instances can be reset via the reset controller. If one
is found, use
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By
Lad Prabhakar
·
#7933
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[RESEND PATCH 5.10.y-cip 21/40] mmc: renesas_sdhi: break SCC reset into own function
From: Wolfram Sang <wsa+renesas@...>
commit 0e5870145840e91fc33cd4eca6e228b009d86705 upstream.
renesas_sdhi_reset used to mainly reset the SCC but is now doing more
and even more
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From: Wolfram Sang <wsa+renesas@...>
commit 0e5870145840e91fc33cd4eca6e228b009d86705 upstream.
renesas_sdhi_reset used to mainly reset the SCC but is now doing more
and even more
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By
Lad Prabhakar
·
#7932
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[RESEND PATCH 5.10.y-cip 20/40] mmc: tmio: restore bus width when resetting
From: Takeshi Saito <takeshi.saito.xv@...>
commit 0a446288aa9f28ab00a31b8b51fdb005953f9f99 upstream.
Resetting the IP core will lose the bus width information and not all
code paths recover
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From: Takeshi Saito <takeshi.saito.xv@...>
commit 0a446288aa9f28ab00a31b8b51fdb005953f9f99 upstream.
Resetting the IP core will lose the bus width information and not all
code paths recover
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By
Lad Prabhakar
·
#7931
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[RESEND PATCH 5.10.y-cip 19/40] mmc: tmio: abort DMA before reset
From: Wolfram Sang <wsa+renesas@...>
commit ab0cdefec052825303c05687d9416bafc867fe3d upstream.
We will soon allow resetting the whole IP core via a reset controller.
For this case,
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From: Wolfram Sang <wsa+renesas@...>
commit ab0cdefec052825303c05687d9416bafc867fe3d upstream.
We will soon allow resetting the whole IP core via a reset controller.
For this case,
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By
Lad Prabhakar
·
#7930
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