From: Takeshi Kihara <takeshi.kihara.df@...> commit 8d7bcad65ef390ef9efd4b3d3fd18dc2a08f2a14 upstream. This patch adds I2C{0,3,5} pins, groups and functions to the R8A7796 SoC. These pins

From: Jacopo Mondi <jacopo+renesas@...> commit 10e78f03da181b24f33a8a77047fb6798126fb46 upstream. Versioned VIN groups can appear on different sets of pins. Using the VIN_DATA_PIN_GROUP macro

From: Geert Uytterhoeven <geert+renesas@...> commit 542ffc9e026a3f736eeaa041823d406510f40a12 upstream. Extend the run-time debug code with checks to ensure there are no conflicting pin names,

From: Geert Uytterhoeven <geert+renesas@...> commit 3dd5fd79f07103f7cda30567f8bf85a854796dd6 upstream. The pinmux groups and functions arrays may contain two parts, to ease supporting SoCs

From: Geert Uytterhoeven <geert+renesas@...> commit 80cde64f68ff09617f89e78dfadf5a6873be87a8 upstream. All run-time debug code is called from sh_pfc_init(), which is __init. Fixes:

From: Geert Uytterhoeven <geert+renesas@...> commit 5f304f8c87c71572da4ee514eb2ec50f8f4d2e26 upstream. Improve wording while at it. Fixes: 6161b39a14380815 ("pinctrl: sh-pfc: Validate pinmux

From: Geert Uytterhoeven <geert+renesas@...> commit 4818f448986dd8d0e28b648be5f99c3f29abe6bf upstream. Add new macros for describing pins without GPIO functionality: - NOGP_ALL() expands to

From: Geert Uytterhoeven <geert+renesas@...> commit f1074e7281a2e83b1cca7dee8f7005fbcc1f594e upstream. It is very common for a pin to support both pull-up and pull-down functionality. Hence

From: Geert Uytterhoeven <geert+renesas@...> commit bd79c92039f117a3e448b9ef042595497a5218a6 upstream. There are two variants of the CPU_ALL_PORT() macro in use: 1. A three-parameter

From: Geert Uytterhoeven <geert+renesas@...> commit 360328c7dc15f48dd9b6187e7d4a9517a64e51f7 upstream. - The IPSR field is meant for documentation only, - The function name refers to the

From: Geert Uytterhoeven <geert+renesas@...> commit fa4d36712f20e2425171ab1f62341ebb6416d3ea upstream. Add a run-time check to the PINMUX_CFG_REG_VAR() macro, to ensure the number of provided

From: Geert Uytterhoeven <geert+renesas@...> commit c481c8178420b8cc8b188807fe6eee8b069ce2d8 upstream. Add build-time checks to the PINMUX_CFG_REG() and PINMUX_DATA_REG() macros, to ensure the

From: Geert Uytterhoeven <geert+renesas@...> commit 19b593a1cf068effeca496f5dc92e5ad43f91bb2 upstream. Currently the PINMUX_DATA_REG() macro must be followed by initialization data, specifying

From: Geert Uytterhoeven <geert+renesas@...> commit 69f7be1c6314fb0b1d5e2b101726db0c90f1ee61 upstream. Currently the PINMUX_CFG_REG_VAR() macro must be followed by initialization data,

From: Geert Uytterhoeven <geert+renesas@...> commit efca8da0c5fcc7f5617bab769faa595f7efdc593 upstream. Currently the PINMUX_CFG_REG() macro must be followed by initialization data, specifying

From: Geert Uytterhoeven <geert+renesas@...> commit 5e8588c86d71e78de9e97103324d9127063f18d0 upstream. Add a build-time check, to ensure the register and field widths in descriptors for config

From: Geert Uytterhoeven <geert+renesas@...> commit f83f97684a737f66c9a10437544c92e3436ca4e0 upstream. pinmux_cfg_reg.var_field_width[] is actually a variable-length array, terminated by a

From: Geert Uytterhoeven <geert+renesas@...> commit 9925e879572680125c5d00ad8b807aec720b1cb6 upstream. Add a build-time check, to ensure the number of pins and pin marks in a pin group

From: Ulrich Hecht <uli+renesas@...> commit 50d1ba1764b3e00ae8c331202d50c5535d6b3361 upstream. Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs. Signed-off-by: Ulrich Hecht

From: Geert Uytterhoeven <geert+renesas@...> commit 6161b39a14380815f22851c753c00acf81cfa62a upstream. Perform some basic sanity checks on all built-in pinmux tables when DEBUG is defined, to