Hi! A bit trivial, but looks ok to me. I can apply it if there are no other comments. Best regards, Pavel -- DENX Software

Hi! Looks ok to me. I can apply it if it passes testing and there are no other comments. Best regards, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB

From: Chris Paterson <chris.paterson2@...> commit d1273f541ab409242e08da6bb836bb564021274c upstream. This dts is for the RZ/V2L SMARC EVK, not RZ/G2L. Fixes: f91c4c74796a ("arm64: dts:

commit 02c96ed9e4cd1f47bfcd10296fec6b0b69d6b3c6 upstream. As per RZ/G2L HW(Rev.1.10) manual, reset monitor register value 0 means reset signal is not applied (deassert state) and 1 means reset

Hi, CIP kernel team has released Linux kernel v4.19.255-cip79 and v5.10.136-cip14. The linux-4.19.y-cip tree has been updated base version from v4.19.252 to v4.19.255, and the linux-5.10.y-cip tree

Why not using the UEFI path, like we have for qemu-arm already? Would be much simpler to add (and likely also to maintain). Also, I'm skeptical that your changes didn't break the UEFI

I might be on the road when today's meeting starts. I'm reviewing 5.10.137 ATM. CU Uli

Hi, As another suggestion, I've put the riscv64 debian rootfs image below. https://people.debian.org/~iwamatsu/riscv64-unstable-base.tar.gz Please feel free to use. Best regards,

Hello Pavel, Sorry, it seems the image is generated as .ext4 by default: build/tmp/deploy/images/qemu-riscv64/cip-core-image-cip-core-sid-ports-qemu-riscv64.ext4 My understanding is debian ports

From: Shivanand Kunijadar <Shivanand.Kunijadar@...> Signed-off-by: Shivanand Kunijadar <Shivanand.Kunijadar@...> --- doc/README.swupdate.bbb.md | 90

From: Shivanand Kunijadar <Shivanand.Kunijadar@...> This patch adds following changes to support swupdate on BBB - swupdate handler configuration file - Add settings related to

From: Shivanand Kunijadar <Shivanand.Kunijadar@...> Add /boot entry at /etc/fstab for /etc/fw_config and also add network settings for SSH connection Signed-off-by: Shivanand Kunijadar

From: Shivanand Kunijadar <Shivanand.Kunijadar@...> Add custom-built BBB U-Boot and adapt partitioning layout. Signed-off-by: Shivanand Kunijadar

From: Shivanand Kunijadar <Shivanand.Kunijadar@...> The patches are related to swupdate on BBB using u-boot as bootloader. I confirmed swupdate on BBB board with all these patches. These

Hello Pavel, We have a development branch in isar-cip-core, by which we can generate a rootfs for QEMU riscv64. https://gitlab.com/cip-project/cip-core/isar-cip-core/-/tree/thond/riscv-dev Please

Hi all, Kindly be reminded to attend the weekly meeting through IRC to discuss technical topics with CIP kernel today. Our channel is the following: irc:irc.libera.chat:6667/cip The IRC meeting

Hi ! It's this week's CVE report. This week reported 1 new CVEs and 6 updated CVEs. * New CVEs CVE-2022-2503: LoadPin bypass via dm-verity table reload NIST: CVSS v3 score is not

cip/linux-5.10.y-cip smc: 4 runs, 2 regressions (v5.10.131-cip13-84-g3b53e4dbd9f41) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig

cip/linux-5.10.y-cip ltp-mm: 2 runs, 1 regressions (v5.10.131-cip13-84-g3b53e4dbd9f41) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig |

cip/linux-5.10.y-cip ltp-pty: 3 runs, 1 regressions (v5.10.131-cip13-84-g3b53e4dbd9f41) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig |