Date   

[PATCH 4.4.y-cip 11/11] ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Dave Gerlach <d-gerlach@ti.com>

commit 72ac40fcb164a3d8fbd1ff13647abe67df26ced5 upstream.

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in am33xx.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---
arch/arm/boot/dts/am33xx.dtsi | 87 +++++++++++++++++++++++++++++------
1 file changed, 74 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dts=
i
index 4b40e6d401a03..c256718d75801 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -45,19 +45,7 @@
device_type =3D "cpu";
reg =3D <0>;
=20
- /*
- * To consider voltage drop between PMIC and SoC,
- * tolerance value is reduced to 2% from 4% and
- * voltage value is increased as a precaution.
- */
- operating-points =3D <
- /* kHz uV */
- 720000 1285000
- 600000 1225000
- 500000 1125000
- 275000 1125000
- >;
- voltage-tolerance =3D <2>; /* 2 percentage */
+ operating-points-v2 =3D <&cpu0_opp_table>;
=20
clocks =3D <&dpll_mpu_ck>;
clock-names =3D "cpu";
@@ -66,6 +54,79 @@
};
};
=20
+ cpu0_opp_table: opp-table {
+ compatible =3D "operating-points-v2-ti-cpu";
+ syscon =3D <&scm_conf>;
+
+ /*
+ * The three following nodes are marked with opp-suspend
+ * because the can not be enabled simultaneously on a
+ * single SoC.
+ */
+ opp50@300000000 {
+ opp-hz =3D /bits/ 64 <300000000>;
+ opp-microvolt =3D <950000 931000 969000>;
+ opp-supported-hw =3D <0x06 0x0010>;
+ opp-suspend;
+ };
+
+ opp100@275000000 {
+ opp-hz =3D /bits/ 64 <275000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x01 0x00FF>;
+ opp-suspend;
+ };
+
+ opp100@300000000 {
+ opp-hz =3D /bits/ 64 <300000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x06 0x0020>;
+ opp-suspend;
+ };
+
+ opp100@500000000 {
+ opp-hz =3D /bits/ 64 <500000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x01 0xFFFF>;
+ };
+
+ opp100@600000000 {
+ opp-hz =3D /bits/ 64 <600000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x06 0x0040>;
+ };
+
+ opp120@600000000 {
+ opp-hz =3D /bits/ 64 <600000000>;
+ opp-microvolt =3D <1200000 1176000 1224000>;
+ opp-supported-hw =3D <0x01 0xFFFF>;
+ };
+
+ opp120@720000000 {
+ opp-hz =3D /bits/ 64 <720000000>;
+ opp-microvolt =3D <1200000 1176000 1224000>;
+ opp-supported-hw =3D <0x06 0x0080>;
+ };
+
+ oppturbo@720000000 {
+ opp-hz =3D /bits/ 64 <720000000>;
+ opp-microvolt =3D <1260000 1234800 1285200>;
+ opp-supported-hw =3D <0x01 0xFFFF>;
+ };
+
+ oppturbo@800000000 {
+ opp-hz =3D /bits/ 64 <800000000>;
+ opp-microvolt =3D <1260000 1234800 1285200>;
+ opp-supported-hw =3D <0x06 0x0100>;
+ };
+
+ oppnitro@1000000000 {
+ opp-hz =3D /bits/ 64 <1000000000>;
+ opp-microvolt =3D <1325000 1298500 1351500>;
+ opp-supported-hw =3D <0x04 0x0200>;
+ };
+ };
+
pmu {
compatible =3D "arm,cortex-a8-pmu";
interrupts =3D <3>;
--=20
2.28.0


[PATCH 4.4.y-cip 07/11] cpufreq: ti-cpufreq: add missing of_node_put()

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Zumeng Chen <zumeng.chen@gmail.com>

commit 248aefdcc3a7e0cfbd014946b4dead63e750e71b upstream.

call of_node_put to release the refcount of np.

Signed-off-by: Zumeng Chen <zumeng.chen@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---
drivers/cpufreq/ti-cpufreq.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index 36627b2b256f8..afbe9db29992d 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -205,6 +205,7 @@ static int ti_cpufreq_init(void)
=20
np =3D of_find_node_by_path("/");
match =3D of_match_node(ti_cpufreq_of_match, np);
+ of_node_put(np);
if (!match)
return -ENODEV;
=20
--=20
2.28.0


[PATCH 4.4.y-cip 01/11] PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Viresh Kumar <viresh.kumar@linaro.org>

V2 bindings have better support for clock-latency and voltage-tolerance
and doesn't need special care. To use callbacks, like
dev_pm_opp_get_max_{transition|volt}_latency(), irrespective of the
bindings, the core needs to know clock-latency/voltage-tolerance for the
earlier bindings.

This patch reads clock-latency/voltage-tolerance from the device node,
irrespective of the bindings (to keep it simple) and use them only for
V1 bindings.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---

This patch is needed because the OPPv2 table does not include
clock-latency-ns properties, but instead uses the clock-latency
property from OPPv1.

---
drivers/base/power/opp/core.c | 20 ++++++++++++++++++++
drivers/base/power/opp/opp.h | 6 ++++++
2 files changed, 26 insertions(+)

diff --git a/drivers/base/power/opp/core.c b/drivers/base/power/opp/core.=
c
index 1e0a2ddf73323..f983d5d30fa94 100644
--- a/drivers/base/power/opp/core.c
+++ b/drivers/base/power/opp/core.c
@@ -505,6 +505,7 @@ static struct device_opp *_add_device_opp(struct devi=
ce *dev)
{
struct device_opp *dev_opp;
struct device_list_opp *list_dev;
+ struct device_node *np;
=20
/* Check for existing list for 'dev' first */
dev_opp =3D _find_device_opp(dev);
@@ -527,6 +528,21 @@ static struct device_opp *_add_device_opp(struct dev=
ice *dev)
return NULL;
}
=20
+ /*
+ * Only required for backward compatibility with v1 bindings, but isn't
+ * harmful for other cases. And so we do it unconditionally.
+ */
+ np =3D of_node_get(dev->of_node);
+ if (np) {
+ u32 val;
+
+ if (!of_property_read_u32(np, "clock-latency", &val))
+ dev_opp->clock_latency_ns_max =3D val;
+ of_property_read_u32(np, "voltage-tolerance",
+ &dev_opp->voltage_tolerance_v1);
+ of_node_put(np);
+ }
+
srcu_init_notifier_head(&dev_opp->srcu_head);
INIT_LIST_HEAD(&dev_opp->opp_list);
=20
@@ -759,6 +775,7 @@ static int _opp_add_v1(struct device *dev, unsigned l=
ong freq, long u_volt,
{
struct device_opp *dev_opp;
struct dev_pm_opp *new_opp;
+ unsigned long tol;
int ret;
=20
/* Hold our list modification lock here */
@@ -772,7 +789,10 @@ static int _opp_add_v1(struct device *dev, unsigned =
long freq, long u_volt,
=20
/* populate the opp table */
new_opp->rate =3D freq;
+ tol =3D u_volt * dev_opp->voltage_tolerance_v1 / 100;
new_opp->u_volt =3D u_volt;
+ new_opp->u_volt_min =3D u_volt - tol;
+ new_opp->u_volt_max =3D u_volt + tol;
new_opp->available =3D true;
new_opp->dynamic =3D dynamic;
=20
diff --git a/drivers/base/power/opp/opp.h b/drivers/base/power/opp/opp.h
index 690638ef36ee5..7f0d7c8bfef00 100644
--- a/drivers/base/power/opp/opp.h
+++ b/drivers/base/power/opp/opp.h
@@ -135,6 +135,8 @@ struct device_list_opp {
* @dentry: debugfs dentry pointer of the real device directory (not lin=
ks).
* @dentry_name: Name of the real dentry.
*
+ * @voltage_tolerance_v1: In percentage, for v1 bindings only.
+ *
* This is an internal data structure maintaining the link to opps attac=
hed to
* a device. This structure is not meant to be shared to users as it is
* meant for book keeping and private to OPP library.
@@ -153,6 +155,10 @@ struct device_opp {
=20
struct device_node *np;
unsigned long clock_latency_ns_max;
+
+ /* For backward compatibility with v1 bindings */
+ unsigned int voltage_tolerance_v1;
+
bool shared_opp;
struct dev_pm_opp *suspend_opp;
=20
--=20
2.28.0


[PATCH 4.4.y-cip 00/11] ti-cpufreq backport

Chen-Yu Tsai (Moxa) <wens@...>
 

Hi everyone,

This is the final part of MOXA's PM / OPP / ti-cpufreq backport series.
Part 2, which consisted of OPP / cpufreq-dt cleanups, is abandoned in
favor of directly backporting the ti-cpufreq driver.

This part includes a couple of patches to the PM / OPP subsystem to
expose required APIs, and deal with the v1/v2 mixed OPP table used
by am33xx. The rest are the backport of the ti-cpufreq driver, and
fixes for this driver. The fixes were requested by CIP kernel
maintainers as part of MOXA's previous attempt to backport ti-cpufreq.
They are included as separate patches, as there are quite a few of them
spread over multiple kernel releases.

The result is that my BeagleBone Black can run at higher speeds than
without the ti-cpufreq driver due to having a better silicon revision.

Please have a look.

Regards
ChenYu


Christophe Jaillet (1):
cpufreq: ti: Fix 'of_node_put' being called twice in error handling
path

Dave Gerlach (6):
PM / OPP: Expose _of_get_opp_desc_node as dev_pm_opp API
Documentation: dt: add bindings for ti-cpufreq
cpufreq: ti: Add cpufreq driver to determine available OPPs at runtime
cpufreq: dt: Don't use generic platdev driver for ti-cpufreq platforms
ARM: omap2plus_defconfig: Enable support for ti-cpufreq
ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

Suman Anna (1):
cpufreq: ti-cpufreq: Fix an incorrect error return value

Viresh Kumar (1):
PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings

Zumeng Chen (2):
cpufreq: ti-cpufreq: kfree opp_data when failure
cpufreq: ti-cpufreq: add missing of_node_put()

.../bindings/cpufreq/ti-cpufreq.txt | 128 ++++++++
arch/arm/boot/dts/am33xx.dtsi | 87 +++++-
arch/arm/configs/omap2plus_defconfig | 1 +
arch/arm/mach-omap2/pm.c | 3 +
drivers/base/power/opp/core.c | 25 +-
drivers/base/power/opp/cpu.c | 4 +-
drivers/base/power/opp/opp.h | 6 +
drivers/cpufreq/Kconfig.arm | 11 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/ti-cpufreq.c | 276 ++++++++++++++++++
include/linux/pm_opp.h | 6 +
11 files changed, 531 insertions(+), 17 deletions(-)
create mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.=
txt
create mode 100644 drivers/cpufreq/ti-cpufreq.c

--=20
2.28.0


[PATCH 4.4.y-cip 04/11] cpufreq: ti: Add cpufreq driver to determine available OPPs at runtime

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Dave Gerlach <d-gerlach@ti.com>

commit e13cf046cd70894393a1085ca39da7ef751353fb upstream.

Some TI SoCs, like those in the AM335x, AM437x, DRA7x, and AM57x families=
,
have different OPPs available for the MPU depending on which specific
variant of the SoC is in use. This can be determined through use of the
revision and an eFuse register present in the silicon. Introduce a
ti-cpufreq driver that can read the aformentioned values and provide
them as version matching data to the opp framework. Through this the
opp-supported-hw dt binding that is part of the operating-points-v2
table can be used to indicate availability of OPPs for each device.

This driver also creates the "cpufreq-dt" platform_device after passing
the version matching data to the OPP framework so that the cpufreq-dt
handles the actual cpufreq implementation. Even without the necessary
data to pass the version matching data the driver will still create this
device to maintain backwards compatibility with operating-points v1
tables.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---
drivers/cpufreq/Kconfig.arm | 11 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/ti-cpufreq.c | 272 +++++++++++++++++++++++++++++++++++
3 files changed, 284 insertions(+)
create mode 100644 drivers/cpufreq/ti-cpufreq.c

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index eed1e073d96d7..6b834112d857b 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -231,6 +231,17 @@ config ARM_TEGRA124_CPUFREQ
help
This adds the CPUFreq driver support for Tegra124 SOCs.
=20
+config ARM_TI_CPUFREQ
+ bool "Texas Instruments CPUFreq support"
+ depends on ARCH_OMAP2PLUS
+ help
+ This driver enables valid OPPs on the running platform based on
+ values contained within the SoC in use. Enable this in order to
+ use the cpufreq-dt driver on all Texas Instruments platforms that
+ provide dt based operating-points-v2 tables with opp-supported-hw
+ data provided. Required for cpufreq support on AM335x, AM437x,
+ DRA7x, and AM57x platforms.
+
config ARM_PXA2xx_CPUFREQ
tristate "Intel PXA2xx CPUfreq driver"
depends on PXA27x || PXA25x
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index c0af1a1281c89..6e889596d9a12 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_ARM_SCPI_CPUFREQ) +=3D scpi-cpufreq.o
obj-$(CONFIG_ARM_SPEAR_CPUFREQ) +=3D spear-cpufreq.o
obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) +=3D tegra20-cpufreq.o
obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) +=3D tegra124-cpufreq.o
+obj-$(CONFIG_ARM_TI_CPUFREQ) +=3D ti-cpufreq.o
obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) +=3D vexpress-spc-cpufreq.o
obj-$(CONFIG_ACPI_CPPC_CPUFREQ) +=3D cppc_cpufreq.o
=20
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
new file mode 100644
index 0000000000000..7ff7ae3c3911c
--- /dev/null
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -0,0 +1,272 @@
+/*
+ * TI CPUFreq/OPP hw-supported driver
+ *
+ * Copyright (C) 2016-2017 Texas Instruments, Inc.
+ * Dave Gerlach <d-gerlach@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/cpu.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/pm_opp.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#define REVISION_MASK 0xF
+#define REVISION_SHIFT 28
+
+#define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
+#define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
+
+#define DRA7_EFUSE_HAS_OD_MPU_OPP 11
+#define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15
+#define DRA7_EFUSE_HAS_ALL_MPU_OPP 23
+
+#define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
+#define DRA7_EFUSE_OD_MPU_OPP BIT(1)
+#define DRA7_EFUSE_HIGH_MPU_OPP BIT(2)
+
+#define VERSION_COUNT 2
+
+struct ti_cpufreq_data;
+
+struct ti_cpufreq_soc_data {
+ unsigned long (*efuse_xlate)(struct ti_cpufreq_data *opp_data,
+ unsigned long efuse);
+ unsigned long efuse_fallback;
+ unsigned long efuse_offset;
+ unsigned long efuse_mask;
+ unsigned long efuse_shift;
+ unsigned long rev_offset;
+};
+
+struct ti_cpufreq_data {
+ struct device *cpu_dev;
+ struct device_node *opp_node;
+ struct regmap *syscon;
+ const struct ti_cpufreq_soc_data *soc_data;
+};
+
+static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
+ unsigned long efuse)
+{
+ if (!efuse)
+ efuse =3D opp_data->soc_data->efuse_fallback;
+ /* AM335x and AM437x use "OPP disable" bits, so invert */
+ return ~efuse;
+}
+
+static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
+ unsigned long efuse)
+{
+ unsigned long calculated_efuse =3D DRA7_EFUSE_NOM_MPU_OPP;
+
+ /*
+ * The efuse on dra7 and am57 parts contains a specific
+ * value indicating the highest available OPP.
+ */
+
+ switch (efuse) {
+ case DRA7_EFUSE_HAS_ALL_MPU_OPP:
+ case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
+ calculated_efuse |=3D DRA7_EFUSE_HIGH_MPU_OPP;
+ case DRA7_EFUSE_HAS_OD_MPU_OPP:
+ calculated_efuse |=3D DRA7_EFUSE_OD_MPU_OPP;
+ }
+
+ return calculated_efuse;
+}
+
+static struct ti_cpufreq_soc_data am3x_soc_data =3D {
+ .efuse_xlate =3D amx3_efuse_xlate,
+ .efuse_fallback =3D AM33XX_800M_ARM_MPU_MAX_FREQ,
+ .efuse_offset =3D 0x07fc,
+ .efuse_mask =3D 0x1fff,
+ .rev_offset =3D 0x600,
+};
+
+static struct ti_cpufreq_soc_data am4x_soc_data =3D {
+ .efuse_xlate =3D amx3_efuse_xlate,
+ .efuse_fallback =3D AM43XX_600M_ARM_MPU_MAX_FREQ,
+ .efuse_offset =3D 0x0610,
+ .efuse_mask =3D 0x3f,
+ .rev_offset =3D 0x600,
+};
+
+static struct ti_cpufreq_soc_data dra7_soc_data =3D {
+ .efuse_xlate =3D dra7_efuse_xlate,
+ .efuse_offset =3D 0x020c,
+ .efuse_mask =3D 0xf80000,
+ .efuse_shift =3D 19,
+ .rev_offset =3D 0x204,
+};
+
+/**
+ * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
+ * @opp_data: pointer to ti_cpufreq_data context
+ * @efuse_value: Set to the value parsed from efuse
+ *
+ * Returns error code if efuse not read properly.
+ */
+static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
+ u32 *efuse_value)
+{
+ struct device *dev =3D opp_data->cpu_dev;
+ u32 efuse;
+ int ret;
+
+ ret =3D regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
+ &efuse);
+ if (ret) {
+ dev_err(dev,
+ "Failed to read the efuse value from syscon: %d\n",
+ ret);
+ return ret;
+ }
+
+ efuse =3D (efuse & opp_data->soc_data->efuse_mask);
+ efuse >>=3D opp_data->soc_data->efuse_shift;
+
+ *efuse_value =3D opp_data->soc_data->efuse_xlate(opp_data, efuse);
+
+ return 0;
+}
+
+/**
+ * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
+ * @opp_data: pointer to ti_cpufreq_data context
+ * @revision_value: Set to the value parsed from revision register
+ *
+ * Returns error code if revision not read properly.
+ */
+static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
+ u32 *revision_value)
+{
+ struct device *dev =3D opp_data->cpu_dev;
+ u32 revision;
+ int ret;
+
+ ret =3D regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
+ &revision);
+ if (ret) {
+ dev_err(dev,
+ "Failed to read the revision number from syscon: %d\n",
+ ret);
+ return ret;
+ }
+
+ *revision_value =3D BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
+
+ return 0;
+}
+
+static int ti_cpufreq_setup_syscon_register(struct ti_cpufreq_data *opp_=
data)
+{
+ struct device *dev =3D opp_data->cpu_dev;
+ struct device_node *np =3D opp_data->opp_node;
+
+ opp_data->syscon =3D syscon_regmap_lookup_by_phandle(np,
+ "syscon");
+ if (IS_ERR(opp_data->syscon)) {
+ dev_err(dev,
+ "\"syscon\" is missing, cannot use OPPv2 table.\n");
+ return PTR_ERR(opp_data->syscon);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id ti_cpufreq_of_match[] =3D {
+ { .compatible =3D "ti,am33xx", .data =3D &am3x_soc_data, },
+ { .compatible =3D "ti,am4372", .data =3D &am4x_soc_data, },
+ { .compatible =3D "ti,dra7", .data =3D &dra7_soc_data },
+ {},
+};
+
+static int ti_cpufreq_init(void)
+{
+ u32 version[VERSION_COUNT];
+ struct device_node *np;
+ const struct of_device_id *match;
+ struct ti_cpufreq_data *opp_data;
+ int ret;
+
+ np =3D of_find_node_by_path("/");
+ match =3D of_match_node(ti_cpufreq_of_match, np);
+ if (!match)
+ return -ENODEV;
+
+ opp_data =3D kzalloc(sizeof(*opp_data), GFP_KERNEL);
+ if (!opp_data)
+ return -ENOMEM;
+
+ opp_data->soc_data =3D match->data;
+
+ opp_data->cpu_dev =3D get_cpu_device(0);
+ if (!opp_data->cpu_dev) {
+ pr_err("%s: Failed to get device for CPU0\n", __func__);
+ return -ENODEV;
+ }
+
+ opp_data->opp_node =3D dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_de=
v);
+ if (!opp_data->opp_node) {
+ dev_info(opp_data->cpu_dev,
+ "OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.=
\n");
+ goto register_cpufreq_dt;
+ }
+
+ ret =3D ti_cpufreq_setup_syscon_register(opp_data);
+ if (ret)
+ goto fail_put_node;
+
+ /*
+ * OPPs determine whether or not they are supported based on
+ * two metrics:
+ * 0 - SoC Revision
+ * 1 - eFuse value
+ */
+ ret =3D ti_cpufreq_get_rev(opp_data, &version[0]);
+ if (ret)
+ goto fail_put_node;
+
+ ret =3D ti_cpufreq_get_efuse(opp_data, &version[1]);
+ if (ret)
+ goto fail_put_node;
+
+ of_node_put(opp_data->opp_node);
+
+ ret =3D PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
+ version, VERSION_COUNT));
+ if (ret) {
+ dev_err(opp_data->cpu_dev,
+ "Failed to set supported hardware\n");
+ goto fail_put_node;
+ }
+
+register_cpufreq_dt:
+ platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
+
+ return 0;
+
+fail_put_node:
+ of_node_put(opp_data->opp_node);
+
+ return ret;
+}
+module_init(ti_cpufreq_init);
+
+MODULE_DESCRIPTION("TI CPUFreq/OPP hw-supported driver");
+MODULE_AUTHOR("Dave Gerlach <d-gerlach@ti.com>");
+MODULE_LICENSE("GPL v2");
--=20
2.28.0


[PATCH 4.4.y-cip 02/11] PM / OPP: Expose _of_get_opp_desc_node as dev_pm_opp API

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Dave Gerlach <d-gerlach@ti.com>

commit 0764c604c8128f17fd740ff8b1701d0a1301eb7e upstream.

Rename _of_get_opp_desc_node to dev_pm_opp_of_get_opp_desc_node and add i=
t
to include/linux/pm_opp.h to allow other drivers, such as platform OPP
and cpufreq drivers, to make use of it.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
[wens@csie.org: backported to pre-OF-move files]
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---
drivers/base/power/opp/core.c | 5 +++--
drivers/base/power/opp/cpu.c | 4 ++--
include/linux/pm_opp.h | 6 ++++++
3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/base/power/opp/core.c b/drivers/base/power/opp/core.=
c
index f983d5d30fa94..c41bf5f1a038d 100644
--- a/drivers/base/power/opp/core.c
+++ b/drivers/base/power/opp/core.c
@@ -1488,7 +1488,7 @@ unlock:
EXPORT_SYMBOL_GPL(dev_pm_opp_of_remove_table);
=20
/* Returns opp descriptor node for a device, caller must do of_node_put(=
) */
-struct device_node *_of_get_opp_desc_node(struct device *dev)
+struct device_node *dev_pm_opp_of_get_opp_desc_node(struct device *dev)
{
/*
* TODO: Support for multiple OPP tables.
@@ -1499,6 +1499,7 @@ struct device_node *_of_get_opp_desc_node(struct de=
vice *dev)
=20
return of_parse_phandle(dev->of_node, "operating-points-v2", 0);
}
+EXPORT_SYMBOL_GPL(dev_pm_opp_of_get_opp_desc_node);
=20
/* Initializes OPP tables based on new bindings */
static int _of_add_opp_table_v2(struct device *dev, struct device_node *=
opp_np)
@@ -1627,7 +1628,7 @@ int dev_pm_opp_of_add_table(struct device *dev)
* OPPs have two version of bindings now. The older one is deprecated,
* try for the new binding first.
*/
- opp_np =3D _of_get_opp_desc_node(dev);
+ opp_np =3D dev_pm_opp_of_get_opp_desc_node(dev);
if (!opp_np) {
/*
* Try old-deprecated bindings for backward compatibility with
diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c
index a0db8b3575f38..29c5b42eff346 100644
--- a/drivers/base/power/opp/cpu.c
+++ b/drivers/base/power/opp/cpu.c
@@ -227,7 +227,7 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu=
_dev, cpumask_var_t cpumask
int cpu, ret =3D 0;
=20
/* Get OPP descriptor node */
- np =3D _of_get_opp_desc_node(cpu_dev);
+ np =3D dev_pm_opp_of_get_opp_desc_node(cpu_dev);
if (!np) {
dev_dbg(cpu_dev, "%s: Couldn't find cpu_dev node.\n", __func__);
return -ENOENT;
@@ -252,7 +252,7 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu=
_dev, cpumask_var_t cpumask
}
=20
/* Get OPP descriptor node */
- tmp_np =3D _of_get_opp_desc_node(tcpu_dev);
+ tmp_np =3D dev_pm_opp_of_get_opp_desc_node(tcpu_dev);
if (!tmp_np) {
dev_err(tcpu_dev, "%s: Couldn't find tcpu_dev node.\n",
__func__);
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index 95403d2ccaf56..4a8f5b33d7023 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -160,6 +160,7 @@ int dev_pm_opp_of_cpumask_add_table(cpumask_var_t cpu=
mask);
void dev_pm_opp_of_cpumask_remove_table(cpumask_var_t cpumask);
int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t=
cpumask);
int dev_pm_opp_set_sharing_cpus(struct device *cpu_dev, cpumask_var_t cp=
umask);
+struct device_node *dev_pm_opp_of_get_opp_desc_node(struct device *dev);
#else
static inline int dev_pm_opp_of_add_table(struct device *dev)
{
@@ -188,6 +189,11 @@ static inline int dev_pm_opp_set_sharing_cpus(struct=
device *cpu_dev, cpumask_va
{
return -ENOSYS;
}
+
+static inline struct device_node *dev_pm_opp_of_get_opp_desc_node(struct=
device *dev)
+{
+ return NULL;
+}
#endif
=20
#endif /* __LINUX_OPP_H__ */
--=20
2.28.0


[PATCH 4.4.y-cip 03/11] Documentation: dt: add bindings for ti-cpufreq

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Dave Gerlach <d-gerlach@ti.com>

commit 953a0f18337406ab041252ce5a62db5d173bee5f upstream.

Add the device tree bindings document for the TI CPUFreq/OPP driver
on AM33xx, AM43xx, DRA7xx, and AM57xx SoCs. The operating-points-v2
binding allows us to provide an opp-supported-hw property for each OPP
to define when it is available. This driver is responsible for reading
and parsing registers to determine which OPPs can be selectively enabled
based on the specific SoC in use by matching against the opp-supported-hw
data.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---
.../bindings/cpufreq/ti-cpufreq.txt | 128 ++++++++++++++++++
1 file changed, 128 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.=
txt

diff --git a/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt b/D=
ocumentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
new file mode 100644
index 0000000000000..ba0e15ad5bd9d
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
@@ -0,0 +1,128 @@
+TI CPUFreq and OPP bindings
+=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D
+
+Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
+families support different OPPs depending on the silicon variant in use.
+The ti-cpufreq driver can use revision and an efuse value from the SoC t=
o
+provide the OPP framework with supported hardware information. This is
+used to determine which OPPs from the operating-points-v2 table get enab=
led
+when it is parsed by the OPP framework.
+
+Required properties:
+--------------------
+In 'cpus' nodes:
+- operating-points-v2: Phandle to the operating-points-v2 table to use.
+
+In 'operating-points-v2' table:
+- compatible: Should be
+ - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx So=
Cs
+- syscon: A phandle pointing to a syscon node representing the control m=
odule
+ register space of the SoC.
+
+Optional properties:
+--------------------
+For each opp entry in 'operating-points-v2' table:
+- opp-supported-hw: Two bitfields indicating:
+ 1. Which revision of the SoC the OPP is supported by
+ 2. Which eFuse bits indicate this OPP is available
+
+ A bitwise AND is performed against these values and if any bit
+ matches, the OPP gets enabled.
+
+Example:
+--------
+
+/* From arch/arm/boot/dts/am33xx.dtsi */
+cpus {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ cpu@0 {
+ compatible =3D "arm,cortex-a8";
+ device_type =3D "cpu";
+ reg =3D <0>;
+
+ operating-points-v2 =3D <&cpu0_opp_table>;
+
+ clocks =3D <&dpll_mpu_ck>;
+ clock-names =3D "cpu";
+
+ clock-latency =3D <300000>; /* From omap-cpufreq driver */
+ };
+};
+
+/*
+ * cpu0 has different OPPs depending on SoC revision and some on revisio=
ns
+ * 0x2 and 0x4 have eFuse bits that indicate if they are available or no=
t
+ */
+cpu0_opp_table: opp-table {
+ compatible =3D "operating-points-v2-ti-cpu";
+ syscon =3D <&scm_conf>;
+
+ /*
+ * The three following nodes are marked with opp-suspend
+ * because they can not be enabled simultaneously on a
+ * single SoC.
+ */
+ opp50@300000000 {
+ opp-hz =3D /bits/ 64 <300000000>;
+ opp-microvolt =3D <950000 931000 969000>;
+ opp-supported-hw =3D <0x06 0x0010>;
+ opp-suspend;
+ };
+
+ opp100@275000000 {
+ opp-hz =3D /bits/ 64 <275000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x01 0x00FF>;
+ opp-suspend;
+ };
+
+ opp100@300000000 {
+ opp-hz =3D /bits/ 64 <300000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x06 0x0020>;
+ opp-suspend;
+ };
+
+ opp100@500000000 {
+ opp-hz =3D /bits/ 64 <500000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x01 0xFFFF>;
+ };
+
+ opp100@600000000 {
+ opp-hz =3D /bits/ 64 <600000000>;
+ opp-microvolt =3D <1100000 1078000 1122000>;
+ opp-supported-hw =3D <0x06 0x0040>;
+ };
+
+ opp120@600000000 {
+ opp-hz =3D /bits/ 64 <600000000>;
+ opp-microvolt =3D <1200000 1176000 1224000>;
+ opp-supported-hw =3D <0x01 0xFFFF>;
+ };
+
+ opp120@720000000 {
+ opp-hz =3D /bits/ 64 <720000000>;
+ opp-microvolt =3D <1200000 1176000 1224000>;
+ opp-supported-hw =3D <0x06 0x0080>;
+ };
+
+ oppturbo@720000000 {
+ opp-hz =3D /bits/ 64 <720000000>;
+ opp-microvolt =3D <1260000 1234800 1285200>;
+ opp-supported-hw =3D <0x01 0xFFFF>;
+ };
+
+ oppturbo@800000000 {
+ opp-hz =3D /bits/ 64 <800000000>;
+ opp-microvolt =3D <1260000 1234800 1285200>;
+ opp-supported-hw =3D <0x06 0x0100>;
+ };
+
+ oppnitro@1000000000 {
+ opp-hz =3D /bits/ 64 <1000000000>;
+ opp-microvolt =3D <1325000 1298500 1351500>;
+ opp-supported-hw =3D <0x04 0x0200>;
+ };
+};
--=20
2.28.0


[PATCH] linux-4.19.y*: Add test for Xilinx ZYNQMP zcu102 board

Nobuhiro Iwamatsu
 

Add test target for Cybertrust supported ZYNQMP zcu102 board.
boot and smc test are executed automatically, but LTP is set to be
executed manually because this board is not official yet.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
trees/linux-4.19.y-cip.yml | 25 +++++++++++++++++++++++++
trees/linux-4.19.y.yml | 10 ++++++++++
2 files changed, 35 insertions(+)

diff --git a/trees/linux-4.19.y-cip.yml b/trees/linux-4.19.y-cip.yml
index 7efc3f5..236e4bf 100644
--- a/trees/linux-4.19.y-cip.yml
+++ b/trees/linux-4.19.y-cip.yml
@@ -203,6 +203,16 @@ test:x86_siemens_ipc227e_defconfig:
DEVICES: x86
TESTS: boot smc

+test:arm64_ctj_zynqmp_defconfig:
+ extends: .test
+ needs: ["build:arm64_ctj_zynqmp_defconfig"]
+ variables:
+ BUILD_ARCH: arm64
+ CONFIG: ctj_zynqmp_defconfig
+ DEVICES: zynqmp-zcu102
+ DTBS: zynqmp-zcu102-rev1.0.dtb
+ TESTS: boot smc
+
###############################
# Test: RT CIP configurations #
###############################
@@ -274,6 +284,21 @@ test:x86_cip_qemu_defconfig_release:
- /^.*linux-4.19.y-cip-rt-rc$/
- /^.*linux-rc$

+test:arm64_ctj_zynqmp_defconfig_trail:
+ when: manual
+ extends: .test
+ needs: ["build:arm64_ctj_zynqmp_defconfig"]
+ variables:
+ BUILD_ARCH: arm64
+ CONFIG: ctj_zynqmp_defconfig
+ DEVICES: zynqmp-zcu102
+ DTBS: zynqmp-zcu102-rev1.0.dtb
+ TESTS: ltp
+ only:
+ - /^.*linux-4.19.y-cip-rc$/
+ - /^.*linux-4.19.y-cip-rt-rc$/
+ - /^.*linux-rc$/
+
########################################################
# Verify: Check rebase branches & tags for differences #
########################################################
diff --git a/trees/linux-4.19.y.yml b/trees/linux-4.19.y.yml
index 630f5ac..0d7403f 100644
--- a/trees/linux-4.19.y.yml
+++ b/trees/linux-4.19.y.yml
@@ -185,6 +185,16 @@ test:x86_siemens_ipc227e_defconfig:
DEVICES: x86
TESTS: boot smc

+test:arm64_ctj_zynqmp_defconfig:
+ extends: .test
+ needs: ["build:arm64_ctj_zynqmp_defconfig"]
+ variables:
+ BUILD_ARCH: arm64
+ CONFIG: ctj_zynqmp_defconfig
+ DEVICES: zynqmp-zcu102
+ DTBS: zynqmp-zcu102-rev1.0.dtb
+ TESTS: boot smc
+
################################
# Test: Non-CIP configurations #
################################
--
2.27.0


[ANNOUNCE] v4.19.142-cip33-rt14

Pavel Machek
 


Re: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Lad Prabhakar
 

Hi Pavel,

-----Original Message-----
From: Prabhakar Mahadev Lad
Sent: 03 September 2020 19:01
To: Pavel Machek <pavel@denx.de>
Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>; Biju Das <biju.das.jz@bp.renesas.com>
Subject: RE: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@denx.de>
Sent: 03 September 2020 18:55
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
<biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Hi!

This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Okay, so this is a cleanup that makes sense for mainline.

[PL: Fixes 6e52cced1aa58 ("gpio: rcar: Implement gpiochip.set_multiple()")]
Does it fix set_multiple? ... seems so.

Fixing set_multiple is possible with this oneliner, right?

@@ -541,7 +532,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
irq_chip->flags= IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;

-ret = gpiochip_add(gpio_chip);
+ret = gpiochip_add_data(gpio_chip, p);
if (ret) {
dev_err(dev, "failed to add GPIO controller\n");
goto err0;
The patch is okay and now I understand why you want it. It would have
been nice if changelog told me directly.
My bad.

Can set_multiple use container_of() too? We get less differences
between 4.4 and 4.4-cip that way, and it is still one-liner.
It could use gpio_to_priv(), but since there was an commit upstream already I just pulled it in.
I have now posted a oneliner patch (https://patchwork.kernel.org/patch/11756155/)

Let me know if you if you are OK with the patch or I shall post a one-liner.
Please drop the current patch

Cheers,
Prabhakar


Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


[PATCH 4.4.y-cip] gpio: rcar: Avoid NULL pointer access in gpio_rcar_set_multiple()

Lad Prabhakar
 

gpiochip_get_data() expects the controller probe to call
gpiochip_add_data() before using it, where as the rcar-gpio
driver probe has gpiochip_add() call thus resulting in NULL
pointer access.

Avoid this case by using gpio_to_priv() call.

Fixes: 6e52cced1aa58 ("gpio: rcar: Implement gpiochip.set_multiple()")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/gpio/gpio-rcar.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index e829f11aca8f..2778dcd96ae7 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -352,7 +352,7 @@ static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
static void gpio_rcar_set_multiple(struct gpio_chip *chip, unsigned long *mask,
unsigned long *bits)
{
- struct gpio_rcar_priv *p = gpiochip_get_data(chip);
+ struct gpio_rcar_priv *p = gpio_to_priv(chip);
unsigned long flags;
u32 val, bankmask;

--
2.17.1


[PATCH 4.4.y-cip v2] of: Add missing exports of node name compare functions

Lad Prabhakar
 

From: Rob Herring <robh@kernel.org>

commit 173ee3962959a1985a109f81539a403b5cd07ae7 upstream.

Commit f42b0e18f2e5 ("of: add node name compare helper functions")
failed to add the module exports to of_node_name_eq() and
of_node_name_prefix(). Add them now.

Fixes: f42b0e18f2e5 ("of: add node name compare helper functions")
Signed-off-by: Rob Herring <robh@kernel.org>
[PL: Fixes eeaa48eee492d ("drm: rcar-du: Support panels
connected directly to the DPAD outputs")]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2
* Included fixes tag.
---
drivers/of/base.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index b02f4b272e5b..4e6af7c6c792 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -67,6 +67,7 @@ bool of_node_name_eq(const struct device_node *np, const char *name)

return (strlen(name) == len) && (strncmp(node_name, name, len) == 0);
}
+EXPORT_SYMBOL(of_node_name_eq);

bool of_node_name_prefix(const struct device_node *np, const char *prefix)
{
@@ -75,6 +76,7 @@ bool of_node_name_prefix(const struct device_node *np, const char *prefix)

return strncmp(kbasename(np->full_name), prefix, strlen(prefix)) == 0;
}
+EXPORT_SYMBOL(of_node_name_prefix);

int of_n_addr_cells(struct device_node *np)
{
--
2.17.1


Re: [PATCH 4.4.y-cip 0/4] serial mctrl_gpio/sh-sci Fixes

Lad Prabhakar
 

Hi Pavel/ Nobuhiro,

-----Original Message-----
From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On Behalf Of Lad Prabhakar via lists.cip-project.org
Sent: 03 September 2020 15:27
To: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [cip-dev] [PATCH 4.4.y-cip 0/4] serial mctrl_gpio/sh-sci Fixes

Hi All,

This patch series adds minor fixes to sh-sci and serial_mctrl_gpio driver.
All patches in this series are cherry-picked from mainline.

Cheers,
Prabhakar


Frieder Schrempf (1):
serial: sh-sci: Don't check for mctrl_gpio_init() returning -ENOSYS

Geert Uytterhoeven (2):
serial: sh-sci: Terminate TX DMA during buffer flushing
serial: sh-sci: Don't check for mctrl_gpio_to_gpiod() returning error

Stefan Roese (1):
serial: mctrl_gpio: Check if GPIO property exisits before requesting
it

drivers/tty/serial/serial_mctrl_gpio.c | 15 +++++++++++++++
drivers/tty/serial/sh-sci.c | 25 +++++++++++++++----------
2 files changed, 30 insertions(+), 10 deletions(-)
Please ignore this patch series. Pavel has reviewed it and has pointed out the issues. Ill revisit the Terminate TX DMA patch at later point.

Cheers,
Prabhakar


Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


Re: [PATCH 4.4.y-cip] of: Add missing exports of node name compare functions

Pavel Machek
 

Hi!

Commit f42b0e18f2e5 ("of: add node name compare helper functions")
failed to add the module exports to of_node_name_eq() and
of_node_name_prefix(). Add them now.

Fixes: f42b0e18f2e5 ("of: add node name compare helper functions")
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com>
---
Fixes build failure for multi_v7_defconfig
---
Ok, what is going on here?

I don't believe f42b0e18f2e5 causes build failure; it adds functions,
but it can't cause build failure without a user.

Which commit fails the build? Do we have that in 4.4.y-cip? Can
this be placed before the buggy commit so that build is not broken?
For multi_v7_defconfig I get this below build error:

ERROR: "of_node_name_eq" [drivers/gpu/drm/rcar-du/rcar-du-drm.ko] undefined!
scripts/Makefile.modpost:91: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1161: recipe for target 'modules' failed
make: *** [modules] Error 2

commit eeaa48eee492d ("drm: rcar-du: Support panels connected directly to the DPAD outputs") fails the build which was added in 4.4-cip kernel.
Aha, so I'd expect Fixes: eeaa48eee492d ("drm: rcar-du: Support panels
connected directly to the DPAD outputs") in this patch. And yes, this
means that failure is real and this patch should go in.

ACK.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 4/4] serial: sh-sci: Don't check for mctrl_gpio_to_gpiod() returning error

Pavel Machek
 

Hi!

Since commit 1d267ea6539f2663 ("serial: mctrl-gpio: simplify init
routine"), mctrl_gpio_init() returns failure if the assignment to any
member of the gpio array results in an error pointer.
Since commit c359522194593815 ("serial: mctrl_gpio: Avoid probe failures
in case of missing gpiolib"), mctrl_gpio_to_gpiod() returns NULL in the
!CONFIG_GPIOLIB case.
Quick git log shows that "serial: mctrl_gpio: Avoid probe failures" is
not mentioned in 4.4 commit history. That very probably means that
this patch is not safe for 4.4 (situation similar to previous patch).

NAK.

Best regards,
Pavel

+++ b/drivers/tty/serial/sh-sci.c
@@ -1871,12 +1871,12 @@ static unsigned int sci_get_mctrl(struct uart_port *port)
if (s->autorts) {
if (sci_get_cts(port))
mctrl |= TIOCM_CTS;
- } else if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS))) {
+ } else if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS)) {
mctrl |= TIOCM_CTS;
}
- if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR)))
+ if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR))
mctrl |= TIOCM_DSR;
- if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD)))
+ if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD))
mctrl |= TIOCM_CAR;

return mctrl;
@@ -2782,10 +2782,8 @@ static int sci_probe_single(struct platform_device *dev,
return PTR_ERR(sciport->gpios);

if (p->capabilities & SCIx_HAVE_RTSCTS) {
- if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
- UART_GPIO_CTS)) ||
- !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
- UART_GPIO_RTS))) {
+ if (mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_CTS) ||
+ mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_RTS)) {
dev_err(&dev->dev, "Conflicting RTS/CTS config\n");
return -EINVAL;
}
--
2.17.1
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 3/4] serial: sh-sci: Don't check for mctrl_gpio_init() returning -ENOSYS

Pavel Machek
 

Hi!

Now that the mctrl_gpio code returns NULL instead of ERR_PTR(-ENOSYS)
if CONFIG_GPIOLIB is disabled, we can safely remove this check.
No, sorry, I don't think this is correct.

In 4.4, we still have

static inline struct gpio_desc *__must_check
devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
unsigned int index, enum gpiod_flags flags)
{
return ERR_PTR(-ENOSYS);
}

and that propagates through mctrl_gpio_init().

NAK.
Pavel

+++ b/drivers/tty/serial/sh-sci.c
@@ -2778,7 +2778,7 @@ static int sci_probe_single(struct platform_device *dev,
return ret;

sciport->gpios = mctrl_gpio_init(&sciport->port, 0);
- if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS)
+ if (IS_ERR(sciport->gpios))
return PTR_ERR(sciport->gpios);

if (p->capabilities & SCIx_HAVE_RTSCTS) {
--
2.17.1
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 2/4] serial: sh-sci: Terminate TX DMA during buffer flushing

Pavel Machek
 

Hi!

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 775b7ffd7d6d5db320d99b0a485c51e04dfcf9f1 upstream.

While the .flush_buffer() callback clears sci_port.tx_dma_len since
commit 1cf4a7efdc71cab8 ("serial: sh-sci: Fix race condition causing
garbage during shutdown"), it does not terminate a transmit DMA
operation that may be in progress.

Fix this by terminating any pending DMA operations, and resetting the
corresponding cookie.
What is the impact of the bug? DMA running during reboot, but not
doing any harm?

Anyway, this looks okay to me.

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 1/4] serial: mctrl_gpio: Check if GPIO property exisits before requesting it

Pavel Machek
 

Hi!

This patch adds a check for the GPIOs property existence, before the
GPIO is requested. This fixes an issue seen when the 8250 mctrl_gpio
support is added (2nd patch in this patch series) on x86 platforms using
ACPI.
Ok, so this fixes serial_mctrl_gpio on some ACPI systems. It should be
a NOP on Renesas hardware, right?

Do you need this one in 4.4? Was it tested on problematic ACPI system?

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@denx.de>
Sent: 03 September 2020 18:55
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
<biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Hi!

This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Okay, so this is a cleanup that makes sense for mainline.

[PL: Fixes 6e52cced1aa58 ("gpio: rcar: Implement gpiochip.set_multiple()")]
Does it fix set_multiple? ... seems so.

Fixing set_multiple is possible with this oneliner, right?

@@ -541,7 +532,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
irq_chip->flags= IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;

-ret = gpiochip_add(gpio_chip);
+ret = gpiochip_add_data(gpio_chip, p);
if (ret) {
dev_err(dev, "failed to add GPIO controller\n");
goto err0;
The patch is okay and now I understand why you want it. It would have
been nice if changelog told me directly.
My bad.

Can set_multiple use container_of() too? We get less differences
between 4.4 and 4.4-cip that way, and it is still one-liner.
It could use gpio_to_priv(), but since there was an commit upstream already I just pulled it in.

Let me know if you if you are OK with the patch or I shall post a one-liner.

Cheers,
Prabhakar


Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


Re: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Pavel Machek
 

Hi!

This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Okay, so this is a cleanup that makes sense for mainline.

[PL: Fixes 6e52cced1aa58 ("gpio: rcar: Implement gpiochip.set_multiple()")]
Does it fix set_multiple? ... seems so.

Fixing set_multiple is possible with this oneliner, right?

@@ -541,7 +532,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
irq_chip->flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;

- ret = gpiochip_add(gpio_chip);
+ ret = gpiochip_add_data(gpio_chip, p);
if (ret) {
dev_err(dev, "failed to add GPIO controller\n");
goto err0;
The patch is okay and now I understand why you want it. It would have
been nice if changelog told me directly.

Can set_multiple use container_of() too? We get less differences
between 4.4 and 4.4-cip that way, and it is still one-liner.

Best regards,

Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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