Date   

[PATCH v2 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support

Lad Prabhakar
 

Hi All,

This patch series adds SoC detection support for Renesas RZ/G1x SoC's.

All the patches apart from {7, 9, 11}/11 have been cherry picked from
Linux v5.10-rc6

Cheers,
Prabhakar

Changes for v2:
* Added upstream commit-id for patches {7, 9, 11}/11

Biju Das (1):
soc: renesas: Identify RZ/G1C

Geert Uytterhoeven (6):
base: soc: Early register bus when needed
soc: renesas: Identify SoC and register with the SoC bus
ARM: dts: r8a7743: Add device node for PRR
ARM: dts: r8a7745: Add device node for PRR
soc: renesas: Identify RZ/G1N
soc: renesas: Identify RZ/G1H

Lad Prabhakar (3):
ARM: dts: r8a7744: Add device node for PRR
ARM: dts: r8a7742: Add device node for PRR
ARM: dts: r8a77470: Add device node for PRR

Simon Horman (1):
dt-bindings: arm: renesas: Convert 'renesas,prr' to json-schema

.../devicetree/bindings/arm/renesas,prr.yaml | 37 +++++
arch/arm/boot/dts/r8a7742.dtsi | 5 +
arch/arm/boot/dts/r8a7743.dtsi | 5 +
arch/arm/boot/dts/r8a7744.dtsi | 5 +
arch/arm/boot/dts/r8a7745.dtsi | 5 +
arch/arm/boot/dts/r8a77470.dtsi | 5 +
arch/arm/mach-shmobile/Kconfig | 5 +
drivers/base/soc.c | 9 ++
drivers/soc/renesas/Makefile | 2 +
drivers/soc/renesas/renesas-soc.c | 147 ++++++++++++++++++
10 files changed, 225 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/renesas,prr.yaml
create mode 100644 drivers/soc/renesas/renesas-soc.c

--
2.17.1


Re: [PATCH 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR

Lad Prabhakar
 

Hi Nobuhiro,

Thank you for the review.

-----Original Message-----
From: nobuhiro1.iwamatsu@toshiba.co.jp <nobuhiro1.iwamatsu@toshiba.co.jp>
Sent: 01 December 2020 00:52
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>; cip-dev@lists.cip-project.org;
pavel@denx.de
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: RE: [PATCH 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR

Hi,

-----Original Message-----
From: Lad Prabhakar [mailto:prabhakar.mahadev-lad.rj@bp.renesas.com]
Sent: Monday, November 30, 2020 11:19 PM
To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
<nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [PATCH 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR

Add a device node for the Product Register, which provides SoC product
and revision information.

Changes are already present in upstream but the PRR node is part of
initial SoC DTSI and cannot be individually backported hence this
new commit.
I thought it would be good to include the relevant commit ID.
For example, this should be included as 6929dfc5918049272e07653b1760b0b305f098e6,
but has been removed by 605e89568fafe57c1791219b411ab0771981beea.

If you accept this suggestion, please add the same comment to other similar patches.
Agreed I will update the commit message and repost.

Cheers,
Prabhakar

Best regards,
Nobuhiro


Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a7744.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 079f46f17049..312c9aae8a10 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1526,6 +1526,11 @@
};
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a7744",
"renesas,cmt-48-gen2";
--
2.17.1


Re: [PATCH 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Lad Prabhakar [mailto:prabhakar.mahadev-lad.rj@bp.renesas.com]
Sent: Monday, November 30, 2020 11:19 PM
To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
<nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [PATCH 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support

Hi All,

This patch series adds SoC detection support for Renesas RZ/G1x SoC's.

All the patches apart from {7, 9, 11}/11 have been cherry picked from
Linux v5.10-rc6

Cheers,
Prabhakar

Biju Das (1):
soc: renesas: Identify RZ/G1C

Geert Uytterhoeven (6):
base: soc: Early register bus when needed
soc: renesas: Identify SoC and register with the SoC bus
ARM: dts: r8a7743: Add device node for PRR
ARM: dts: r8a7745: Add device node for PRR
soc: renesas: Identify RZ/G1N
soc: renesas: Identify RZ/G1H

Lad Prabhakar (3):
ARM: dts: r8a7744: Add device node for PRR
ARM: dts: r8a7742: Add device node for PRR
ARM: dts: r8a77470: Add device node for PRR

Simon Horman (1):
dt-bindings: arm: renesas: Convert 'renesas,prr' to json-schema

.../devicetree/bindings/arm/renesas,prr.yaml | 37 +++++
arch/arm/boot/dts/r8a7742.dtsi | 5 +
arch/arm/boot/dts/r8a7743.dtsi | 5 +
arch/arm/boot/dts/r8a7744.dtsi | 5 +
arch/arm/boot/dts/r8a7745.dtsi | 5 +
arch/arm/boot/dts/r8a77470.dtsi | 5 +
arch/arm/mach-shmobile/Kconfig | 5 +
drivers/base/soc.c | 9 ++
drivers/soc/renesas/Makefile | 2 +
drivers/soc/renesas/renesas-soc.c | 147 ++++++++++++++++++
10 files changed, 225 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/renesas,prr.yaml
create mode 100644 drivers/soc/renesas/renesas-soc.c
I reviewed this patch series, there is not issue.
I can apply and push if there is no objection.

Best regards,
Nobuhiro


Re: [PATCH 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Lad Prabhakar [mailto:prabhakar.mahadev-lad.rj@bp.renesas.com]
Sent: Monday, November 30, 2020 11:19 PM
To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
<nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [PATCH 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR

Add a device node for the Product Register, which provides SoC product
and revision information.

Changes are already present in upstream but the PRR node is part of
initial SoC DTSI and cannot be individually backported hence this
new commit.
I thought it would be good to include the relevant commit ID.
For example, this should be included as 6929dfc5918049272e07653b1760b0b305f098e6,
but has been removed by 605e89568fafe57c1791219b411ab0771981beea.

If you accept this suggestion, please add the same comment to other similar patches.

Best regards,
Nobuhiro


Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a7744.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 079f46f17049..312c9aae8a10 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1526,6 +1526,11 @@
};
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a7744",
"renesas,cmt-48-gen2";
--
2.17.1


[isar-cip-core][PATCH 2/3] Update Isar revision

Jan Kiszka
 

From: Jan Kiszka <jan.kiszka@siemens.com>

Allows to drop one patch, needs explicit setting of DISTRO_APT_SOURCES.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
conf/distro/cip-core-buster.conf | 2 +
conf/distro/cip-core-stretch.conf | 2 +
.../0001-u-boot-add-libubootenv.patch | 168 ------------------
kas-cip.yml | 5 +-
.../wic/plugins/source/efibootguard-boot.py | 2 +-
.../wic/plugins/source/efibootguard-efi.py | 2 +-
6 files changed, 7 insertions(+), 174 deletions(-)
delete mode 100644 isar-patches/0001-u-boot-add-libubootenv.patch

diff --git a/conf/distro/cip-core-buster.conf b/conf/distro/cip-core-buster.conf
index c5cb39c..ef60d24 100644
--- a/conf/distro/cip-core-buster.conf
+++ b/conf/distro/cip-core-buster.conf
@@ -12,5 +12,7 @@
require conf/distro/debian-buster.conf
require cip-core-common.inc

+DISTRO_APT_SOURCES = "conf/distro/debian-buster.list"
+
PREFERRED_VERSION_linux-cip ?= "4.19.%"
PREFERRED_VERSION_linux-cip-rt ?= "4.19.%"
diff --git a/conf/distro/cip-core-stretch.conf b/conf/distro/cip-core-stretch.conf
index 31900fa..ad185dd 100644
--- a/conf/distro/cip-core-stretch.conf
+++ b/conf/distro/cip-core-stretch.conf
@@ -12,5 +12,7 @@
require conf/distro/debian-stretch.conf
require cip-core-common.inc

+DISTRO_APT_SOURCES = "conf/distro/debian-stretch.list"
+
PREFERRED_VERSION_linux-cip ?= "4.19.%"
PREFERRED_VERSION_linux-cip-rt ?= "4.19.%"
diff --git a/isar-patches/0001-u-boot-add-libubootenv.patch b/isar-patches/0001-u-boot-add-libubootenv.patch
deleted file mode 100644
index 6002cf1..0000000
--- a/isar-patches/0001-u-boot-add-libubootenv.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From dda00e6addc7c51862b8175d473a1ea42dcd5c9e Mon Sep 17 00:00:00 2001
-From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
-Date: Fri, 19 Jun 2020 17:00:36 +0200
-Subject: [PATCH v2] u-boot: add libubootenv
-
-Add the new library libubootenv and remove fw_printenv and fw_setenv
-form u-boot-tools as the are now part of the new library.
-
-libubootenv is a library that provides a hardware independent
-way to access to U-Boot environment. U-Boot has its default environment
-compiled board-dependently and this means that tools to access the environment
-are also board specific, too.
-
-libubootenv conflicts with u-boot-tools from Debian 10
-as both try to install fw_printenv and fw_sentenv. This conflict is not
-part of the control file as it breaks the installation of custom u-boot-tools
-from the u-boot-sources.
-
-This patch uses dpkg-gdb to build the package from salsa.debian.org and adds
-a fix for https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=967487.
-
-Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
----
-
-Changes V2:
-- use dpkg-gbd instead dpkg
-- use salsa.debian.org as source
-- add fix for https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=967487
-
- meta-isar/conf/machine/de0-nano-soc.conf | 2 +-
- .../0002-Add-support-GNUInstallDirs.patch | 48 +++++++++++++++++++
- .../libubootenv/libubootenv_0.2.bb | 30 ++++++++++++
- .../files/debian/u-boot-tools.conffiles | 1 -
- .../u-boot/files/debian/u-boot-tools.install | 2 -
- .../u-boot/files/debian/u-boot-tools.links | 1 -
- 6 files changed, 79 insertions(+), 5 deletions(-)
- create mode 100644 meta/recipes-bsp/libubootenv/files/0002-Add-support-GNUInstallDirs.patch
- create mode 100644 meta/recipes-bsp/libubootenv/libubootenv_0.2.bb
- delete mode 100644 meta/recipes-bsp/u-boot/files/debian/u-boot-tools.conffiles
- delete mode 100644 meta/recipes-bsp/u-boot/files/debian/u-boot-tools.links
-
-diff --git a/meta-isar/conf/machine/de0-nano-soc.conf b/meta-isar/conf/machine/de0-nano-soc.conf
-index 3a2c009..6558d90 100644
---- a/meta-isar/conf/machine/de0-nano-soc.conf
-+++ b/meta-isar/conf/machine/de0-nano-soc.conf
-@@ -15,4 +15,4 @@ WKS_FILE ?= "de0-nano-soc.wks.in"
- IMAGER_INSTALL += "u-boot-de0-nano-soc"
- IMAGER_BUILD_DEPS += "u-boot-de0-nano-soc"
-
--IMAGE_INSTALL += "u-boot-tools u-boot-script"
-+IMAGE_INSTALL += "u-boot-tools libubootenv u-boot-script"
-diff --git a/meta/recipes-bsp/libubootenv/files/0002-Add-support-GNUInstallDirs.patch b/meta/recipes-bsp/libubootenv/files/0002-Add-support-GNUInstallDirs.patch
-new file mode 100644
-index 0000000..f8c3038
---- /dev/null
-+++ b/meta/recipes-bsp/libubootenv/files/0002-Add-support-GNUInstallDirs.patch
-@@ -0,0 +1,48 @@
-+From b17d194bd8285a19382a902a0bec9e5e042df064 Mon Sep 17 00:00:00 2001
-+From: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
-+Date: Tue, 16 Apr 2019 08:52:01 +0900
-+Subject: [PATCH 2/4] Add support GNUInstallDirs
-+
-+This adds the functionality of the module "GNUInstallDirs" to make the
-+installation compatible with GNU.
-+
-+https://cmake.org/cmake/help/v3.14/module/GNUInstallDirs.html
-+
-+Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
-+---
-+ CMakeLists.txt | 2 ++
-+ src/CMakeLists.txt | 8 ++++----
-+ 2 files changed, 6 insertions(+), 4 deletions(-)
-+
-+diff --git a/CMakeLists.txt b/CMakeLists.txt
-+index 104969e..57477fc 100644
-+--- a/CMakeLists.txt
-++++ b/CMakeLists.txt
-+@@ -10,6 +10,8 @@ add_definitions(-DVERSION="${VERSION}")
-+
-+ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -std=gnu99")
-+
-++include("GNUInstallDirs")
-++
-+ #set(CMAKE_C_FLAGS_DEBUG "-g")
-+ include_directories ("${PROJECT_SOURCE_DIR}/src")
-+ add_subdirectory (src)
-+diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
-+index ea5979c..d97f221 100644
-+--- a/src/CMakeLists.txt
-++++ b/src/CMakeLists.txt
-+@@ -19,7 +19,7 @@ add_executable(fw_setenv fw_setenv.c)
-+ target_link_libraries(fw_printenv ubootenv z)
-+ target_link_libraries(fw_setenv ubootenv z)
-+
-+-install (TARGETS ubootenv DESTINATION lib)
-+-install (FILES libuboot.h DESTINATION include)
-+-install (TARGETS fw_printenv DESTINATION bin)
-+-install (TARGETS fw_setenv DESTINATION bin)
-++install (TARGETS ubootenv DESTINATION "${CMAKE_INSTALL_LIBDIR}")
-++install (FILES libuboot.h DESTINATION "${CMAKE_INSTALL_INCLUDEDIR}")
-++install (TARGETS fw_printenv DESTINATION "${CMAKE_INSTALL_BINDIR}")
-++install (TARGETS fw_setenv DESTINATION "${CMAKE_INSTALL_BINDIR}")
-+--
-+2.20.1
-+
-diff --git a/meta/recipes-bsp/libubootenv/libubootenv_0.2.bb b/meta/recipes-bsp/libubootenv/libubootenv_0.2.bb
-new file mode 100644
-index 0000000..995e581
---- /dev/null
-+++ b/meta/recipes-bsp/libubootenv/libubootenv_0.2.bb
-@@ -0,0 +1,30 @@
-+# libubootenv
-+#
-+# This software is a part of ISAR.
-+# Copyright (c) Siemens AG, 2020
-+#
-+# SPDX-License-Identifier: MIT
-+
-+DESCRIPTION = "swupdate utility for software updates"
-+HOMEPAGE= "https://github.com/sbabic/swupdate"
-+LICENSE = "GPL-2.0"
-+LIC_FILES_CHKSUM = "file://${LAYERDIR_isar}/licenses/COPYING.GPLv2;md5=751419260aa954499f7abaabaa882bbe"
-+
-+inherit dpkg-gbp
-+
-+SRC_URI = "git://salsa.debian.org/debian/libubootenv.git;protocol=https \
-+ file://0002-Add-support-GNUInstallDirs.patch;apply=no "
-+SRCREV = "2c7cb6d941d906dcc1d2e447cc17e418485dff12"
-+
-+S = "${WORKDIR}/git"
-+
-+do_prepare_build() {
-+ cd ${S}
-+ export QUILT_PATCHES=debian/patches
-+ quilt import -f ${WORKDIR}/*.patch
-+ quilt push -a
-+}
-+
-+dpkg_runbuild_prepend() {
-+ export DEB_BUILD_OPTIONS="nocheck"
-+}
-diff --git a/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.conffiles b/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.conffiles
-deleted file mode 100644
-index d49a8fb..0000000
---- a/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.conffiles
-+++ /dev/null
-@@ -1 +0,0 @@
--/etc/fw_env.config
-diff --git a/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.install b/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.install
-index d1ae3e0..2893b9a 100644
---- a/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.install
-+++ b/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.install
-@@ -1,5 +1,3 @@
- tools/dumpimage /usr/bin/
--tools/env/fw_printenv /usr/bin/
- tools/mkenvimage /usr/bin/
- tools/mkimage /usr/bin/
--tools/env/fw_env.config /etc
-diff --git a/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.links b/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.links
-deleted file mode 100644
-index 92f5a6c..0000000
---- a/meta/recipes-bsp/u-boot/files/debian/u-boot-tools.links
-+++ /dev/null
-@@ -1 +0,0 @@
--/usr/bin/fw_printenv /usr/bin/fw_setenv
---
-2.20.1
-
diff --git a/kas-cip.yml b/kas-cip.yml
index 66a58f1..922ee7e 100644
--- a/kas-cip.yml
+++ b/kas-cip.yml
@@ -20,13 +20,10 @@ repos:

isar:
url: https://github.com/ilbers/isar.git
- refspec: 351af175bc54a201c6f44307d4e998bd6c0afdb8
+ refspec: 76eac233f1b1d0d117b3f05b3dec8a6da1cdf4c7
layers:
meta:
patches:
- 01-libubootenv:
- path: isar-patches/0001-u-boot-add-libubootenv.patch
- repo: cip-core
02-initramfs:
path: isar-patches/v7-0001-meta-support-Generate-a-custom-initramfs.patch
repo: cip-core
diff --git a/scripts/lib/wic/plugins/source/efibootguard-boot.py b/scripts/lib/wic/plugins/source/efibootguard-boot.py
index d291f75..b85cfca 100644
--- a/scripts/lib/wic/plugins/source/efibootguard-boot.py
+++ b/scripts/lib/wic/plugins/source/efibootguard-boot.py
@@ -35,7 +35,7 @@ import logging
msger = logging.getLogger('wic')

from wic.pluginbase import SourcePlugin
-from wic.utils.misc import exec_cmd, get_bitbake_var, BOOTDD_EXTRA_SPACE
+from wic.misc import exec_cmd, get_bitbake_var, BOOTDD_EXTRA_SPACE

class EfibootguardBootPlugin(SourcePlugin):
"""
diff --git a/scripts/lib/wic/plugins/source/efibootguard-efi.py b/scripts/lib/wic/plugins/source/efibootguard-efi.py
index 6647212..9eb2353 100644
--- a/scripts/lib/wic/plugins/source/efibootguard-efi.py
+++ b/scripts/lib/wic/plugins/source/efibootguard-efi.py
@@ -33,7 +33,7 @@ import os
msger = logging.getLogger('wic')

from wic.pluginbase import SourcePlugin
-from wic.utils.misc import exec_cmd, get_bitbake_var, BOOTDD_EXTRA_SPACE
+from wic.misc import exec_cmd, get_bitbake_var, BOOTDD_EXTRA_SPACE

class EfibootguardEFIPlugin(SourcePlugin):
"""
--
2.26.2


[isar-cip-core][PATCH 1/3] README: Add some community resources

Jan Kiszka
 

From: Jan Kiszka <jan.kiszka@siemens.com>

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
README.md | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 4f74af7..0d2374f 100644
--- a/README.md
+++ b/README.md
@@ -48,8 +48,23 @@ Run the generated securiy images on QEMU (x86-64bit)

## Community Resources

-TBD
+Mailing list:

+ - cip-dev@lists.cip-project.org
+
+ - Subscription:
+ - cip-dev+subscribe@lists.cip-project.org
+ - https://lists.cip-project.org/g/cip-dev
+
+ - Archives:
+ - https://lore.kernel.org/cip-dev/
+ - https://lists.cip-project.org/g/cip-dev
+
+Continuous integration:
+
+ - https://gitlab.com/cip-project/cip-core/isar-cip-core/-/pipelines
+
+
## License

Unless otherwise stated in the respective file, files in this layer are
--
2.26.2


[isar-cip-core][PATCH 3/3] Update to kas 2.3.3

Jan Kiszka
 

From: Jan Kiszka <jan.kiszka@siemens.com>

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
.gitignore | 3 ++-
.gitlab-ci.yml | 2 +-
README.md | 12 ++++++------
doc/README.secureboot.md | 4 ++--
doc/README_iwg20m.md | 11 +++++------
kas-cip.yml | 4 +++-
kas/board/bbb.yml | 2 +-
kas/board/hihope-rzg2m.yml | 2 +-
kas/board/iwg20m.yml | 2 +-
kas/board/qemu-amd64.yml | 2 +-
kas/board/simatic-ipc227e.yml | 2 +-
kas/opt/4.4.yml | 2 +-
kas/opt/ebg-secure-boot-base.yml | 2 +-
kas/opt/ebg-secure-boot-snakeoil.yml | 2 +-
kas/opt/ebg-swu.yml | 2 +-
kas/opt/qemu-swupdate.yml | 2 +-
kas/opt/rt.yml | 2 +-
kas/opt/security.yml | 2 +-
kas/opt/stretch.yml | 2 +-
kas/opt/targz-img.yml | 2 +-
kas/opt/test.yml | 2 +-
21 files changed, 34 insertions(+), 32 deletions(-)

diff --git a/.gitignore b/.gitignore
index bfedb76..5142933 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,4 @@
build/
isar/
-kas-docker
\ No newline at end of file
+kas-docker
+kas-container
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 0b0a771..77d361c 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,4 +1,4 @@
-image: kasproject/kas-isar:2.2
+image: ghcr.io/siemens/kas/kas-isar:2.3.3

variables:
GIT_STRATEGY: clone
diff --git a/README.md b/README.md
index 0d2374f..f038db3 100644
--- a/README.md
+++ b/README.md
@@ -10,18 +10,18 @@ from scratch.

## Building Target Images

-Install `kas-docker` from the [kas project](https://github.com/siemens/kas):
+Install `kas-container` from the [kas project](https://github.com/siemens/kas):

- wget https://raw.githubusercontent.com/siemens/kas/2.2/kas-docker
- chmod a+x kas-docker
+ wget https://raw.githubusercontent.com/siemens/kas/2.3.3/kas-container
+ chmod a+x kas-container

Furthermore, install docker and make sure you have required permissions to
start containers.

-To build, e.g., the QEMU AMD64 target inside Docker, invoke kas-docker like
+To build, e.g., the QEMU AMD64 target inside Docker, invoke kas-container like
this:

- ./kas-docker --isar build kas-cip.yml:kas/board/qemu-amd64.yml
+ ./kas-container build kas-cip.yml:kas/board/qemu-amd64.yml

This image can be run using `start-qemu.sh x86`.

@@ -39,7 +39,7 @@ card, run
## Building Security target images
Building images for QEMU x86-64bit machine

- ./kas-docker --isar build kas-cip.yml:kas/board/qemu-amd64.yml:kas/opt/security.yml
+ ./kas-container build kas-cip.yml:kas/board/qemu-amd64.yml:kas/opt/security.yml

Run the generated securiy images on QEMU (x86-64bit)

diff --git a/doc/README.secureboot.md b/doc/README.secureboot.md
index f365ab6..84131bb 100644
--- a/doc/README.secureboot.md
+++ b/doc/README.secureboot.md
@@ -139,13 +139,13 @@ scripts/start-efishell.sh secureboot-tools
Build the image with a signed efibootguard and unified kernel image
with the snakeoil keys by executing:
```
-kas-docker --isar build kas-cip.yml:kas/board/qemu-amd64.yml:kas/opt/ebg-swu.yml:kas/opt/ebg-secure-boot-snakeoil.yml
+kas-container build kas-cip.yml:kas/board/qemu-amd64.yml:kas/opt/ebg-swu.yml:kas/opt/ebg-secure-boot-snakeoil.yml
```

For user-generated keys, create a new option file. This option file could look like this:
```
header:
- version: 8
+ version: 10
includes:
- opt/ebg-swu.yml
- opt/ebg-secure-boot-initramfs.yml
diff --git a/doc/README_iwg20m.md b/doc/README_iwg20m.md
index 20e4bf6..317d240 100644
--- a/doc/README_iwg20m.md
+++ b/doc/README_iwg20m.md
@@ -5,16 +5,15 @@ Copyright: Toshiba corp.

## Build the CIP Core image

-Use [kas-docker](https://github.com/siemens/kas/blob/master/kas-docker) to build the image. Currently this board is only supported by the CIP kernel version `4.4.y`.
+Set up `kas-container` as described in the [top-level README](../README.md).
+Then build the image:

```
-$ git clone https://gitlab.com/cip-project/cip-core/isar-cip-core.git
-$ cd isar-cip-core
-$ wget https://raw.githubusercontent.com/siemens/kas/master/kas-docker
-$ chmod a+x kas-docker
-$ ./kas-docker --isar build kas-cip.yml:kas/board/iwg20m.yml
+$ ./kas-container build kas-cip.yml:kas/board/iwg20m.yml
```

+Note: Currently this board is only supported by the CIP kernel version `4.4.y`.
+
After the build is finished, insert a micro SDCard and flash the image with `bmaptool` (a better `dd`). Make sure you substitute `/dev/sdX` by the device file corresponding to your SDCard.

```
diff --git a/kas-cip.yml b/kas-cip.yml
index 922ee7e..f50cd6c 100644
--- a/kas-cip.yml
+++ b/kas-cip.yml
@@ -10,11 +10,13 @@
#

header:
- version: 8
+ version: 10

distro: cip-core-buster
target: cip-core-image

+build_system: isar
+
repos:
cip-core:

diff --git a/kas/board/bbb.yml b/kas/board/bbb.yml
index fc8dbbe..13f0a7f 100644
--- a/kas/board/bbb.yml
+++ b/kas/board/bbb.yml
@@ -10,6 +10,6 @@
#

header:
- version: 8
+ version: 10

machine: bbb
diff --git a/kas/board/hihope-rzg2m.yml b/kas/board/hihope-rzg2m.yml
index bbef122..9d11bb6 100644
--- a/kas/board/hihope-rzg2m.yml
+++ b/kas/board/hihope-rzg2m.yml
@@ -10,6 +10,6 @@
#

header:
- version: 8
+ version: 10

machine: hihope-rzg2m
diff --git a/kas/board/iwg20m.yml b/kas/board/iwg20m.yml
index 3def3af..2e74ad1 100644
--- a/kas/board/iwg20m.yml
+++ b/kas/board/iwg20m.yml
@@ -10,6 +10,6 @@
#

header:
- version: 8
+ version: 10

machine: iwg20m
diff --git a/kas/board/qemu-amd64.yml b/kas/board/qemu-amd64.yml
index 02e99ba..06e9e18 100644
--- a/kas/board/qemu-amd64.yml
+++ b/kas/board/qemu-amd64.yml
@@ -10,6 +10,6 @@
#

header:
- version: 8
+ version: 10

machine: qemu-amd64
diff --git a/kas/board/simatic-ipc227e.yml b/kas/board/simatic-ipc227e.yml
index a2c6965..70cf88e 100644
--- a/kas/board/simatic-ipc227e.yml
+++ b/kas/board/simatic-ipc227e.yml
@@ -10,6 +10,6 @@
#

header:
- version: 8
+ version: 10

machine: simatic-ipc227e
diff --git a/kas/opt/4.4.yml b/kas/opt/4.4.yml
index 87be777..65a4775 100644
--- a/kas/opt/4.4.yml
+++ b/kas/opt/4.4.yml
@@ -10,7 +10,7 @@
#

header:
- version: 8
+ version: 10

local_conf_header:
kernel-version: |
diff --git a/kas/opt/ebg-secure-boot-base.yml b/kas/opt/ebg-secure-boot-base.yml
index c1d98b1..30ca35a 100644
--- a/kas/opt/ebg-secure-boot-base.yml
+++ b/kas/opt/ebg-secure-boot-base.yml
@@ -10,7 +10,7 @@
#

header:
- version: 8
+ version: 10

local_conf_header:
initramfs: |
diff --git a/kas/opt/ebg-secure-boot-snakeoil.yml b/kas/opt/ebg-secure-boot-snakeoil.yml
index cda8177..8a72084 100644
--- a/kas/opt/ebg-secure-boot-snakeoil.yml
+++ b/kas/opt/ebg-secure-boot-snakeoil.yml
@@ -10,7 +10,7 @@
#

header:
- version: 8
+ version: 10
includes:
- ebg-secure-boot-base.yml

diff --git a/kas/opt/ebg-swu.yml b/kas/opt/ebg-swu.yml
index 304fa4d..aa3aed1 100644
--- a/kas/opt/ebg-swu.yml
+++ b/kas/opt/ebg-swu.yml
@@ -10,7 +10,7 @@
#

header:
- version: 8
+ version: 10

local_conf_header:
swupdate: |
diff --git a/kas/opt/qemu-swupdate.yml b/kas/opt/qemu-swupdate.yml
index 99b4547..3f5fedf 100644
--- a/kas/opt/qemu-swupdate.yml
+++ b/kas/opt/qemu-swupdate.yml
@@ -11,7 +11,7 @@


header:
- version: 8
+ version: 10

local_conf_header:
qemu-wic: |
diff --git a/kas/opt/rt.yml b/kas/opt/rt.yml
index b52774a..b8fe6bb 100644
--- a/kas/opt/rt.yml
+++ b/kas/opt/rt.yml
@@ -10,7 +10,7 @@
#

header:
- version: 8
+ version: 10

local_conf_header:
preempt-rt: |
diff --git a/kas/opt/security.yml b/kas/opt/security.yml
index 237cbeb..3cf88af 100644
--- a/kas/opt/security.yml
+++ b/kas/opt/security.yml
@@ -9,6 +9,6 @@
# SPDX-License-Identifier: MIT
#
header:
- version: 8
+ version: 10

target: cip-core-image-security
diff --git a/kas/opt/stretch.yml b/kas/opt/stretch.yml
index 29a497a..8e854c2 100644
--- a/kas/opt/stretch.yml
+++ b/kas/opt/stretch.yml
@@ -10,6 +10,6 @@
#

header:
- version: 8
+ version: 10

distro: cip-core-stretch
diff --git a/kas/opt/targz-img.yml b/kas/opt/targz-img.yml
index 1a73024..7e9081f 100644
--- a/kas/opt/targz-img.yml
+++ b/kas/opt/targz-img.yml
@@ -10,7 +10,7 @@
#

header:
- version: 8
+ version: 10

# lava uses nfs to deploy the image. For this we need a tarball instead of
# full image
diff --git a/kas/opt/test.yml b/kas/opt/test.yml
index 4238f0b..ee48196 100644
--- a/kas/opt/test.yml
+++ b/kas/opt/test.yml
@@ -9,7 +9,7 @@
#

header:
- version: 8
+ version: 10

local_conf_header:
testing: |
--
2.26.2


[isar-cip-core][PATCH 0/3] Some updates

Jan Kiszka
 

The last patch has to wait until [1] is rolled out to our CI
infrastructure.

Jan

[1] https://gitlab.com/cip-project/cip-testing/gitlab-cloud-ci/-/commit/1cd85bec680587b9410c56cdfebc3a4d6ba1bd8b

Jan Kiszka (3):
README: Add some community resources
Update Isar revision
Update to kas 2.3.3

.gitignore | 3 +-
.gitlab-ci.yml | 2 +-
README.md | 29 ++-
conf/distro/cip-core-buster.conf | 2 +
conf/distro/cip-core-stretch.conf | 2 +
doc/README.secureboot.md | 4 +-
doc/README_iwg20m.md | 11 +-
.../0001-u-boot-add-libubootenv.patch | 168 ------------------
kas-cip.yml | 9 +-
kas/board/bbb.yml | 2 +-
kas/board/hihope-rzg2m.yml | 2 +-
kas/board/iwg20m.yml | 2 +-
kas/board/qemu-amd64.yml | 2 +-
kas/board/simatic-ipc227e.yml | 2 +-
kas/opt/4.4.yml | 2 +-
kas/opt/ebg-secure-boot-base.yml | 2 +-
kas/opt/ebg-secure-boot-snakeoil.yml | 2 +-
kas/opt/ebg-swu.yml | 2 +-
kas/opt/qemu-swupdate.yml | 2 +-
kas/opt/rt.yml | 2 +-
kas/opt/security.yml | 2 +-
kas/opt/stretch.yml | 2 +-
kas/opt/targz-img.yml | 2 +-
kas/opt/test.yml | 2 +-
.../wic/plugins/source/efibootguard-boot.py | 2 +-
.../wic/plugins/source/efibootguard-efi.py | 2 +-
26 files changed, 57 insertions(+), 207 deletions(-)
delete mode 100644 isar-patches/0001-u-boot-add-libubootenv.patch

--
2.26.2


Re: [isar-cip-core][PATCH v2 0/2] Secureboot fixes

Jan Kiszka
 

On 30.11.20 15:48, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>

Adapt OVMF binaries to new upstream names.
Repeat scan for rootfs until udev finished populating /dev or a timeout occurs.
Build at:
https://gitlab.com/Quirin.Gy/isar-cip-core/-/pipelines/223158898

--
Changes Version 2:
- fix author and commit message

Vijai Kumar K (2):
start-qemu.sh: Change OVMF binary names
Secureboot: Wait until udev populates /dev

doc/README.secureboot.md | 12 +-
.../files/secure-boot-debian-local-patch | 104 +++++++++++-------
start-qemu.sh | 4 +-
3 files changed, 72 insertions(+), 48 deletions(-)
Thanks, applied.

Jan

--
Siemens AG, T RDA IOT
Corporate Competence Center Embedded Linux


[isar-cip-core][PATCH v2 2/2] Secureboot: Wait until udev populates /dev

Quirin Gylstorff
 

From: Vijai Kumar K <Vijaikumar_Kanagarajan@mentor.com>

In actual physical targets like ipc227e, with the current initramfs
local file, the system drops to initramfs shell during boot.

This is due to "blkid -o device" returning empty list since the udev
has not yet created the necessary entries in /dev.

Add a timeout to reattempt finding a valid partition before giving up.

Signed-off-by: Vijai Kumar K <Vijaikumar_Kanagarajan@mentor.com>
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
.../files/secure-boot-debian-local-patch | 104 +++++++++++-------
1 file changed, 64 insertions(+), 40 deletions(-)

diff --git a/recipes-support/initramfs-config/files/secure-boot-debian-local-patch b/recipes-support/initramfs-config/files/secure-boot-debian-local-patch
index 219578c..cd2d271 100644
--- a/recipes-support/initramfs-config/files/secure-boot-debian-local-patch
+++ b/recipes-support/initramfs-config/files/secure-boot-debian-local-patch
@@ -1,79 +1,103 @@
---- local 2020-07-02 14:59:15.461895194 +0200
-+++ ../../../../../../../../../../../recipes-support/initramfs-config/files/local 2020-07-02 14:58:58.405730914 +0200
+--- local.orig 2020-11-18 14:42:43.540055680 +0530
++++ local 2020-11-18 20:15:48.687164540 +0530
@@ -1,5 +1,4 @@
# Local filesystem mounting -*- shell-script -*-
-
local_top()
{
if [ "${local_top_used}" != "yes" ]; then
-@@ -155,34 +154,47 @@
- local_mount_root()
+@@ -152,36 +151,70 @@
+ DEV="${real_dev}"
+ }
+
+-local_mount_root()
++local_find_by_uuid()
{
- local_top
+- local_top
- if [ -z "${ROOT}" ]; then
- panic "No root device specified. Boot arguments must include a root= parameter."
- fi
- local_device_setup "${ROOT}" "root file system"
- ROOT="${DEV}"
--
++ partitions="$1"
+
- # Get the root filesystem type if not set
- if [ -z "${ROOTFSTYPE}" ] || [ "${ROOTFSTYPE}" = auto ]; then
- FSTYPE=$(get_fstype "${ROOT}")
- else
- FSTYPE=${ROOTFSTYPE}
-+ if [ ! -e /conf/image_uuid ]; then
-+ panic "could not find image_uuid to select correct root file system"
- fi
-+ local INITRAMFS_IMAGE_UUID=$(cat /conf/image_uuid)
-+ local partitions=$(blkid -o device)
+- fi
+ for part in $partitions; do
-+ if [ "$(blkid -p ${part} --match-types novfat -s USAGE -o value)" = "filesystem" ]; then
-+ local_device_setup "${part}" "root file system"
-+ ROOT="${DEV}"
++ if [ "$(blkid -p ${part} --match-types novfat -s USAGE -o value)" = "filesystem" ]; then
++ local_device_setup "${part}" "root file system"
++ ROOT="${DEV}"
+
-+ # Get the root filesystem type if not set
-+ if [ -z "${ROOTFSTYPE}" ] || [ "${ROOTFSTYPE}" = auto ]; then
-+ FSTYPE=$(get_fstype "${ROOT}")
-+ else
-+ FSTYPE=${ROOTFSTYPE}
-+ fi
++ # Get the root filesystem type if not set
++ if [ -z "${ROOTFSTYPE}" ] || [ "${ROOTFSTYPE}" = auto ]; then
++ FSTYPE=$(get_fstype "${ROOT}")
++ else
++ FSTYPE=${ROOTFSTYPE}
++ fi

- local_premount
-+ local_premount
++ local_premount

- if [ "${readonly?}" = "y" ]; then
- roflag=-r
- else
- roflag=-w
- fi
-+ if [ "${readonly?}" = "y" ]; then
-+ roflag=-r
-+ else
-+ roflag=-w
-+ fi
-+ checkfs "${ROOT}" root "${FSTYPE}"
++ if [ "${readonly?}" = "y" ]; then
++ roflag=-r
++ else
++ roflag=-w
++ fi
++ checkfs "${ROOT}" root "${FSTYPE}"

- checkfs "${ROOT}" root "${FSTYPE}"
-+ # Mount root
-+ # shellcheck disable=SC2086
-+ if mount ${roflag} ${FSTYPE:+-t "${FSTYPE}"} ${ROOTFLAGS} "${ROOT}" "${rootmnt?}"; then
-+ if [ -e "${rootmnt?}"/etc/os-release ]; then
-+ image_uuid=$(sed -n 's/^IMAGE_UUID=//p' "${rootmnt?}"/etc/os-release | tr -d '"' )
-+ if [ "${INITRAMFS_IMAGE_UUID}" = "${image_uuid}" ]; then
-+ return
-+ fi
-+ fi
-+ umount "${rootmnt?}"
++ # Mount root
++ # shellcheck disable=SC2086
++ if mount ${roflag} ${FSTYPE:+-t "${FSTYPE}"} ${ROOTFLAGS} "${ROOT}" "${rootmnt?}"; then
++ if [ -e "${rootmnt?}"/etc/os-release ]; then
++ image_uuid=$(sed -n 's/^IMAGE_UUID=//p' "${rootmnt?}"/etc/os-release | tr -d '"' )
++ if [ "${INITRAMFS_IMAGE_UUID}" = "${image_uuid}" ]; then
++ return 0
++ fi
+ fi
++ umount "${rootmnt?}"
+ fi
++ fi
+ done
-+ panic "Could not find ROOTFS with matching UUID $INITRAMFS_IMAGE_UUID"
++ return 1
++}

- # Mount root
- # shellcheck disable=SC2086
- if ! mount ${roflag} ${FSTYPE:+-t "${FSTYPE}"} ${ROOTFLAGS} "${ROOT}" "${rootmnt?}"; then
- panic "Failed to mount ${ROOT} as root file system."
-- fi
++local_mount_root()
++{
++ local_top
++ if [ ! -e /conf/image_uuid ]; then
++ panic "could not find image_uuid to select correct root file system"
++ fi
++ local INITRAMFS_IMAGE_UUID=$(cat /conf/image_uuid)
++ local partitions=""
++ local ret=1
++ local timeout_uuid=0
++ while [ "${ret}" != 0 ] && [ "${timeout_uuid}" -le 10 ]; do
++ wait_for_udev 10
++ partitions=$(blkid -o device)
++ local_find_by_uuid "$partitions"
++ ret=$?
++ timeout_uuid="$(cat /proc/uptime)"
++ timeout_uuid="${timeout_uuid%%[. ]*}"
++ timeout_uuid=$((timeout_uuid - local_top_time))
++ done
++ if [ "${ret}" != 0 ]; then
++ panic "Could not find ROOTFS with matching UUID $INITRAMFS_IMAGE_UUID"
++ else
++ return $ret
+ fi
}

- local_mount_fs()
--
2.20.1


[isar-cip-core][PATCH v2 1/2] start-qemu.sh: Change OVMF binary names

Quirin Gylstorff
 

From: Vijai Kumar K <Vijaikumar_Kanagarajan@mentor.com>

Upstream changed the names of the OVMF binaries as
```
The existing 2MB images no longer have sufficient variable space for the
current Secure Boot Forbidden Signature Database.
```

Reference:
https://salsa.debian.org/qemu-team/edk2/-/commit/72d8cee9648dd79852ea976e6a8eac0727c27b7f
https://salsa.debian.org/qemu-team/edk2/-/commit/27f786b5fdd126b09c4e732429cc8a30191b72e6

Signed-off-by: Vijai Kumar K <Vijaikumar_Kanagarajan@mentor.com>
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
doc/README.secureboot.md | 12 ++++++------
start-qemu.sh | 4 ++--
2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/doc/README.secureboot.md b/doc/README.secureboot.md
index d79248b..4c4ab41 100644
--- a/doc/README.secureboot.md
+++ b/doc/README.secureboot.md
@@ -78,8 +78,8 @@ Set up a secure boot test environment with [QEMU](https://www.qemu.org/)

### Debian Snakeoil keys

-The build copies the Debian Snakeoil keys to the directory `./build/tmp/deploy/images/<machine>/OVMF. Y
-u can use them as described in section [Start Image](### Start the image).
+The build copies the Debian Snakeoil keys to the directory `./build/tmp/deploy/images/<machine>/OVMF.
+You can use them as described in section [Start Image](### Start the image).

### Generate Keys

@@ -112,8 +112,8 @@ mkdir secureboot-tools
cp -r keys secureboot-tools
cp /lib/efitools/x86_64-linux-gnu/KeyTool.efi secureboot-tools
```
-2. Copy the file OVMF_VARS.fd (in Debian the file can be found at /usr/share/OVMF/OVMF_VARS.fd)
-to the current directory. OVMF_VARS.fd contains no keys can be instrumented for secureboot.
+2. Copy the file OVMF_VARS_4M.fd (in Debian the file can be found at /usr/share/OVMF/OVMF_VARS_4M.fd)
+to the current directory. OVMF_VARS_4M.fd contains no keys can be instrumented for secureboot.
3. Start QEMU with the script scripts/start-efishell.sh
```
scripts/start-efishell.sh secureboot-tools
@@ -172,7 +172,7 @@ SECURE_BOOT=y \
./start-qemu.sh amd64
```

-The default `OVMF_VARS.snakeoil.fd` boot to the EFI shell. To boot Linux enter the following command:
+The default `OVMF_VARS.snakeoil_4M.fd` boot to the EFI shell. To boot Linux enter the following command:
```
FS0:\EFI\BOOT\bootx64.efi
```
@@ -182,7 +182,7 @@ To change the boot behavior, enter `exit` in the shell to enter the bios and cha
Start the image with the following command:
```
SECURE_BOOT=y \
-OVMF_CODE=./build/tmp/deploy/images/qemu-amd64/OVMF/OVMF_CODE.secboot.fd \
+OVMF_CODE=./build/tmp/deploy/images/qemu-amd64/OVMF/OVMF_CODE_4M.secboot.fd \
OVMF_VARS=<path to the modified OVMF_VARS.fd> \
./start-qemu.sh amd64
```
diff --git a/start-qemu.sh b/start-qemu.sh
index e53cd99..6592ac6 100755
--- a/start-qemu.sh
+++ b/start-qemu.sh
@@ -94,8 +94,8 @@ fi
shift 1

if [ -n "${SECURE_BOOT}" ]; then
- ovmf_code=${OVMF_CODE:-./build/tmp/deploy/images/qemu-amd64/OVMF/OVMF_CODE.secboot.fd}
- ovmf_vars=${OVMF_VARS:-./build/tmp/deploy/images/qemu-amd64/OVMF/OVMF_VARS.snakeoil.fd}
+ ovmf_code=${OVMF_CODE:-./build/tmp/deploy/images/qemu-amd64/OVMF/OVMF_CODE_4M.secboot.fd}
+ ovmf_vars=${OVMF_VARS:-./build/tmp/deploy/images/qemu-amd64/OVMF/OVMF_VARS_4M.snakeoil.fd}
QEMU_EXTRA_ARGS=" ${QEMU_EXTRA_ARGS} \
-global ICH9-LPC.disable_s3=1 \
-global isa-fdc.driveA= "
--
2.20.1


[isar-cip-core][PATCH v2 0/2] Secureboot fixes

Quirin Gylstorff
 

From: Quirin Gylstorff <quirin.gylstorff@siemens.com>

Adapt OVMF binaries to new upstream names.
Repeat scan for rootfs until udev finished populating /dev or a timeout occurs.
Build at:
https://gitlab.com/Quirin.Gy/isar-cip-core/-/pipelines/223158898

--
Changes Version 2:
- fix author and commit message

Vijai Kumar K (2):
start-qemu.sh: Change OVMF binary names
Secureboot: Wait until udev populates /dev

doc/README.secureboot.md | 12 +-
.../files/secure-boot-debian-local-patch | 104 +++++++++++-------
start-qemu.sh | 4 +-
3 files changed, 72 insertions(+), 48 deletions(-)

--
2.20.1


[PATCH 4.4.y-cip 11/11] ARM: dts: r8a77470: Add device node for PRR

Lad Prabhakar
 

Add a device node for the Product Register, which provides SoC product
and revision information.

Changes are already present in upstream but the PRR node is part of
initial SoC DTSI and cannot be individually backported hence this
new commit.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a77470.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 1057bff76cc8..3bf1a458593b 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -715,6 +715,11 @@
power-domains = <&cpg_clocks>;
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a77470",
"renesas,cmt-48-gen2";
--
2.17.1


[PATCH 4.4.y-cip 10/11] soc: renesas: Identify RZ/G1C

Lad Prabhakar
 

From: Biju Das <biju.das@bp.renesas.com>

commit 1daf13ba10378cad9ea4f5f26b83dd36c36dcdc0 upstream.

Add support for identifying the RZ/G1C (r8a77470) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[PL: manually applied the changes, replaced fam_rzg1 to fam_rzg,
enabled SOC_BUS config for RZ/G1C]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/mach-shmobile/Kconfig | 1 +
drivers/soc/renesas/renesas-soc.c | 8 ++++++++
2 files changed, 9 insertions(+)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 6812b3e19ba3..017d03d3e4e5 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -89,6 +89,7 @@ config ARCH_R8A7745
config ARCH_R8A77470
bool "RZ/G1C (R8A77470)"
select ARCH_RCAR_GEN2
+ select SOC_BUS

config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index eaa540bfc9bd..a267c7637003 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -55,6 +55,11 @@ static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
.id = 0x4c,
};

+static const struct renesas_soc soc_rz_g1c __initconst __maybe_unused = {
+ .family = &fam_rzg,
+ .id = 0x53,
+};
+
static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R8A7742
{ .compatible = "renesas,r8a7742", .data = &soc_rz_g1h },
@@ -67,6 +72,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
#endif
#ifdef CONFIG_ARCH_R8A7745
{ .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
+#endif
+#ifdef CONFIG_ARCH_R8A77470
+ { .compatible = "renesas,r8a77470", .data = &soc_rz_g1c },
#endif
{ /* sentinel */ }
};
--
2.17.1


[PATCH 4.4.y-cip 09/11] ARM: dts: r8a7742: Add device node for PRR

Lad Prabhakar
 

Add a device node for the Product Register, which provides SoC product
and revision information.

Changes are already present in upstream but the PRR node is part of
initial SoC DTSI and cannot be individually backported hence this
new commit.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 0da46a2edddd..2ad6f965ccbd 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -1927,6 +1927,11 @@
renesas,#wpf = <4>;
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a7742",
"renesas,cmt-48-gen2";
--
2.17.1


[PATCH 4.4.y-cip 08/11] soc: renesas: Identify RZ/G1H

Lad Prabhakar
 

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 8848e1b14231a40ed66229fb3ee98519b32f2ae7 upstream.

Add support for identifying the RZ/G1H (r8a7742) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[PL: manually applied the changes, enabled SOC_BUS config for RZ/G1N]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/mach-shmobile/Kconfig | 1 +
drivers/soc/renesas/renesas-soc.c | 8 ++++++++
2 files changed, 9 insertions(+)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 8b84eb630dee..6812b3e19ba3 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -68,6 +68,7 @@ config ARCH_R8A7742
bool "RZ/G1H (R8A77420)"
select ARCH_RCAR_GEN2
select ARM_ERRATA_798181 if SMP
+ select SOC_BUS

config ARCH_R8A7743
bool "RZ/G1M (R8A77430)"
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 2cf62855cc45..eaa540bfc9bd 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -35,6 +35,11 @@ struct renesas_soc {
u8 id;
};

+static const struct renesas_soc soc_rz_g1h __initconst __maybe_unused = {
+ .family = &fam_rzg,
+ .id = 0x45,
+};
+
static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
.family = &fam_rzg,
.id = 0x47,
@@ -51,6 +56,9 @@ static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
};

static const struct of_device_id renesas_socs[] __initconst = {
+#ifdef CONFIG_ARCH_R8A7742
+ { .compatible = "renesas,r8a7742", .data = &soc_rz_g1h },
+#endif
#ifdef CONFIG_ARCH_R8A7743
{ .compatible = "renesas,r8a7743", .data = &soc_rz_g1m },
#endif
--
2.17.1


[PATCH 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR

Lad Prabhakar
 

Add a device node for the Product Register, which provides SoC product
and revision information.

Changes are already present in upstream but the PRR node is part of
initial SoC DTSI and cannot be individually backported hence this
new commit.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a7744.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 079f46f17049..312c9aae8a10 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1526,6 +1526,11 @@
};
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a7744",
"renesas,cmt-48-gen2";
--
2.17.1


[PATCH 4.4.y-cip 06/11] soc: renesas: Identify RZ/G1N

Lad Prabhakar
 

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit cd59de80dd34dd2d1a3ca97d7a6e712c048b135a upstream.

Add support for identifying the RZ/G1N (r8a7744) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[PL: Enabled SOC_BUS config for RZ/G1N]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/mach-shmobile/Kconfig | 1 +
drivers/soc/renesas/renesas-soc.c | 8 ++++++++
2 files changed, 9 insertions(+)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 3f1e27b76d59..8b84eb630dee 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -78,6 +78,7 @@ config ARCH_R8A7744
bool "RZ/G1N (R8A77440)"
select ARCH_RCAR_GEN2
select ARM_ERRATA_798181 if SMP
+ select SOC_BUS

config ARCH_R8A7745
bool "RZ/G1E (R8A77450)"
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index e36b51a52dfc..2cf62855cc45 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -40,6 +40,11 @@ static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
.id = 0x47,
};

+static const struct renesas_soc soc_rz_g1n __initconst __maybe_unused = {
+ .family = &fam_rzg,
+ .id = 0x4b,
+};
+
static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
.family = &fam_rzg,
.id = 0x4c,
@@ -49,6 +54,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R8A7743
{ .compatible = "renesas,r8a7743", .data = &soc_rz_g1m },
#endif
+#ifdef CONFIG_ARCH_R8A7744
+ { .compatible = "renesas,r8a7744", .data = &soc_rz_g1n },
+#endif
#ifdef CONFIG_ARCH_R8A7745
{ .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
#endif
--
2.17.1


[PATCH 4.4.y-cip 05/11] ARM: dts: r8a7745: Add device node for PRR

Lad Prabhakar
 

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 8916c7b58319fa27eae25c0c9b9a4cd68b9b30bd upstream.

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[PL: sorted the node as per address]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a7745.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 5f603d9eafea..58bf2e52523e 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1356,6 +1356,11 @@
};
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a7745",
"renesas,cmt-48-gen2";
--
2.17.1


[PATCH 4.4.y-cip 04/11] ARM: dts: r8a7743: Add device node for PRR

Lad Prabhakar
 

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 11d4407e939e74e89a29df88b1557b59ece9e9f9 upstream.

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[PL: sorted the node]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a7743.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index aff5ebbdb4bd..73b8f7f341f4 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1781,6 +1781,11 @@
status = "disabled";
};

+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a7743",
"renesas,cmt-48-gen2";
--
2.17.1

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