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Re: New CVE entries in this week
Masami Ichikawa
Hi !
On Thu, Dec 16, 2021 at 2:27 PM Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...> wrote: Thank you. LGTM ! Best regards,Regards, -- Masami Ichikawa Cybertrust Japan Co., Ltd. Email :masami.ichikawa@... :masami.ichikawa@...
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Re: New CVE entries in this week
Nobuhiro Iwamatsu
Hi,
CVE-2021-39648: usb: gadget: configfs: Fix use-after-free issue with udc_nameI created a patch which revise this issue. I attached this mail. Best regards, Nobuhiro ________________________________________ 差出人: cip-dev@... <cip-dev@...> が Masami Ichikawa <masami.ichikawa@...> の代理で送信 送信日時: 2021年12月16日 8:49 宛先: cip-dev 件名: [cip-dev] New CVE entries in this week Hi ! It's this week's CVE report. This week reported ten new CVEs and two of them aren't fixed in the mainline yet. * New CVEs CVE-2021-0961: In quota_proc_write of xt_quota2.c, there is a possible way to read kernel memory due to uninitialized data CVSS v3 score is not provided This bug is fixed in Android kernel. There is three commits to fix this bug. https://android.googlesource.com/kernel/common/+/e113eb454e92 https://android.googlesource.com/kernel/common/+/60a4c35570d9 https://android.googlesource.com/kernel/common/+/4b05a506bda0 These commit modified net/netfilter/xt_quota2.c which is Android specific source. So this CVE is Android specific bug. The mainline and stable kernels aren't affected. Fixed status The mainline and stable kernels aren't affected. CVE-2021-39648: usb: gadget: configfs: Fix use-after-free issue with udc_name CVSS v3 score is not provided 4.4 kernel gadget_dev_desc_UDC_show() is bit different from later kernel versions. However, it looks 4.4 also has same issue. Fixed status mainline: [64e6bbfff52db4bf6785fab9cffab850b2de6870] stable/4.14: [6766064c794afeacc29b21fc09ea4dbe3cae1af3] stable/4.19: [83b74059fdf1c4fa6ed261725e6f301552ad23f7] stable/4.9: [225330e682fa9aaa152287b49dea1ce50fbe0a92] stable/5.10: [a4b202cba3ab1a7a8b1ca92603931fba5e2032c3] stable/5.4: [bcffe2de9dde74174805d5f56a990353e33b8072] CVE-2021-39656: configfs: fix a use-after-free in __configfs_open_file Bug introduced commit b0841ee was merged in 5.3-rc8. This commit isn't backported to 4.4 so 4.4 isn't affected. Fixed status mainline: [14fbbc8297728e880070f7b077b3301a8c698ef9] stable/4.14: [4769013f841ed35bdce3b11b64349d0c166ee0a2] stable/4.19: [9123463620132ada85caf5dc664b168f480b0cc4] stable/4.9: [6f5c47f0faed69f2e78e733fb18261854979e79f] stable/5.10: [109720342efd6ace3d2e8f34a25ea65036bb1d3b] stable/5.4: [73aa6f93e1e980f392b3da4fee830b0e0a4a40ff] CVE-2021-39657: scsi: ufs: Correct the LUN used in eh_device_reset_handler() callback CVSS v3 score is not provided Bug was fixed in 5.11-rc4. so mainline and stable kernels are already fixed. Fixed status mainline: [35fc4cd34426c242ab015ef280853b7bff101f48] stable/4.14: [30f2a89f9481f851bc68e51a1e7114392b052231] stable/4.19: [b397fcae2207963747c6f947ef4d06575553eaef] stable/4.4: [a4cdbf4805bfed8f39e6b25f113588064d9a6ac5] stable/4.9: [7bbac19e604b2443c93f01c3259734d53f776dbf] stable/5.10: [2536194bb3b099cc9a9037009b86e7ccfb81461c] stable/5.4: [97853a7eae80a695a18ce432524eaa7432199a41] CVE-2021-4090: kernel: Overflow of bmval[bmlen-1] in nfsd4_decode_bitmap function CVSS v3 score is not provided OOB write bug in nsfd. This bug was introduced by commit d1c263a ("NFSD: Replace READ* macros in nfsd4_decode_fattr() ") since 5.11-rc1 and fixed in 5.16-rc2. Before 5.11 kernels aren't affected this issue. Fixed status mainline: [c0019b7db1d7ac62c711cda6b357a659d46428fe] stable/5.15: [10c22d9519f3f5939de61a1500aa3a926b778d3a] CVE-2021-4093: KVM: SVM: out-of-bounds read/write in sev_es_string_io CVSS v3 score is not provided OOB read/write bug in AMD SVM mode. This bug was introduced by commit 7ed9abf ("KVM: SVM: Support string IO operations for an SEV-ES guest") which is merged since 5.11-rc1. Before 5.11 kernels aren't affected this issue. Fixed status mainline: [95e16b4792b0429f1933872f743410f00e590c55] CVE-2021-4095: KVM: NULL pointer dereference in kvm_dirty_ring_get() in virt/kvm/dirty_ring.c CVSS v3 score is not provided This issues was introduced by commit 629b534 ("KVM: x86/xen: update wallclock region") which is merged in 5.12-rc1-dontuse. Before 5.12-rc1-dontuse kernels aren't affectd this issue. Patch is being reviewed. Fixed status Not fixed yet. CVE-2021-3864: descendant's dumpable setting with certain SUID binaries CVSS v3 score is not provided This bug is able to write coredump file anyware. However, abusing this bug, such as arbitrary code execution is required some program. The PoC(https://www.openwall.com/lists/oss-security/2021/10/20/2). There is two mitigation techniques are suggested. So, users follow these mitigation technique is recommended. Fixed status Not fixed yet. CVE-2021-4083: fget: check that the fd still exists after getting a ref to it CVSS v3 score is not provided UAF bug in fs/file.c it causes system crash, priviledge escalation. The mainline and all stable kernels are aready fixed. Fixed status mainline: [054aa8d439b9185d4f5eb9a90282d1ce74772969] stable/4.14: [98548c3a9882a1ea993a103be7c1b499f3b88202] stable/4.19: [8bf31f9d9395b71af3ed33166a057cd3ec0c59da] stable/4.4: [8afa4ef999191477506b396fae518338b8996fec] stable/4.9: [a043f5a600052dc93bc3d7a6a2c1592b6ee77482] stable/5.10: [4baba6ba56eb91a735a027f783cc4b9276b48d5b] stable/5.15: [6fe4eadd54da3040cf6f6579ae157ae1395dc0f8] stable/5.4: [03d4462ba3bc8f830d9807e3c3fde54fad06e2e2] CVE-2021-39685: Linux Kernel USB Gadget buffer overflow CVSS v3 score is not provided Buffer overflow bug in USB gadget devices. An attacker can read and/or write up to 65k of kernel memory. It already fixed in mainline and all stable kernels. Fixed status mainline: [153a2d7e3350cc89d406ba2d35be8793a64c2038, 86ebbc11bb3f60908a51f3e41a17e3f477c2eaa3] stable/4.14: [e7c8afee149134b438df153b09af7fd928a8bc24, d8cd524ae4ec788011a14be17503fc224f260fe3] stable/4.19: [13e45e7a262dd96e8161823314679543048709b9, 32de5efd483db68f12233fbf63743a2d92f20ae4] stable/4.4: [93cd7100fe471c5f76fb942358de4ed70dbcaf35, af21211c327c4703c7681fa7286c4d660682e413] stable/4.9: [d2ca6859ea96c6d4c6ad3d6873a308a004882419, e4de8ca013f06ad4a0bf40420a291c23990e4131] stable/5.10: [7193ad3e50e596ac2192531c58ba83b9e6d2444b, e4de8ca013f06ad4a0bf40420a291c23990e4131] stable/5.15: [36dfdf11af49d3c009c711fb16f5c6e7a274505d, 6eea4ace62fa6414432692ee44f0c0a3d541d97a] stable/5.4: [fd6de5a0cd42fc43810bd74ad129d98ab962ec6b, 9978777c5409d6c856cac1adf5930e3c84f057be] * Updated CVEs no updated CVEs. Currently tracking CVEs CVE-2021-31615: Unencrypted Bluetooth Low Energy baseband links in Bluetooth Core Specifications 4.0 through 5.2 There is no fix information. CVE-2020-26555: BR/EDR pin code pairing broken No fix information CVE-2020-26556: kernel: malleable commitment Bluetooth Mesh Provisioning No fix information. CVE-2020-26557: kernel: predictable Authvalue in Bluetooth Mesh Provisioning Leads to MITM No fix information. CVE-2020-26559: kernel: Authvalue leak in Bluetooth Mesh Provisioning No fix information. CVE-2020-26560: kernel: impersonation attack in Bluetooth Mesh Provisioning No fix information. Regards, -- Masami Ichikawa Cybertrust Japan Co., Ltd. Email :masami.ichikawa@... :masami.ichikawa@...
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Nobuhiro Iwamatsu
Hi!
Hi All, LGTM. I can merge this seriese, If there is no objection. Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...> Best regards, Nobuhiro ________________________________________ 差出人: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> 送信日時: 2021年12月15日 9:46 宛先: cip-dev@...; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ); Pavel Machek CC: Biju Das; Lad Prabhakar 件名: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK Hi All, This patch series adds initial support for Renesas RZ/G2L SoC [0] and Renesas RZ/G2L SMARC EVK [1]. The RZ/G2L microprocessor includes a Cortex-A55 (1.2 GHz) CPU, 16-bit DDR3L/DDR4 interface, 3D graphics engine with Arm Mali-G31 and video codec (H.264). It also has many interfaces such as camera input, display output, USB 2.0, and Gbit-Ether, making it ideal for applications such as entry-class industrial human-machine interfaces (HMIs) and embedded devices with video capabilities. Patches add support for the following: * Documentation for RZ/G2{L,LC,UL} SoC variants * Documentation for Renesas SMARC EVK * SYSC binding doc required for SoC identification * SoC identification support * Enabling ARCH_R9A07G044 in defconfig All the patches have been cherry picked from v5.16-rc5 [0] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual- core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec [1] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ rz-arm-based-high-end-32-64-bit-mpus/rtk9744l23s01000be-rzg2l-evaluation-board-kit Cheers, Prabhakar Lad Prabhakar (7): dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants dt-bindings: arm: renesas: Document SMARC EVK dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's arm64: defconfig: Enable ARCH_R9A07G044 .../devicetree/bindings/arm/renesas.yaml | 18 ++++++ .../bindings/power/renesas,rzg2l-sysc.yaml | 63 +++++++++++++++++++ arch/arm64/configs/defconfig | 1 + drivers/soc/renesas/Kconfig | 5 ++ drivers/soc/renesas/renesas-soc.c | 33 +++++++++- 5 files changed, 119 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml -- 2.17.1
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Nobuhiro Iwamatsu
Hi all,
I think I need to add the board to LAB first. Of course, source code reviews andI have reviewed patches and they look okay to me. I'll proceed withWe don't have any boards in the CIP labs yet, but there is a plan to add some. build tests are possible. And If my understand is correctoly, I think this is a new board that is not on the reference board list. I don't think this has been discussed at TSC. I think it needs to be on the agenda at TSC, whether it's a reference board for the 5.10-cip kernel. Best regards, Nobuhiro Best regards, Nobuhiro ________________________________________ 差出人: Chris Paterson <Chris.Paterson2@...> 送信日時: 2021年12月15日 19:34 宛先: cip-dev@...; Prabhakar Mahadev Lad CC: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ); Pavel Machek; Biju Das 件名: RE: [cip-dev] [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK Hello Pavel, From: cip-dev@... <cip-dev@...> OnWe don't have any boards in the CIP labs yet, but there is a plan to add some. Kind regards, Chris
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New CVE entries in this week
Masami Ichikawa
Hi !
It's this week's CVE report. This week reported ten new CVEs and two of them aren't fixed in the mainline yet. * New CVEs CVE-2021-0961: In quota_proc_write of xt_quota2.c, there is a possible way to read kernel memory due to uninitialized data CVSS v3 score is not provided This bug is fixed in Android kernel. There is three commits to fix this bug. https://android.googlesource.com/kernel/common/+/e113eb454e92 https://android.googlesource.com/kernel/common/+/60a4c35570d9 https://android.googlesource.com/kernel/common/+/4b05a506bda0 These commit modified net/netfilter/xt_quota2.c which is Android specific source. So this CVE is Android specific bug. The mainline and stable kernels aren't affected. Fixed status The mainline and stable kernels aren't affected. CVE-2021-39648: usb: gadget: configfs: Fix use-after-free issue with udc_name CVSS v3 score is not provided 4.4 kernel gadget_dev_desc_UDC_show() is bit different from later kernel versions. However, it looks 4.4 also has same issue. Fixed status mainline: [64e6bbfff52db4bf6785fab9cffab850b2de6870] stable/4.14: [6766064c794afeacc29b21fc09ea4dbe3cae1af3] stable/4.19: [83b74059fdf1c4fa6ed261725e6f301552ad23f7] stable/4.9: [225330e682fa9aaa152287b49dea1ce50fbe0a92] stable/5.10: [a4b202cba3ab1a7a8b1ca92603931fba5e2032c3] stable/5.4: [bcffe2de9dde74174805d5f56a990353e33b8072] CVE-2021-39656: configfs: fix a use-after-free in __configfs_open_file Bug introduced commit b0841ee was merged in 5.3-rc8. This commit isn't backported to 4.4 so 4.4 isn't affected. Fixed status mainline: [14fbbc8297728e880070f7b077b3301a8c698ef9] stable/4.14: [4769013f841ed35bdce3b11b64349d0c166ee0a2] stable/4.19: [9123463620132ada85caf5dc664b168f480b0cc4] stable/4.9: [6f5c47f0faed69f2e78e733fb18261854979e79f] stable/5.10: [109720342efd6ace3d2e8f34a25ea65036bb1d3b] stable/5.4: [73aa6f93e1e980f392b3da4fee830b0e0a4a40ff] CVE-2021-39657: scsi: ufs: Correct the LUN used in eh_device_reset_handler() callback CVSS v3 score is not provided Bug was fixed in 5.11-rc4. so mainline and stable kernels are already fixed. Fixed status mainline: [35fc4cd34426c242ab015ef280853b7bff101f48] stable/4.14: [30f2a89f9481f851bc68e51a1e7114392b052231] stable/4.19: [b397fcae2207963747c6f947ef4d06575553eaef] stable/4.4: [a4cdbf4805bfed8f39e6b25f113588064d9a6ac5] stable/4.9: [7bbac19e604b2443c93f01c3259734d53f776dbf] stable/5.10: [2536194bb3b099cc9a9037009b86e7ccfb81461c] stable/5.4: [97853a7eae80a695a18ce432524eaa7432199a41] CVE-2021-4090: kernel: Overflow of bmval[bmlen-1] in nfsd4_decode_bitmap function CVSS v3 score is not provided OOB write bug in nsfd. This bug was introduced by commit d1c263a ("NFSD: Replace READ* macros in nfsd4_decode_fattr() ") since 5.11-rc1 and fixed in 5.16-rc2. Before 5.11 kernels aren't affected this issue. Fixed status mainline: [c0019b7db1d7ac62c711cda6b357a659d46428fe] stable/5.15: [10c22d9519f3f5939de61a1500aa3a926b778d3a] CVE-2021-4093: KVM: SVM: out-of-bounds read/write in sev_es_string_io CVSS v3 score is not provided OOB read/write bug in AMD SVM mode. This bug was introduced by commit 7ed9abf ("KVM: SVM: Support string IO operations for an SEV-ES guest") which is merged since 5.11-rc1. Before 5.11 kernels aren't affected this issue. Fixed status mainline: [95e16b4792b0429f1933872f743410f00e590c55] CVE-2021-4095: KVM: NULL pointer dereference in kvm_dirty_ring_get() in virt/kvm/dirty_ring.c CVSS v3 score is not provided This issues was introduced by commit 629b534 ("KVM: x86/xen: update wallclock region") which is merged in 5.12-rc1-dontuse. Before 5.12-rc1-dontuse kernels aren't affectd this issue. Patch is being reviewed. Fixed status Not fixed yet. CVE-2021-3864: descendant's dumpable setting with certain SUID binaries CVSS v3 score is not provided This bug is able to write coredump file anyware. However, abusing this bug, such as arbitrary code execution is required some program. The PoC(https://www.openwall.com/lists/oss-security/2021/10/20/2). There is two mitigation techniques are suggested. So, users follow these mitigation technique is recommended. Fixed status Not fixed yet. CVE-2021-4083: fget: check that the fd still exists after getting a ref to it CVSS v3 score is not provided UAF bug in fs/file.c it causes system crash, priviledge escalation. The mainline and all stable kernels are aready fixed. Fixed status mainline: [054aa8d439b9185d4f5eb9a90282d1ce74772969] stable/4.14: [98548c3a9882a1ea993a103be7c1b499f3b88202] stable/4.19: [8bf31f9d9395b71af3ed33166a057cd3ec0c59da] stable/4.4: [8afa4ef999191477506b396fae518338b8996fec] stable/4.9: [a043f5a600052dc93bc3d7a6a2c1592b6ee77482] stable/5.10: [4baba6ba56eb91a735a027f783cc4b9276b48d5b] stable/5.15: [6fe4eadd54da3040cf6f6579ae157ae1395dc0f8] stable/5.4: [03d4462ba3bc8f830d9807e3c3fde54fad06e2e2] CVE-2021-39685: Linux Kernel USB Gadget buffer overflow CVSS v3 score is not provided Buffer overflow bug in USB gadget devices. An attacker can read and/or write up to 65k of kernel memory. It already fixed in mainline and all stable kernels. Fixed status mainline: [153a2d7e3350cc89d406ba2d35be8793a64c2038, 86ebbc11bb3f60908a51f3e41a17e3f477c2eaa3] stable/4.14: [e7c8afee149134b438df153b09af7fd928a8bc24, d8cd524ae4ec788011a14be17503fc224f260fe3] stable/4.19: [13e45e7a262dd96e8161823314679543048709b9, 32de5efd483db68f12233fbf63743a2d92f20ae4] stable/4.4: [93cd7100fe471c5f76fb942358de4ed70dbcaf35, af21211c327c4703c7681fa7286c4d660682e413] stable/4.9: [d2ca6859ea96c6d4c6ad3d6873a308a004882419, e4de8ca013f06ad4a0bf40420a291c23990e4131] stable/5.10: [7193ad3e50e596ac2192531c58ba83b9e6d2444b, e4de8ca013f06ad4a0bf40420a291c23990e4131] stable/5.15: [36dfdf11af49d3c009c711fb16f5c6e7a274505d, 6eea4ace62fa6414432692ee44f0c0a3d541d97a] stable/5.4: [fd6de5a0cd42fc43810bd74ad129d98ab962ec6b, 9978777c5409d6c856cac1adf5930e3c84f057be] * Updated CVEs no updated CVEs. Currently tracking CVEs CVE-2021-31615: Unencrypted Bluetooth Low Energy baseband links in Bluetooth Core Specifications 4.0 through 5.2 There is no fix information. CVE-2020-26555: BR/EDR pin code pairing broken No fix information CVE-2020-26556: kernel: malleable commitment Bluetooth Mesh Provisioning No fix information. CVE-2020-26557: kernel: predictable Authvalue in Bluetooth Mesh Provisioning Leads to MITM No fix information. CVE-2020-26559: kernel: Authvalue leak in Bluetooth Mesh Provisioning No fix information. CVE-2020-26560: kernel: impersonation attack in Bluetooth Mesh Provisioning No fix information. Regards, -- Masami Ichikawa Cybertrust Japan Co., Ltd. Email :masami.ichikawa@... :masami.ichikawa@...
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Chris Paterson
Hello Pavel,
From: cip-dev@... <cip-dev@...> OnWe don't have any boards in the CIP labs yet, but there is a plan to add some. Kind regards, Chris
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Lad Prabhakar
Hi Pavel,
toggle quoted messageShow quoted text
-----Original Message-----Thank you for the review. For testing purpose I have created an MR for the configs [0]. Do we have suitable board in the test lab / is there plan to add one?I'll let Chris answer this. Best regards,[0] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/-/merge_requests/52 Cheers, Prabhakar
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Re: [PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Pavel Machek
Hi!
This patch series adds initial support for Renesas RZ/G2L SoC [0] andI have reviewed patches and they look okay to me. I'll proceed with testing. Do we have suitable board in the test lab / is there plan to add one? Best regards, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[PATCH 5.10.y-cip 7/7] arm64: defconfig: Enable ARCH_R9A07G044
Lad Prabhakar
commit 27a79a723d48dbeccb4fe6f7ede47e67642e6a4a upstream.
Enable the Renesas RZ/G2L SoC variants in the ARM64 defconfig. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20210609153230.6967-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> [PL: manually applied the change] Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5cfe3cf6f2ac..e022d807c6d8 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -954,6 +954,7 @@ CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A77980=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77995=y +CONFIG_ARCH_R9A07G044=y CONFIG_ROCKCHIP_PM_DOMAINS=y CONFIG_ARCH_TEGRA_132_SOC=y CONFIG_ARCH_TEGRA_210_SOC=y -- 2.17.1
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[PATCH 5.10.y-cip 6/7] soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
Lad Prabhakar
commit 187cd57db09355fd169c661fa1c44bda06b013e8 upstream.
Add support for reading the LSI DEVID register which is present in SYSC block of RZ/G2{L,LC} SoC's. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- drivers/soc/renesas/renesas-soc.c | 33 ++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c index 0f8eff4a641a..8310fce7714e 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -56,6 +56,10 @@ static const struct renesas_family fam_rzg2 __initconst __maybe_unused = { .reg = 0xfff00044, /* PRR (Product Register) */ }; +static const struct renesas_family fam_rzg2l __initconst __maybe_unused = { + .name = "RZ/G2L", +}; + static const struct renesas_family fam_shmobile __initconst __maybe_unused = { .name = "SH-Mobile", .reg = 0xe600101c, /* CCCR (Common Chip Code Register) */ @@ -64,7 +68,7 @@ static const struct renesas_family fam_shmobile __initconst __maybe_unused = { struct renesas_soc { const struct renesas_family *family; - u8 id; + u32 id; }; static const struct renesas_soc soc_rz_a1h __initconst __maybe_unused = { @@ -131,6 +135,11 @@ static const struct renesas_soc soc_rz_g2h __initconst __maybe_unused = { .id = 0x4f, }; +static const struct renesas_soc soc_rz_g2l __initconst __maybe_unused = { + .family = &fam_rzg2l, + .id = 0x841c447, +}; + static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = { .family = &fam_rcar_gen1, }; @@ -299,6 +308,9 @@ static const struct of_device_id renesas_socs[] __initconst = { #ifdef CONFIG_ARCH_R8A779A0 { .compatible = "renesas,r8a779a0", .data = &soc_rcar_v3u }, #endif +#if defined(CONFIG_ARCH_R9A07G044) + { .compatible = "renesas,r9a07g044", .data = &soc_rz_g2l }, +#endif #ifdef CONFIG_ARCH_SH73A0 { .compatible = "renesas,sh73a0", .data = &soc_shmobile_ag5 }, #endif @@ -348,6 +360,25 @@ static int __init renesas_soc_init(void) goto done; } + np = of_find_compatible_node(NULL, NULL, "renesas,r9a07g044-sysc"); + if (np) { + chipid = of_iomap(np, 0); + of_node_put(np); + + if (chipid) { + product = readl(chipid + 0x0a04); + iounmap(chipid); + + if (soc->id && (product & 0xfffffff) != soc->id) { + pr_warn("SoC mismatch (product = 0x%x)\n", + product); + return -ENODEV; + } + } + + goto done; + } + /* Try PRR first, then hardcoded fallback */ np = of_find_compatible_node(NULL, NULL, "renesas,prr"); if (np) { -- 2.17.1
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[PATCH 5.10.y-cip 5/7] soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
Lad Prabhakar
commit f3b154529fb89e9feae18d5e9da40559172d8d19 upstream.
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas RZ/G2L SoC variants. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20210609153230.6967-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- drivers/soc/renesas/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index b70bbc38efc6..71b44c31b012 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -279,6 +279,11 @@ config ARCH_R8A774B1 help This enables support for the Renesas RZ/G2N SoC. +config ARCH_R9A07G044 + bool "ARM64 Platform support for RZ/G2L" + help + This enables support for the Renesas RZ/G2L SoC variants. + endif # ARM64 config RST_RCAR -- 2.17.1
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[PATCH 5.10.y-cip 4/7] dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller
Lad Prabhakar
commit 972f67be8929ac095df6a8bbce738b4f39e984cb upstream.
Add DT binding documentation for SYSC controller found on RZ/G2{L,LC,UL} SoC's. SYSC block contains the LSI_DEVID register which is used to retrieve SoC product information. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20210609163717.3083-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- .../bindings/power/renesas,rzg2l-sysc.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml diff --git a/Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml new file mode 100644 index 000000000000..84ddc772b003 --- /dev/null +++ b/Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/renesas,rzg2l-sysc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Renesas RZ/G2L System Controller (SYSC) + +maintainers: + - Geert Uytterhoeven <geert+renesas@...> + +description: + The RZ/G2L System Controller (SYSC) performs system control of the LSI and + supports following functions, + - External terminal state capture function + - 34-bit address space access function + - Low power consumption control + - WDT stop control + +properties: + compatible: + enum: + - renesas,r9a07g044-sysc # RZ/G2{L,LC} + + reg: + maxItems: 1 + + interrupts: + items: + - description: CA55/CM33 Sleep/Software Standby Mode request interrupt + - description: CA55 Software Standby Mode release request interrupt + - description: CM33 Software Standby Mode release request interrupt + - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt + + interrupt-names: + items: + - const: lpm_int + - const: ca55stbydone_int + - const: cm33stbyr_int + - const: ca55_deny + +required: + - compatible + - reg + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + sysc: system-controller@11020000 { + compatible = "renesas,r9a07g044-sysc"; + reg = <0x11020000 0x10000>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int", + "ca55_deny"; + }; -- 2.17.1
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[PATCH 5.10.y-cip 3/7] dt-bindings: arm: renesas: Document SMARC EVK
Lad Prabhakar
commit 4affc072e4fef6d1778f957037f255a6acdd44e2 upstream.
Document Renesas SMARC EVK board which are based on RZ/G2L (R9A07G044) SoC. The SMARC EVK consists of RZ/G2L SoM module and SMARC carrier board, the SoM module sits on top of carrier board. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Reviewed-by: Chris Paterson <Chris.Paterson2@...> Acked-by: Rob Herring <robh@...> Link: https://lore.kernel.org/r/20210609153230.6967-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- Documentation/devicetree/bindings/arm/renesas.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 2355c5f285a0..241703c2cac1 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -308,6 +308,8 @@ properties: - description: RZ/G2{L,LC} (R9A07G044) items: + - enum: + - renesas,smarc-evk # SMARC EVK - enum: - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC -- 2.17.1
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[PATCH 5.10.y-cip 2/7] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants
Lad Prabhakar
commit 2cd22416745fe1f0f6b6fa70c09438f85e20c693 upstream.
Add device tree bindings documentation for Renesas RZ/G2{L,LC} SoC variants. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Reviewed-by: Chris Paterson <Chris.Paterson2@...> Acked-by: Rob Herring <robh@...> Link: https://lore.kernel.org/r/20210609153230.6967-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- Documentation/devicetree/bindings/arm/renesas.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 0f8e38833de6..2355c5f285a0 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -306,6 +306,15 @@ properties: - renesas,r9a07g043u12 # RZ/G2UL Type-2 - const: renesas,r9a07g043 + - description: RZ/G2{L,LC} (R9A07G044) + items: + - enum: + - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC + - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC + - renesas,r9a07g044l1 # Single Cortex-A55 RZ/G2L + - renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L + - const: renesas,r9a07g044 + additionalProperties: true ... -- 2.17.1
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[PATCH 5.10.y-cip 1/7] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC
Lad Prabhakar
commit 305b80780879117b3448da42afe95af312393fbd upstream.
Add device tree bindings documentation for Renesas RZ/G2UL SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Das <biju.das.jz@...> Reviewed-by: Chris Paterson <Chris.Paterson2@...> Acked-by: Rob Herring <robh@...> Link: https://lore.kernel.org/r/20210609153230.6967-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> --- Documentation/devicetree/bindings/arm/renesas.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index ff94c45eefb0..0f8e38833de6 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -299,6 +299,13 @@ properties: - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - const: renesas,r9a06g032 + - description: RZ/G2UL (R9A07G043) + items: + - enum: + - renesas,r9a07g043u11 # RZ/G2UL Type-1 + - renesas,r9a07g043u12 # RZ/G2UL Type-2 + - const: renesas,r9a07g043 + additionalProperties: true ... -- 2.17.1
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[PATCH 5.10.y-cip 0/7] Add binding and SoC identification for Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK
Lad Prabhakar
Hi All,
This patch series adds initial support for Renesas RZ/G2L SoC [0] and Renesas RZ/G2L SMARC EVK [1]. The RZ/G2L microprocessor includes a Cortex-A55 (1.2 GHz) CPU, 16-bit DDR3L/DDR4 interface, 3D graphics engine with Arm Mali-G31 and video codec (H.264). It also has many interfaces such as camera input, display output, USB 2.0, and Gbit-Ether, making it ideal for applications such as entry-class industrial human-machine interfaces (HMIs) and embedded devices with video capabilities. Patches add support for the following: * Documentation for RZ/G2{L,LC,UL} SoC variants * Documentation for Renesas SMARC EVK * SYSC binding doc required for SoC identification * SoC identification support * Enabling ARCH_R9A07G044 in defconfig All the patches have been cherry picked from v5.16-rc5 [0] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ rz-arm-based-high-end-32-64-bit-mpus/rzg2l-general-purpose-microprocessors-dual- core-arm-cortex-a55-12-ghz-cpus-3d-graphics-and-video-codec [1] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ rz-arm-based-high-end-32-64-bit-mpus/rtk9744l23s01000be-rzg2l-evaluation-board-kit Cheers, Prabhakar Lad Prabhakar (7): dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants dt-bindings: arm: renesas: Document SMARC EVK dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's arm64: defconfig: Enable ARCH_R9A07G044 .../devicetree/bindings/arm/renesas.yaml | 18 ++++++ .../bindings/power/renesas,rzg2l-sysc.yaml | 63 +++++++++++++++++++ arch/arm64/configs/defconfig | 1 + drivers/soc/renesas/Kconfig | 5 ++ drivers/soc/renesas/renesas-soc.c | 33 +++++++++- 5 files changed, 119 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml -- 2.17.1
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Re: Renesas RZ/G2L support for 5.10-cip
Lad Prabhakar
Hi Nobuhiro,
toggle quoted messageShow quoted text
-----Original Message-----Sure will send it by feature. Cheers, Prabhakar Best regards,
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Re: Renesas RZ/G2L support for 5.10-cip
Nobuhiro Iwamatsu
Hi Prabhakar,
I have prepared ~105 patches adding support for Renesas RZ/G2L on 5.10-cip (all patches cherry picked from v5.16-rc5). Is it OK > if I bulk post the patches or do you prefer them in chunks(maybe ~25 each)?I suggest splitting it up and sending it by feature if possible. In this case, we can review each feature separately. Best regards, Nobuhiro ________________________________________ 差出人: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...> 送信日時: 2021年12月14日 21:34 宛先: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ); Pavel Machek CC: cip-dev@... 件名: Renesas RZ/G2L support for 5.10-cip Hi Nobuhiro, Pavel, I have prepared ~105 patches adding support for Renesas RZ/G2L on 5.10-cip (all patches cherry picked from v5.16-rc5). Is it OK if I bulk post the patches or do you prefer them in chunks(maybe ~25 each)? Cheers, Prabhakar
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Renesas RZ/G2L support for 5.10-cip
Lad Prabhakar
Hi Nobuhiro, Pavel,
I have prepared ~105 patches adding support for Renesas RZ/G2L on 5.10-cip (all patches cherry picked from v5.16-rc5). Is it OK if I bulk post the patches or do you prefer them in chunks(maybe ~25 each)? Cheers, Prabhakar
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Re: [isar-cip-core][PATCH v2] conf/machine/*: Add variable to set version of kernel defconfig
Jan Kiszka
On 13.12.21 09:13, Q. Gylstorff wrote:
From: Quirin Gylstorff <quirin.gylstorff@...>Thanks, applied. Jan -- Siemens AG, T RDA IOT Corporate Competence Center Embedded Linux
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