Date   

Re: [PATCH 4.4.y-cip 0/4] Add RZ/G1H Audio support

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Pavel Machek [mailto:pavel@...]
Sent: Monday, September 14, 2020 6:11 AM
To: iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) <nobuhiro1.iwamatsu@...>
Cc: biju.das.jz@...; cip-dev@...; pavel@...; chris.paterson2@...;
prabhakar.mahadev-lad.rj@...
Subject: Re: [PATCH 4.4.y-cip 0/4] Add RZ/G1H Audio support

Hi!

This patch series add audio support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (4):
dt-bindings: ASoC: renesas,rsnd: Add r8a7742 support
ARM: dts: r8a7742: Add audio support
ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS

.../bindings/sound/renesas,rsnd.txt | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 100 +++++++
arch/arm/boot/dts/r8a7742.dtsi | 272 ++++++++++++++++++
3 files changed, 373 insertions(+)
I reviewd this patch series.
Looks good to me. If If no objection, I will apply and push this.
And I am testing on https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/188827239.
Looks good to me, too. I have no objections.
Thanks! I applied and pushed.

Best regards,
Nobuhiro


Re: [PATCH 4.4.y-cip 0/4] Add RZ/G1H Audio support

Pavel Machek
 

Hi!

This patch series add audio support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (4):
dt-bindings: ASoC: renesas,rsnd: Add r8a7742 support
ARM: dts: r8a7742: Add audio support
ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS

.../bindings/sound/renesas,rsnd.txt | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 100 +++++++
arch/arm/boot/dts/r8a7742.dtsi | 272 ++++++++++++++++++
3 files changed, 373 insertions(+)
I reviewd this patch series.
Looks good to me. If If no objection, I will apply and push this.
And I am testing on https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/188827239.
Looks good to me, too. I have no objections.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 0/4] Add RZ/G1H Audio support

Nobuhiro Iwamatsu
 

Hi Biju,

-----Original Message-----
From: Biju Das [mailto:biju.das.jz@...]
Sent: Friday, September 11, 2020 9:32 PM
To: cip-dev@...; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
<nobuhiro1.iwamatsu@...>; Pavel Machek <pavel@...>
Cc: Chris Paterson <chris.paterson2@...>; Biju Das <biju.das.jz@...>; Prabhakar Mahadev Lad
<prabhakar.mahadev-lad.rj@...>
Subject: [PATCH 4.4.y-cip 0/4] Add RZ/G1H Audio support

This patch series add audio support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (4):
dt-bindings: ASoC: renesas,rsnd: Add r8a7742 support
ARM: dts: r8a7742: Add audio support
ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS

.../bindings/sound/renesas,rsnd.txt | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 100 +++++++
arch/arm/boot/dts/r8a7742.dtsi | 272 ++++++++++++++++++
3 files changed, 373 insertions(+)
I reviewd this patch series.
Looks good to me. If If no objection, I will apply and push this.
And I am testing on https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/188827239.

Best regards,
Nobuhiro


[isar-cip-core][PATCH] swupdate: Clean up do_prepare_build

Jan Kiszka
 

From: Jan Kiszka <jan.kiszka@...>

Reformat and drop the unused DEBDIR var (which wouldn't work anyway due
to DEBDIR definition in Isar's bitbake.conf)

Signed-off-by: Jan Kiszka <jan.kiszka@...>
---
recipes-core/swupdate/swupdate.bb | 22 ++++++++++------------
1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/recipes-core/swupdate/swupdate.bb b/recipes-core/swupdate/swupdate.bb
index 95cf73a..dd02cc2 100644
--- a/recipes-core/swupdate/swupdate.bb
+++ b/recipes-core/swupdate/swupdate.bb
@@ -39,16 +39,14 @@ TEMPLATE_FILES = "debian/changelog.tmpl debian/control.tmpl debian/rules.tmpl"
TEMPLATE_VARS += "BUILD_DEB_DEPENDS DEFCONFIG DEBIAN_DEPENDS"

do_prepare_build() {
- DEBDIR=${S}/debian
- cp -R ${WORKDIR}/debian ${S}
-
- install -m 0644 ${WORKDIR}/${PN}.cfg ${S}/swupdate.cfg
- install -m 0644 ${WORKDIR}/${DEFCONFIG}.gen ${S}/configs/${DEFCONFIG}
-
- if ! grep -q "configs/${DEFCONFIG}" ${S}/.gitignore
- then
- echo "configs/${DEFCONFIG}" >> ${S}/.gitignore
- fi
- # luahandler
- install -m 0644 ${WORKDIR}/${SWUPDATE_LUASCRIPT} ${S}
+ cp -R ${WORKDIR}/debian ${S}
+
+ install -m 0644 ${WORKDIR}/${PN}.cfg ${S}/swupdate.cfg
+ install -m 0644 ${WORKDIR}/${DEFCONFIG}.gen ${S}/configs/${DEFCONFIG}
+
+ if ! grep -q "configs/${DEFCONFIG}" ${S}/.gitignore; then
+ echo "configs/${DEFCONFIG}" >> ${S}/.gitignore
+ fi
+ # luahandler
+ install -m 0644 ${WORKDIR}/${SWUPDATE_LUASCRIPT} ${S}
}
--
2.26.2


[PATCH 4.4.y-cip 4/4] ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit fc3a1b2763d44ed471169e1dff2c8ce0fb352c1c upstream.

Enable sound with DMA support on carrier board.

DMA transfer uses DVC

DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]

DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1590611013-26029-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 63 +++++++++++++++++++++++++
1 file changed, 63 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 8085e1651493..428c494d88a3 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -5,6 +5,29 @@
* Copyright (C) 2020 Renesas Electronics Corp.
*/

+/*
+ * SSI-SGTL5000
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer set "DVC Out" 100%
+ * amixer set "DVC In" 100%
+ *
+ * You can use Mute
+ *
+ * amixer set "DVC Out Mute" on
+ * amixer set "DVC In Mute" on
+ *
+ * You can use Volume Ramp
+ *
+ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
+ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
+ * amixer set "DVC Out Ramp" on
+ * aplay xxx.wav &
+ * amixer set "DVC Out" 80% // Volume Down
+ * amixer set "DVC Out" 100% // Volume Up
+ */
+
/dts-v1/;
#include "r8a7742-iwg21m.dtsi"

@@ -36,6 +59,21 @@
regulator-always-on;
};

+ rsnd_sgtl5000: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&sndcodec>;
+ simple-audio-card,frame-master = <&sndcodec>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ };
+ };
+
vcc_sdhi2: regulator-vcc-sdhi2 {
compatible = "regulator-fixed";

@@ -117,6 +155,27 @@
function = "sdhi2";
power-source = <3300>;
};
+
+ sound_pins: sound {
+ groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
+ function = "ssi";
+ };
+};
+
+&rcar_sound {
+ pinctrl-0 = <&sound_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi4 &src4 &dvc1>;
+ capture = <&ssi3 &src3 &dvc0>;
+ };
+ };
};

&rwdt {
@@ -141,3 +200,7 @@
wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+
+&ssi4 {
+ shared-pin;
+};
--
2.17.1


[PATCH 4.4.y-cip 3/4] ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 436765010f266a2afd6c9afd15233225448a3e8d upstream.

This patch enables SGTL5000 audio codec on the carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Link: https://lore.kernel.org/r/1590611013-26029-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 37 +++++++++++++++++++++++++
1 file changed, 37 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 1c7e58d47d73..8085e1651493 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -22,6 +22,20 @@
stdout-path = "serial2:115200n8";
};

+ audio_clock: audio_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ };
+
+ reg_1p5v: 1p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P5V";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
vcc_sdhi2: regulator-vcc-sdhi2 {
compatible = "regulator-fixed";

@@ -60,6 +74,24 @@
};
};

+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ sgtl5000: codec@a {
+ compatible = "fsl,sgtl5000";
+ #sound-dai-cells = <0>;
+ reg = <0x0a>;
+ clocks = <&audio_clock>;
+ VDDA-supply = <&reg_3p3v>;
+ VDDIO-supply = <&reg_3p3v>;
+ VDDD-supply = <&reg_1p5v>;
+ };
+};
+
&cmt0 {
status = "okay";
};
@@ -70,6 +102,11 @@
function = "avb";
};

+ i2c2_pins: i2c2 {
+ groups = "i2c2_b";
+ function = "i2c2";
+ };
+
scifa2_pins: scifa2 {
groups = "scifa2_data_c";
function = "scifa2";
--
2.17.1


[PATCH 4.4.y-cip 2/4] ARM: dts: r8a7742: Add audio support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit 3816124fd0408ec98773409732035f8f8425ff50 upstream.

Add sound support for the RZ/G1H SoC (a.k.a. R8A7742).

This work is based on similar work done on the R8A7744 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@...>
Link: https://lore.kernel.org/r/1590526904-13855-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
[biju: changed clocks and power-domain properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm/boot/dts/r8a7742.dtsi | 272 +++++++++++++++++++++++++++++++++
1 file changed, 272 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 32ed4138dc1b..e37f65655479 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -14,6 +14,27 @@
#address-cells = <2>;
#size-cells = <2>;

+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
clocks {
#address-cells = <2>;
#size-cells = <2>;
@@ -1180,6 +1201,257 @@
status = "disabled";
};

+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7742",
+ "renesas,rcar_sound-gen2";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&mstp10_clks R8A7742_CLK_SSI_ALL>,
+ <&mstp10_clks R8A7742_CLK_SSI9>, <&mstp10_clks R8A7742_CLK_SSI8>,
+ <&mstp10_clks R8A7742_CLK_SSI7>, <&mstp10_clks R8A7742_CLK_SSI6>,
+ <&mstp10_clks R8A7742_CLK_SSI5>, <&mstp10_clks R8A7742_CLK_SSI4>,
+ <&mstp10_clks R8A7742_CLK_SSI3>, <&mstp10_clks R8A7742_CLK_SSI2>,
+ <&mstp10_clks R8A7742_CLK_SSI1>, <&mstp10_clks R8A7742_CLK_SSI0>,
+ <&mstp10_clks R8A7742_CLK_SCU_SRC9>, <&mstp10_clks R8A7742_CLK_SCU_SRC8>,
+ <&mstp10_clks R8A7742_CLK_SCU_SRC7>, <&mstp10_clks R8A7742_CLK_SCU_SRC6>,
+ <&mstp10_clks R8A7742_CLK_SCU_SRC5>, <&mstp10_clks R8A7742_CLK_SCU_SRC4>,
+ <&mstp10_clks R8A7742_CLK_SCU_SRC3>, <&mstp10_clks R8A7742_CLK_SCU_SRC2>,
+ <&mstp10_clks R8A7742_CLK_SCU_SRC1>, <&mstp10_clks R8A7742_CLK_SCU_SRC0>,
+ <&mstp10_clks R8A7742_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7742_CLK_SCU_CTU1_MIX1>,
+ <&mstp10_clks R8A7742_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7742_CLK_SCU_CTU1_MIX1>,
+ <&mstp10_clks R8A7742_CLK_SCU_DVC0>, <&mstp10_clks R8A7742_CLK_SCU_DVC1>,
+ <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+ <&m2_clk>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "ctu.0", "ctu.1",
+ "mix.0", "mix.1",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&cpg_clocks>;
+
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>,
+ <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>,
+ <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>,
+ <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>,
+ <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>,
+ <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>,
+ <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>,
+ <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>,
+ <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>,
+ <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>,
+ <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+ };
+
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7742",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&mstp5_clks R8A7742_CLK_AUDIO_DMAC0>;
+ clock-names = "fck";
+ power-domains = <&cpg_clocks>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7742",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12";
+ clocks = <&mstp5_clks R8A7742_CLK_AUDIO_DMAC1>;
+ clock-names = "fck";
+ power-domains = <&cpg_clocks>;
+ #dma-cells = <1>;
+ dma-channels = <13>;
+ };
+
sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7742",
"renesas,rcar-gen2-sdhi";
--
2.17.1


[PATCH 4.4.y-cip 1/4] dt-bindings: ASoC: renesas,rsnd: Add r8a7742 support

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>

commit b6f10d3f2e6dfccf58c54e81c8af586b66a80ce4 upstream.

Document RZ/G1H (R8A7742) SoC bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Acked-by: Rob Herring <robh@...>
Link: https://lore.kernel.org/r/1590526904-13855-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Mark Brown <broonie@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
index 23656d187f3a..bf07aa156a6a 100644
--- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
+++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
@@ -6,6 +6,7 @@ Required properties:
"renesas,rcar_sound-gen2" if generation2 (or RZ/G1)
"renesas,rcar_sound-gen3" if generation3
Examples with soctypes are:
+ - "renesas,rcar_sound-r8a7742" (RZ/G1H)
- "renesas,rcar_sound-r8a7743" (RZ/G1M)
- "renesas,rcar_sound-r8a7744" (RZ/G1N)
- "renesas,rcar_sound-r8a7745" (RZ/G1E)
--
2.17.1


[PATCH 4.4.y-cip 0/4] Add RZ/G1H Audio support

Biju Das <biju.das.jz@...>
 

This patch series add audio support for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (4):
dt-bindings: ASoC: renesas,rsnd: Add r8a7742 support
ARM: dts: r8a7742: Add audio support
ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS

.../bindings/sound/renesas,rsnd.txt | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 100 +++++++
arch/arm/boot/dts/r8a7742.dtsi | 272 ++++++++++++++++++
3 files changed, 373 insertions(+)

--
2.17.1


Re: CIP IRC weekly meeting today

Nobuhiro Iwamatsu
 

Hi Kudo-san,

Sorry, I can not join IRC meeting today.

-----Original Message-----
From: cip-dev@... [mailto:cip-dev@...] On Behalf Of
masashi.kudo@...
Sent: Thursday, September 10, 2020 9:23 AM
To: cip-dev@...
Subject: [cip-dev] CIP IRC weekly meeting today

Hi all,

Kindly be reminded to attend the weekly meeting through IRC to discuss technical topics with CIP kernel today.

*Please note that the IRC meeting was rescheduled to UTC (GMT) 09:00 starting from the first week of Apr. according
to TSC meeting*
https://www.timeanddate.com/worldclock/meetingdetails.html?year=2020&month=9&day=10&hour=9&min=0&sec=0&p1=224&p2=
179&p3=136&p4=37&p5=241&p6=248

USWest USEast UK DE TW JP
02:00 05:00 10:00 11:00 17:00 18:00

Channel:
* irc:chat.freenode.net:6667/cip

Last meeting minutes:
https://irclogs.baserock.org/meetings/cip/2020/09/cip.2020-09-03-09.00.log.html

Agenda:

* Action item
1. Combine root filesystem with kselftest binary - iwamatsu
No update.

2. Post LTP results to KernelCI - patersonc

* Kernel maintenance updates
I reviewed and pushed patches in cip-dev.

* Kernel testing
* Software update
* CIP Security
* AOB

The meeting will take 30 min, although it can be extended to an hour if it makes sense and those involved in the topics
can stay. Otherwise, the topic will be taken offline or in the next meeting.

Best regards,
Best regards,
Nobuhiro


CIP IRC weekly meeting today

masashi.kudo@cybertrust.co.jp <masashi.kudo@...>
 

Hi all,

Kindly be reminded to attend the weekly meeting through IRC to discuss technical topics with CIP kernel today.

*Please note that the IRC meeting was rescheduled to UTC (GMT) 09:00 starting from the first week of Apr. according to TSC meeting*
https://www.timeanddate.com/worldclock/meetingdetails.html?year=2020&month=9&day=10&hour=9&min=0&sec=0&p1=224&p2=179&p3=136&p4=37&p5=241&p6=248

USWest USEast UK DE TW JP
02:00 05:00 10:00 11:00 17:00 18:00

Channel:
* irc:chat.freenode.net:6667/cip

Last meeting minutes:
https://irclogs.baserock.org/meetings/cip/2020/09/cip.2020-09-03-09.00.log.html

Agenda:

* Action item
1. Combine root filesystem with kselftest binary - iwamatsu
2. Post LTP results to KernelCI - patersonc

* Kernel maintenance updates
* Kernel testing
* Software update
* CIP Security
* AOB

The meeting will take 30 min, although it can be extended to an hour if it makes sense and those involved in the topics can stay. Otherwise, the topic will be taken offline or in the next meeting.

Best regards,
--
M. Kudo
Cybertrust Japan Co., Ltd.


Re: [PATCH 4.4.y-cip 00/11] ti-cpufreq backport

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Pavel Machek [mailto:pavel@...]
Sent: Wednesday, September 9, 2020 4:04 PM
To: Chen-Yu Tsai (Moxa) <wens@...>
Cc: iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) <nobuhiro1.iwamatsu@...>; pavel@...;
cip-dev@...; JohnsonCH.Chen@...; victor.yu@...
Subject: Re: [PATCH 4.4.y-cip 00/11] ti-cpufreq backport

Hi!

This is the final part of MOXA's PM / OPP / ti-cpufreq backport series.
Part 2, which consisted of OPP / cpufreq-dt cleanups, is abandoned in
favor of directly backporting the ti-cpufreq driver.

This part includes a couple of patches to the PM / OPP subsystem to
expose required APIs, and deal with the v1/v2 mixed OPP table used
by am33xx. The rest are the backport of the ti-cpufreq driver, and
fixes for this driver. The fixes were requested by CIP kernel
maintainers as part of MOXA's previous attempt to backport ti-cpufreq.
They are included as separate patches, as there are quite a few of them
spread over multiple kernel releases.

The result is that my BeagleBone Black can run at higher speeds than
without the ti-cpufreq driver due to having a better silicon
revision.
The series looks good to me. I can apply it if it passes testing and
there are no other comments.
This patch series looks good to me too.
So, I applied and pushed.


Best regards,
Pavel
Best regards,
Nobuhiro


Re: [PATCH 4.4.y-cip 0/6] RZ/G1H add support for Ether/[H]SCIF{A|B}

Pavel Machek
 

Hi!

This patch series adds support for ETHER/[H]SCIF{A|B} to
R8A7742 SoC and alongside adds camera daughter board dts
which fits on iwg21d-q7 development platform.

Patches 1/6, 3/6, 5/6, 6/6 have been cherry picked from
upstream kernel, patch 2/6 is a hookup patch to enable
eth on R8A7742 SoC and patch 4/6 is a fixup patch.
This series looks okay to me.
Thank you, applied and pushed out.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 00/11] ti-cpufreq backport

Pavel Machek
 

Hi!

This is the final part of MOXA's PM / OPP / ti-cpufreq backport series.
Part 2, which consisted of OPP / cpufreq-dt cleanups, is abandoned in
favor of directly backporting the ti-cpufreq driver.

This part includes a couple of patches to the PM / OPP subsystem to
expose required APIs, and deal with the v1/v2 mixed OPP table used
by am33xx. The rest are the backport of the ti-cpufreq driver, and
fixes for this driver. The fixes were requested by CIP kernel
maintainers as part of MOXA's previous attempt to backport ti-cpufreq.
They are included as separate patches, as there are quite a few of them
spread over multiple kernel releases.

The result is that my BeagleBone Black can run at higher speeds than
without the ti-cpufreq driver due to having a better silicon
revision.
The series looks good to me. I can apply it if it passes testing and
there are no other comments.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 04/11] cpufreq: ti: Add cpufreq driver to determine available OPPs at runtime

Pavel Machek
 

Hi!

+ ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
+ if (ret)
+ goto fail_put_node;
+
+ of_node_put(opp_data->opp_node);
+
+ ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
+ version, VERSION_COUNT));
+ if (ret) {
+ dev_err(opp_data->cpu_dev,
+ "Failed to set supported hardware\n");
+ goto fail_put_node;
+ }
of_node_put() is done twice in the last error path.
Aha, it is fixed in subsequent patches. Sorry for the noise.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip] gpio: rcar: Avoid NULL pointer access in gpio_rcar_set_multiple()

Pavel Machek
 

Hi!

gpiochip_get_data() expects the controller probe to call
gpiochip_add_data() before using it, where as the rcar-gpio
driver probe has gpiochip_add() call thus resulting in NULL
pointer access.

Avoid this case by using gpio_to_priv() call.

Fixes: 6e52cced1aa58 ("gpio: rcar: Implement gpiochip.set_multiple()")
Signed-off-by: Lad Prabhakar
Thanks, applied and pushed out.

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip 04/11] cpufreq: ti: Add cpufreq driver to determine available OPPs at runtime

Pavel Machek
 

Hi!

+ /*
+ * The efuse on dra7 and am57 parts contains a specific
+ * value indicating the highest available OPP.
+ */
+
+ switch (efuse) {
+ case DRA7_EFUSE_HAS_ALL_MPU_OPP:
+ case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
+ calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
+ case DRA7_EFUSE_HAS_OD_MPU_OPP:
+ calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
+ }
Some kind of fallthrough marking would not be bad.

+ ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
+ if (ret)
+ goto fail_put_node;
+
+ of_node_put(opp_data->opp_node);
+
+ ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
+ version, VERSION_COUNT));
+ if (ret) {
+ dev_err(opp_data->cpu_dev,
+ "Failed to set supported hardware\n");
+ goto fail_put_node;
+ }
of_node_put() is done twice in the last error path.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip v2] of: Add missing exports of node name compare functions

Pavel Machek
 

Hi!

From: Rob Herring <robh@...>

commit 173ee3962959a1985a109f81539a403b5cd07ae7 upstream.

Commit f42b0e18f2e5 ("of: add node name compare helper functions")
failed to add the module exports to of_node_name_eq() and
of_node_name_prefix(). Add them now.
Thanks, applied and pushed out.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.4.y-cip] gpio: rcar: use gpiochip data pointer

Pavel Machek
 

Hi!

Fixing set_multiple is possible with this oneliner, right?

@@ -541,7 +532,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
irq_chip->flags= IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;

-ret = gpiochip_add(gpio_chip);
+ret = gpiochip_add_data(gpio_chip, p);
if (ret) {
dev_err(dev, "failed to add GPIO controller\n");
goto err0;
The patch is okay and now I understand why you want it. It would have
been nice if changelog told me directly.
My bad.

Can set_multiple use container_of() too? We get less differences
between 4.4 and 4.4-cip that way, and it is still one-liner.
It could use gpio_to_priv(), but since there was an commit upstream already I just pulled it in.
I have now posted a oneliner patch (https://patchwork.kernel.org/patch/11756155/)

Let me know if you if you are OK with the patch or I shall post a one-liner.
Please drop the current patch
Done, thanks... and let me take a look.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


[PATCH 4.4.y-cip 06/11] cpufreq: ti-cpufreq: kfree opp_data when failure

Chen-Yu Tsai (Moxa) <wens@...>
 

From: Zumeng Chen <zumeng.chen@...>

commit 05829d9431df1bf6de98679fbcfbad282c1c55a4 upstream.

memory leakage was found by kmemleak. opp_data needs to be freed
when failure, including fail_put_node.

unreferenced object 0xccdd4c40 (size 64):
comm "swapper", pid 1, jiffies 4294938465 (age 888.520s)
hex dump (first 32 bytes):
00 7c 00 c1 98 69 d8 ce 00 24 03 ce 00 24 03 ce .|...i...$...$..
20 35 23 c1 00 00 00 00 00 00 00 00 00 00 00 00 5#.............
backtrace:
[<c028fb64>] kmem_cache_alloc_trace+0x2c4/0x3cc
[<c076d5f0>] ti_cpufreq_probe+0x6c/0x334
[<c068d6e4>] platform_drv_probe+0x60/0xc0
[<c068b384>] driver_probe_device+0x218/0x2c4
[<c068b5a4>] __device_attach_driver+0xa8/0xdc
[<c0689340>] bus_for_each_drv+0x70/0xa4
[<c068b020>] __device_attach+0xc0/0x124
[<c068b634>] device_initial_probe+0x1c/0x20
[<c068a3b8>] bus_probe_device+0x94/0x9c
[<c0688300>] device_add+0x404/0x590
[<c068d408>] platform_device_add+0x11c/0x230
[<c068df40>] platform_device_register_full+0x10c/0x128
[<c076d578>] ti_cpufreq_init+0x44/0x50
[<c01017c4>] do_one_initcall+0x54/0x180
[<c0e00fe0>] kernel_init_freeable+0x270/0x33c
[<c093f2bc>] kernel_init+0x18/0x124

Signed-off-by: Zumeng Chen <zumeng.chen@...>
Acked-by: Viresh Kumar <viresh.kumar@...>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@...>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@...>
---
drivers/cpufreq/ti-cpufreq.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index 1c63e96cba1f2..36627b2b256f8 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -217,7 +217,8 @@ static int ti_cpufreq_init(void)
opp_data->cpu_dev =3D get_cpu_device(0);
if (!opp_data->cpu_dev) {
pr_err("%s: Failed to get device for CPU0\n", __func__);
- return -ENODEV;
+ ret =3D ENODEV;
+ goto free_opp_data;
}
=20
opp_data->opp_node =3D dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_de=
v);
@@ -262,6 +263,8 @@ register_cpufreq_dt:
=20
fail_put_node:
of_node_put(opp_data->opp_node);
+free_opp_data:
+ kfree(opp_data);
=20
return ret;
}
--=20
2.28.0

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