[PATCH 3/3] ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB
Fabrizio Castro <fabrizio.castro@...>
CAN1 interface is exposed via connector J1 found on the HDMI daughter
board. This patch enables can1 DT node from within the daughter board specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> Signed-off-by: Simon Horman <horms+renesas@...> (cherry picked from commit d6033e7c6589c74299635eb3d84c56ccac8db5e4) Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts index fc0f559..654d28b 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts @@ -54,6 +54,13 @@ }; }; +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &hscif2 { pinctrl-0 = <&hscif2_pins>; pinctrl-names = "default"; @@ -103,6 +110,11 @@ }; &pfc { + can1_pins: can1 { + groups = "can1_data_b"; + function = "can1"; + }; + du0_pins: du0 { groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; function = "du0"; -- 2.7.4 |
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[PATCH 2/3] ARM: dts: iwg22d-sodimm: Add can0 support to carrier board
Fabrizio Castro <fabrizio.castro@...>
This patch enables CAN0 interface exposed through connector J15 on the
carrier board. Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> Signed-off-by: Simon Horman <horms+renesas@...> (cherry picked from commit 805a5263f4212e431a44c4a04738022a2498f652) Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index bffe735..1486565 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -40,6 +40,13 @@ }; }; +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -49,6 +56,11 @@ }; &pfc { + can0_pins: can0 { + groups = "can0_data"; + function = "can0"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data", "hscif1_ctrl"; function = "hscif1"; -- 2.7.4 |
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[PATCH 1/3] ARM: dts: r8a7745: Add CAN[01] SoC support
Fabrizio Castro <fabrizio.castro@...>
Add the definitions for can0 and can1 to the SoC .dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> Signed-off-by: Simon Horman <horms+renesas@...> (cherry picked from commit 85d3122659be310c632ef1908532157ce82900ee) (moved nodes to a better location to allow for better sorting. modified clocks and power-domains properties. removed resets properties) Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> --- arch/arm/boot/dts/r8a7745.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 6fdd3c2..c2e38ae 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -32,6 +32,14 @@ spi3 = &msiof2; }; + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -844,6 +852,32 @@ status = "disabled"; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7745", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7745_CLK_RCAN0>, + <&cpg_clocks R8A7745_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7745", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7745_CLK_RCAN1>, + <&cpg_clocks R8A7745_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + pci0: pci@ee090000 { compatible = "renesas,pci-r8a7745", "renesas,pci-rcar-gen2"; -- 2.7.4 |
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[PATCH 0/3] Add CAN support to iwg22d
Fabrizio Castro <fabrizio.castro@...>
Hello Ben,
this series backports CAN support for the iwg22d. This series depends on series "Add PWM and TPU support": https://lists.cip-project.org/pipermail/cip-dev/2018-July/001400.html and it applies on top of branch linux-4.4.y-cip, commit 4d769b2b8749e89dfc7ea179a44f652dcfbedb37 ("PM / OPP: Move error message to debug level"). Thanks, Fab Fabrizio Castro (3): ARM: dts: r8a7745: Add CAN[01] SoC support ARM: dts: iwg22d-sodimm: Add can0 support to carrier board ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++++++++ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++ arch/arm/boot/dts/r8a7745.dtsi | 34 ++++++++++++++++++++++ 3 files changed, 58 insertions(+) -- 2.7.4 |
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[PATCH 2/2] ARM: dts: r8a7745: Add TPU support
Fabrizio Castro <fabrizio.castro@...>
Add TPU support to SoC DT.
Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> Reviewed-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Simon Horman <horms+renesas@...> (cherry picked from commit b9db514555274eb325c9b13a0b0587c0e600d75a) (moved node to a better location to allow for better sorting. modified clocks and power-domains properties. removed resets property) Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> --- arch/arm/boot/dts/r8a7745.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 4163ae4..6fdd3c2 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -173,6 +173,15 @@ reg = <0 0xe6060000 0 0x11c>; }; + tpu: pwm@e60f0000 { + compatible = "renesas,tpu-r8a7745", "renesas,tpu"; + reg = <0 0xe60f0000 0 0x148>; + clocks = <&mstp3_clks R8A7745_CLK_TPU0>; + power-domains = <&cpg_clocks>; + #pwm-cells = <3>; + status = "disabled"; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; -- 2.7.4 |
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[PATCH 1/2] ARM: dts: r8a7745: Add PWM SoC support
Fabrizio Castro <fabrizio.castro@...>
Add the definitions for pwm[0123456] to the SoC .dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> Reviewed-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Simon Horman <horms+renesas@...> (cherry picked from commit 3711d0ede24d2e3c90ae10e1a79746ac87169609) (modified clocks and power-domains properties. removed resets property) Signed-off-by: Fabrizio Castro <fabrizio.castro@...> Reviewed-by: Biju Das <biju.das@...> --- arch/arm/boot/dts/r8a7745.dtsi | 63 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 68ef545..4163ae4 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -772,6 +772,69 @@ status = "disabled"; }; + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm1: pwm@e6e31000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e31000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm2: pwm@e6e32000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e32000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm3: pwm@e6e33000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e33000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm4: pwm@e6e34000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e34000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm5: pwm@e6e35000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e35000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm6: pwm@e6e36000 { + compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; + reg = <0 0xe6e36000 0 0x8>; + clocks = <&mstp5_clks R8A7745_CLK_PWM>; + power-domains = <&cpg_clocks>; + #pwm-cells = <2>; + status = "disabled"; + }; + pci0: pci@ee090000 { compatible = "renesas,pci-r8a7745", "renesas,pci-rcar-gen2"; -- 2.7.4 |
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[PATCH 0/2] Add PWM and TPU support
Fabrizio Castro <fabrizio.castro@...>
Hello Ben,
this series backports PWM and TPU support for the r8a7745 SoC, and it applies on top of branch linux-4.4.y-cip, commit 4d769b2b8749e89dfc7ea179a44f652dcfbedb37 ("PM / OPP: Move error message to debug level"). Thanks, Fab Fabrizio Castro (2): ARM: dts: r8a7745: Add PWM SoC support ARM: dts: r8a7745: Add TPU support arch/arm/boot/dts/r8a7745.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) -- 2.7.4 |
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DebConf 2018
Ben Hutchings <ben.hutchings@...>
For those of you attending DebConf or interested in watching the live
video streams, the schedule is now available. The following sessions may be of particular interest to CIP members: Arm ports BoF https://debconf18.debconf.org/talks/93-arm-ports-bof/ Backporting hardware support in Debian (BoF) https://debconf18.debconf.org/talks/92-backporting-hardware-support-in-debian/ Building Debian-based system images (BoF) https://debconf18.debconf.org/talks/89-building-debian-based-system-images/ Civilization runs on Debian (talk) https://debconf18.debconf.org/talks/112-civilization-runs-on-debian/ I would guess that the talk itself won't be news to us, but the questions from attendees may still be interesting. How to engage developers to contribute effectively to Debian and other open source projects in Asia (talk) https://debconf18.debconf.org/talks/36-how-to-engage-developers-to-contribute-effectively-to-debian-and-other-open-source-projects-in-asia/ This talk will *not* be video recorded or streamed. Running tests and analysing results on an Embedded Debian system with BMW/Genivi tooling (talk) https://debconf18.debconf.org/talks/17-running-tests-and-analysing-results-on-an-embedded-debian-system-with-bmwgenivi-tooling/ Using FAI to build Live debian images for ARM developer boards (talk) https://debconf18.debconf.org/talks/84-using-fai-to-build-live-debian-images-for-arm-developer-boards/ I was surprised to see that there is no LTS (long-term support) BoF scheduled. It should be possible to add a BoF to the schedule, though without video coverage. Ben. -- Ben Hutchings, Software Developer Codethink Ltd https://www.codethink.co.uk/ Dale House, 35 Dale Street Manchester, M1 2HF, United Kingdom |
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[CIP Core] Criteria for prioritizing security fixes in Debian LTS
Daniel Sangorrin <daniel.sangorrin@...>
Hello Ben,
As platinum-level sponsors of the Debian LTS, we (CIP members) can provide a list of packages that we rely on and that should be prioritized in terms of security support. [Note] The list of packages from each member can be found here: Ref: https://docs.google.com/spreadsheets/d/1hrhYnDYSxeA-ZXaHB329-CzgY8H4H5iHXP1AeFFdJDc/ [Note] The list can be updated at any time (by notifying deblts@...) [Note] The votes will be weighted by the amount of money contributed. [Note] The Customer recognizes that this contract is a best-effort contract During the Open Source Summit in Japan, we discussed about how to prioritize those packages. I proposed to create a set of criteria and Agustin mentioned that it would be a good idea to have you (Ben) evaluate these criteria and its impact before attending to DebConf. [Note] Based on your feedback, CIP will decide to contact the Freexian leads before the DebConf or not. Without further delay, I would appreciate it if you reviewed the criteria below to prioritize security fixes: 1) Packages that are popular among members' package lists [Rationale] popular packages are often the target of exploits - Examples: bash, busybox[-static], zlib, sqlite3, iptables, net-tools, libcap2, util-linux, dropbear, libsqlite3, tzdata 2) CVEs with high "base score", high "impact score", high "exploitability score", and low "attack complexity" [Rationale] these CVEs usually refer to bugs that are easy to exploit or have a high impact. 3) Network software (CVEs with "Access Vector (AV): Network") [Rationale] bugs that can be exploited remotely are the most dangerous - Network servers examples: apache2, nginx, openssh-server, openssh-sftp-server, tftp-hpa, postgresql, nfs-kernel-server, strongswan, netcat,vsftpd - Network libs examples: libssh, libssl, zeromq3, libsocketcan, net-snmp, libnet, libnss, openldap, openvpn, libcurl.. - Network clients examples: openssh-client, sshpass, ntp, wireless-tools, wget, obexftp, iproute2... - Update software examples: apt, unattended-upgrades... 4) Security software [Rationale] LSM modules, encryption, and authorization are the foundation of a security-hardened system - Examples: apparmor, libseccomp, libselinux, *crypt*, libnettle4, libkeyutils1, tpm2-tools, pam, login, passwd, pwauth, xauth, libsasl, php-auth, shadow, sudo... 5) Language runtimes/compilers [Rationale] they are common to many applications. - Examples: gcc, libc, libstdc++, lua, nodejs, openjdk, perl, python, tcl... Best regards, Daniel Sangorrin |
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[Git][cip-project/cip-testing/board-at-desk-single-dev][master] 2 commits: More helpful final output #178
Agustin Benito Bethencourt
Robert Marshall pushed to branch master at cip-project / cip-testing / board-at-desk-single-devCommits:
1 changed file:Changes:
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[Git][cip-project/cip-testing/board-at-desk-single-dev][master] 2 commits: Use 2018.4 version of LAVA #185
Agustin Benito Bethencourt
Robert Marshall pushed to branch master at cip-project / cip-testing / board-at-desk-single-devCommits:
2 changed files:Changes:
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[Git][cip-project/cip-testing/board-at-desk-single-dev][master] 2 commits: Use a local test for the BBB health check
Agustin Benito Bethencourt
Robert Marshall pushed to branch master at cip-project / cip-testing / board-at-desk-single-devCommits:
1 changed file:Changes:
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Re: [CIP testing strategy] Vagrant disksize plugin introduced, and some other (Vagrant-less) ideas
Zoran
Hello Robert, VBox version & VBox extension 5.2.14 do not work with Vagrant 2.1.2 (rather with Vagrant 2.1.1). VBox version & VBox extension 5.2.12 do work with Vagrant 2.1.2. At least, this is what I experienced. (I am working to completely get rid of Vagrant, but I have another emergency projects, now) _______ For the CIP testing issue 190 (which is originated by me): https://gitlab.com/cip-project/cip-testing/testing/issues/190 Here is the workaround/solution: And, the last desperate attempt was to swap 2018.5-3 base-uboot.jinja2 with 2017.7 base-uboot.jinja2. Fortunately, I saved this one (The ONLY one complex one before destroying last Lava 2017.7 machine)), for NO apparent reason, which (somehow) shows that I have very good psychic abilities!? ;-) And, for the reference, here is the 2017.7 base-uboot.jinja2, presented as original: Lava 2017.7 generic device-type base-uboot.jinja2 file https://pastebin.com/rhs8wt4H This did the trick! Everything works like a charm. Thank you, Zoran On Fri, Jul 13, 2018 at 12:23 PM, Robert Marshall <robert.marshall@...> wrote: Zoran |
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Re: [CIP testing strategy] Vagrant disksize plugin introduced, and some other (Vagrant-less) ideas
Robert Marshall <robert.marshall@...>
Zoran
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Thanks for alerting me to this I'll take a look! Robert Zoran S <zoran.stojsavljevic.de@...> writes: Hello CIP members, |
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Beaglebone Black sumo kas-bbb-sumo.yml script
Zoran
Hello, I needed sumo script to do some dirty and quick bbb YOCTO rootfs and kernel production.Please, also do note that the script takes default variables, if they are not explicitly specified. _______ |
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Re: Altera CIP branch vs. Denali NAND driver
Takuo Koguchi
Jan,
Yeah, I wouldn't be surprised if I missed some patch that makes aOops, I should have done it before hand! I tried 4.17.0-rc2 on my cyclone5 board just now. It was better than denali-cip-backport but it did not work either. It found Bad block table but timeout while waiting for irq 0x4and cannot mount the file system on it. I will have to investigating this shortly... Takuo -----Original Message----- |
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Re: Altera CIP branch vs. Denali NAND driver
Jan Kiszka
On 2018-07-12 03:47, 小口琢夫 / KOGUCHI,TAKUO wrote:
Jan,Yeah, I wouldn't be surprised if I missed some patch that makes a difference on your board. But upstream 4.14+ works fine for you, right? Thanks for trying out nevertheless! Jan Best Regards, -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux |
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Re: Altera CIP branch vs. Denali NAND driver
Takuo Koguchi
Jan,
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I have tried to build denali-cip-backport and spent some time. It does not work yet on my boards. I saw "nand: timed out while waiting for chip to become ready" several times and the probe function failed. Sorry to say, I will not able to continue this effort for now. When I would make a progress, I will let you know. Best Regards, Takuo -----Original Message----- |
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Re: [PATCH 62/86] ARM: dts: r8a7745: Add operating-points to cpu0
Fabrizio Castro <fabrizio.castro@...>
Thank you Ben.OK, done.[...]Could you please cherry-pick this commit too then: Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709. |
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Re: [PATCH 62/86] ARM: dts: r8a7745: Add operating-points to cpu0
Ben Hutchings <ben.hutchings@...>
On Mon, 2018-07-09 at 10:29 +0000, Fabrizio Castro wrote:
Hello Ben,OK, done. Ben. -- Ben Hutchings, Software Developer Codethink Ltd https://www.codethink.co.uk/ Dale House, 35 Dale Street Manchester, M1 2HF, United Kingdom |
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