On Fri, 2018-06-29 at 15:39 +0100, Fabrizio Castro wrote:

shmobile_defconfig builds cpu freq into the kernel by default,
therefore we get error and warning messages at boot, when
hotplugging cpus, and when waking up from suspend to RAM.

Although the r8a7745 SoC does not support DVFS, defining one
operating point makes cpu freq happy and therefore all of the
nasty messages disappear.

Why was this not needed upstream?

Ben.

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Reviewed-by: Biju Das <biju.das@...>
---
 arch/arm/boot/dts/r8a7745.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi
b/arch/arm/boot/dts/r8a7745.dtsi
index 077a28a..5f1cc84 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -29,6 +29,7 @@
  clock-frequency = <1000000000>;
  clocks = <&z2_clk>;
  next-level-cache = <&L2_CA7>;
+ operating-points = <1000000 1000000>;
  };
 
  cpu1: cpu@1 {

--
Ben Hutchings, Software Developer   Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom

On Fri, 2018-06-29 at 15:38 +0100, Fabrizio Castro wrote:

From: Biju Das <biju.das@...>

Declare all core clocks and DIV6 clocks, as well as all MSTP clocks.

Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
 arch/arm/boot/dts/r8a7745.dtsi | 432 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 432 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 281ab59..5c50fd3 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi

[...]

+ mstp2_clks: mstp2_clks@e6150138 {
+ compatible = "renesas,r8a7743-mstp-clocks",
+      "renesas,cpg-mstp-clocks";

[...]

This and the following 9 device nodes have compatible =
"renesas,r8a7743-mstp-clocks" which should presumably be
"renesas,r8a7745-mstp-clocks".

Ben.

--
Ben Hutchings, Software Developer   Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom

On Fri, 2018-06-29 at 14:58 +0100, Biju Das wrote:

Hi,

This patch series aim to Document the CMT and
VIN deviced present in r8a774[35] SoC.

Applied, thanks.

Ben.

--
Ben Hutchings, Software Developer   Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom

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Hello CIP members,

Recently, I have learned that vagrant disksize plugin was introduced.
https://github.com/sprotheroe/vagrant-disksize

This, actually, replaces two native VBox commands (example given below):

VBoxManage clonehd stretch.vmdk stretch.vdi --format VDI --variant Standard
VBoxManage modifyhd stretch.vdi --resize 81920

The disksize plugin creates .VDI type of virtual HDD with the
stretched virtual size of 80GB (default .VMDK has limited 10GB size).

Please, do note that third party tool is required to extend the actual
virtual disk limit (as tool example: gparted).

In Vagrant file, you could create/add some code like this:

if !Vagrant.has_plugin?("vagrant-disksize")
system('vagrant plugin install vagrant-disksize');
end

Vagrant.configure(2) do |config|
config.vm.provider :virtualbox do |vbox, override|
config.vm.box = "debian/stretch64"
config.disksize.size = '80GB'

vbox.customize ["modifyvm", :id, "--vram", "32"]
vbox.customize ["modifyvm", :id, "--memory", "4096"]
vbox.customize ["modifyvm", :id, "--cpus", "4"]
vbox.customize ["modifyvm", :id, "--firmware", "bios"]
vbox.customize ["modifyvm", :id, "--acpi", "on"]
vbox.customize ["modifyvm", :id, "--ioapic", "on"]
vbox.customize ["modifyvm", :id, "--cpuexecutioncap", "75"]
vbox.customize ["modifyvm", :id, "--rtcuseutc", "on"]
vbox.customize ["modifyvm", :id, "--cpuhotplug", "on"]
vbox.customize ["modifyvm", :id, "--pae", "on"]
vbox.customize ["modifyvm", :id, "--hwvirtex", "on"]
vbox.customize ["modifyvm", :id, "--accelerate3d", "on"]
vbox.customize ["modifyvm", :id, "--clipboard", "bidirectional"]
vbox.customize ["modifyvm", :id, "--draganddrop", "bidirectional"]
vbox.customize ["modifyvm", :id, "--usb", "on"]
vbox.customize ["modifyvm", :id, "--usbehci", "on"]
...
_______

I also created [1] VBox VMM configuration and [2] Debian Stretch VM
configuration stages with pre-seed script (both stages execute with
one single command respectively), but [3] Lava VM test machine
creation without Vagrant assistance failed!

In other words I was not able to create [3] Lava VM provisioning stage
(in my first Vagrant-less attempt), using blindly unchanged CIP test
integration scripts.

I need to revisit integration scripts, my best guess. But I'll
continue to work on Vagrant-less test strategy, as my time allows
(engaged in several other projects).

Thank you,
Zoran

This patch enables the HDMI interface found on the expansion board.

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Reviewed-by: Biju Das <biju.das@...>
Acked-by: Laurent Pinchart <laurent.pinchart@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit 97b94d256d432ba9e1b37f9b21c3b285caf11de6)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
.../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 85 ++++++++++++++++++++++
1 file changed, 85 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index f925388..a8a4ec8 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -20,6 +20,38 @@
serial4 = &scif5;
serial6 = &hscif2;
};
+
+ cec_clock: cec-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <12000000>;
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
+};
+
+&du {
+ pinctrl-0 = <&du0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ ports {
+ port@0 {
+ endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ };
};

&hscif2 {
@@ -29,12 +61,65 @@
status = "okay";
};

+&i2c1 {
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ hdmi@39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&cec_clock>;
+ clock-names = "cec";
+ pd-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&du_out_rgb0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
&pfc {
+ du0_pins: du0 {
+ groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
+ function = "du0";
+ };
+
hscif2_pins: hscif2 {
groups = "hscif2_data";
function = "hscif2";
};

+ i2c1_pins: i2c1 {
+ groups = "i2c1_d";
+ function = "i2c1";
+ };
+
scif1_pins: scif1 {
groups = "scif1_data";
function = "scif1";
--
2.7.4

Add du node to r8a7745 SoC DT. Boards that want to enable the DU
need to specify the output topology.

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Reviewed-by: Biju Das <biju.das@...>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit 5841b8b32b56f8c9a289032614936ce334227c67)
(modified clocks property.)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 8e13fde..ea29277 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -907,6 +907,34 @@
status = "disabled";
};

+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7745";
+ reg = <0 0xfeb00000 0 0x40000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp7_clks R8A7745_CLK_DU0>,
+ <&mstp7_clks R8A7745_CLK_DU1>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ };
+ };
+
clocks {
#address-cells = <2>;
#size-cells = <2>;
--
2.7.4

Add support for the R8A7745 DU (which is very similar to the R8A7794 DU);
it has 2 RGB outputs.

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Reviewed-by: Biju Das <biju.das@...>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...>
(cherry picked from commit cdd90700157293dc7cb67d932b4f2fc44bd2a623)
(removed .gen and added .encoder_type to rzg1_du_r8a7745_info.)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index eee90f5..5187ed3 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -57,6 +57,28 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
.num_lvds = 1,
};

+static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
+ .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
+ | RCAR_DU_FEATURE_EXT_CTRL_REGS,
+ .num_crtcs = 2,
+ .routes = {
+ /*
+ * R8A7745 has two RGB outputs
+ */
+ [RCAR_DU_OUTPUT_DPAD0] = {
+ .possible_crtcs = BIT(0),
+ .encoder_type = DRM_MODE_ENCODER_NONE,
+ .port = 0,
+ },
+ [RCAR_DU_OUTPUT_DPAD1] = {
+ .possible_crtcs = BIT(1),
+ .encoder_type = DRM_MODE_ENCODER_NONE,
+ .port = 1,
+ },
+ },
+ .num_lvds = 0,
+};
+
static const struct rcar_du_device_info rcar_du_r8a7779_info = {
.features = 0,
.num_crtcs = 2,
@@ -153,6 +175,7 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = {

static const struct of_device_id rcar_du_of_table[] = {
{ .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
+ { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info },
{ .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
{ .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
{ .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
--
2.7.4

Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit e527649c320062f53d8437d1a49b3ed4fccf7750)
(modified clocks and power-domains properties. removed resets
property)
Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Reviewed-by: Biju Das <biju.das@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 7ab0bf3..8e13fde 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -27,6 +27,9 @@
i2c6 = &iic0;
i2c7 = &iic1;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
};

cpus {
@@ -725,6 +728,51 @@
status = "disabled";
};

+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7745",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7745_CLK_MSIOF0>;
+ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+ <&dmac1 0x51>, <&dmac1 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7745",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7745_CLK_MSIOF1>;
+ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+ <&dmac1 0x55>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7745",
+ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7745_CLK_MSIOF2>;
+ dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+ <&dmac1 0x41>, <&dmac1 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7745",
"renesas,pci-rcar-gen2";
--
2.7.4

From: Biju Das <biju.das@...>

This patch adds DMA properties to the HSUSB node.

Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit d4595f040881976d5a232922d8592a0d576ce3a5)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index aecf67a..7ab0bf3 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -322,6 +322,9 @@
reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7745_CLK_USBHS>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&cpg_clocks>;
renesas,buswait = <4>;
phys = <&usb0 1>;
--
2.7.4

From: Biju Das <biju.das@...>

Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit fbdf17b307dae407b2e673806386f84660d01b63)
(moved nodes to a better location to allow for better sorting.
removed resets property. modified clocks and power-domains
properties.)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index fc2dae8..aecf67a 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -350,6 +350,32 @@
};
};

+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7745-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&mstp3_clks R8A7745_CLK_USBHS_DMAC0>;
+ power-domains = <&cpg_clocks>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac1: dma-controller@e65b0000 {
+ compatible = "renesas,r8a7745-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&mstp3_clks R8A7745_CLK_USBHS_DMAC1>;
+ power-domains = <&cpg_clocks>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
--
2.7.4

From: Biju Das <biju.das@...>

Enable HS-USB on iWave RZ/G1E carrier board.

Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit b73ae2bdd83af78e5057d20ab2884cfd004c8543)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 82587d7..bffe735 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -70,6 +70,11 @@
power-source = <3300>;
};

+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
+
usb1_pins: usb1 {
groups = "usb1";
function = "usb1";
@@ -112,6 +117,12 @@
status = "okay";
};

+&hsusb {
+ status = "okay";
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+};
+
&pci1 {
status = "okay";
pinctrl-0 = <&usb1_pins>;
--
2.7.4

From: Biju Das <biju.das@...>

Define the R8A7745 generic part of the HS-USB device node. It is up to the
board file to enable the device.

Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit c5a541b81bc02d0746bf78ca7bfa9080d91c3aff)
(moved the node to a better location to allow for better sorting.
removed resets property. modified clocks and power-domains
properties.)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 9d2b8b1..fc2dae8 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -316,6 +316,19 @@
status = "disabled";
};

+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7745",
+ "renesas,rcar-gen2-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp7_clks R8A7745_CLK_USBHS>;
+ power-domains = <&cpg_clocks>;
+ renesas,buswait = <4>;
+ phys = <&usb0 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7745",
"renesas,rcar-gen2-usb-phy";
--
2.7.4

From: Biju Das <biju.das@...>

Signed-off-by: Biju Das <biju.das@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit aea3c9d9726148331d874c2b91aeb663430099d7)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index ceca4ec..82587d7 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -117,3 +117,7 @@
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
};
+
+&usbphy {
+ status = "okay";
+};
--
2.7.4

From: Biju Das <biju.das@...>

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.

Signed-off-by: Biju Das <biju.das@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit bc058f6f03e47610c994a97ecf3bf8a3ea44efee)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index bebea47..ceca4ec 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -69,6 +69,11 @@
function = "sdhi0";
power-source = <3300>;
};
+
+ usb1_pins: usb1 {
+ groups = "usb1";
+ function = "usb1";
+ };
};

&scif4 {
@@ -106,3 +111,9 @@
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&pci1 {
+ status = "okay";
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+};
--
2.7.4

From: Biju Das <biju.das@...>

Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.

Signed-off-by: Biju Das <biju.das@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit c3e35873e37b77581be942b7284e705e997014fc)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6915a9c..9d2b8b1 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -703,6 +703,18 @@
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
};

pci1: pci@ee0d0000 {
@@ -725,6 +737,18 @@
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x10800 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x11000 0 0 0 0>;
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
};

sdhi0: sd@ee100000 {
--
2.7.4

From: Biju Das <biju.das@...>

Define the r8a7745 generic part of the USB PHY device node.

Signed-off-by: Biju Das <biju.das@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit 237173a4bbf4c0710dbb7c35a4e2763671d293df)
(moved the node to a better location to allow for better sorting.
removed resets property. modified clocks and power-domains
properties.)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 82b7a2f..6915a9c 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -316,6 +316,27 @@
status = "disabled";
};

+ usbphy: usb-phy@e6590100 {
+ compatible = "renesas,usb-phy-r8a7745",
+ "renesas,rcar-gen2-usb-phy";
+ reg = <0 0xe6590100 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mstp7_clks R8A7745_CLK_USBHS>;
+ clock-names = "usbhs";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+
+ usb0: usb-channel@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+ usb2: usb-channel@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
--
2.7.4

From: Biju Das <biju.das@...>

Add device nodes for the r8a7745 internal PCI bridge devices.

Signed-off-by: Biju Das <biju.das@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit ab290a32925e6f7db9e71546098077b3e72cc617)
(moved the node to a better location to allow for better sorting.
removed resets property. modified clocks and power-domains
properties.)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 869eb88..82b7a2f 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -662,6 +662,50 @@
status = "disabled";
};

+ pci0: pci@ee090000 {
+ compatible = "renesas,pci-r8a7745",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee090000 0 0xc00>,
+ <0 0xee080000 0 0x1100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp7_clks R8A7745_CLK_USB_EHCI>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pci1: pci@ee0d0000 {
+ compatible = "renesas,pci-r8a7745",
+ "renesas,pci-rcar-gen2";
+ device_type = "pci";
+ reg = <0 0xee0d0000 0 0xc00>,
+ <0 0xee0c0000 0 0x1100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp7_clks R8A7745_CLK_USB_EHCI>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+
+ bus-range = <1 1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+ interrupt-map-mask = <0xff00 0 0 0x7>;
+ interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+ 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7745";
reg = <0 0xee100000 0 0x328>;
--
2.7.4

Add Silicon Storage Technology Inc. to the list of devicetree
vendor prefixes.

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Reviewed-by: Andreas Färber <afaerber@...>
Signed-off-by: Rob Herring <robh@...>
(cherry picked from commit 0bf4b3fadb5663959605d584410412dce53406cc)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 0e72c2c..12e4560 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -219,6 +219,7 @@ solomon Solomon Systech Limited
sony Sony Corporation
spansion Spansion Inc.
sprd Spreadtrum Communications Inc.
+sst Silicon Storage Technology, Inc.
st STMicroelectronics
ste ST-Ericsson
stericsson ST-Ericsson
--
2.7.4

Add support for the SPI NOR device used to boot up the system
to the System on Module DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@...>
Signed-off-by: Chris Paterson <chris.paterson2@...>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Simon Horman <horms+renesas@...>
(cherry picked from commit cf1cc6f1da41ceb60f6389b6b46f4f6dc06a2b63)
Signed-off-by: Biju Das <biju.das@...>
Reviewed-by: Fabrizio Castro <fabrizio.castro@...>
---
arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index f7f9cef..ed9a8cf 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -39,6 +39,11 @@
function = "mmc";
};

+ qspi_pins: qspi {
+ groups = "qspi_ctrl", "qspi_data2";
+ function = "qspi";
+ };
+
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
@@ -61,6 +66,27 @@
status = "okay";
};

+&qspi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ /* WARNING - This device contains the bootloader. Handle with care. */
+ flash: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,sst25vf016b", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+ };
+};
+
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
pinctrl-names = "default";
--
2.7.4