Date   

[isar-cip-core][PATCH 3/4] Add script deploy-kernelci.py for upload the cip-core-image-kernelci

Alice Ferrazzi
 

The cip-core-image-kernelci need to be uploaded to the KernelCI
production storage for been used by KernelCI.
This script use the KernelCI API for uploading the
cip-core-image-kernelci to the production storage.
The images are uploaded in the following link:
https://storage.kernelci.org/images/rootfs/cip/

Signed-off-by: Alice Ferrazzi <alice.ferrazzi@...>
---
scripts/deploy-kernelci.py | 55 ++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100755 scripts/deploy-kernelci.py

diff --git a/scripts/deploy-kernelci.py b/scripts/deploy-kernelci.py
new file mode 100755
index 0000000..5a8adca
--- /dev/null
+++ b/scripts/deploy-kernelci.py
@@ -0,0 +1,55 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+import subprocess
+import requests
+import os
+import sys
+import time
+from urllib.parse import urljoin
+
+cdate=time.strftime("%Y%m%d")
+api="https://api.kernelci.org/upload"
+token=os.getenv("KERNELCI_TOKEN")
+
+release=sys.argv[1]
+target=sys.argv[2]
+extension=sys.argv[3]
+
+rootfs_filename="cip-core-image-kernelci-cip-core-"+release+"-"+target+".tar.gz"
+initrd_filename="cip-core-image-kernelci-cip-core-"+release+"-"+target+"-initrd.img"
+initrd_gz_filename="cip-core-image-kernelci-cip-core-"+release+"-"+target+"-initrd.img.gz"
+
+input_dir="build/tmp/deploy/images/"+target
+upload_path="/images/rootfs/cip/"+cdate+"/"+target+"/"
+upload_path_latest="/images/rootfs/cip/latest/"+target+"/"
+rootfs=input_dir+"/"+rootfs_filename
+initrd=input_dir+"/"+initrd_filename
+
+def upload_file(api, token, path, input_file, input_filename):
+ headers = {
+ 'Authorization': token,
+ }
+ data = {
+ 'path': path,
+ }
+ files = {
+ 'file': (input_filename, open(input_file, 'rb').read()),
+ }
+ url = urljoin(api, 'upload')
+ resp = requests.post(url, headers=headers, data=data, files=files)
+ resp.raise_for_status()
+
+if os.path.exists(rootfs) and os.path.exists(initrd):
+ print("uploading rootfs to KernelCI")
+ upload_file(api, token, upload_path, rootfs, rootfs_filename)
+ print("uploading initrd to KernelCI")
+ upload_file(api, token, upload_path, initrd, initrd_gz_filename)
+ print("uploaded to: https://storage.kernelci.org"+upload_path)
+
+ # Upload latest
+ print("uploading rootfs to KernelCI CIP latest")
+ upload_file(api, token, upload_path_latest, rootfs, rootfs_filename)
+ print("uploading initrd to KernelCI CIP latest")
+ upload_file(api, token, upload_path_latest, initrd, initrd_gz_filename)
+ print("uploaded to: https://storage.kernelci.org"+upload_path_latest)
--
2.33.1


[isar-cip-core][PATCH 2/4] Add dmesg filter needed for lava test result

Alice Ferrazzi
 

KernelCI is using a dmesg filter script for checking dmesg
logs result with lava.
Adding the script to the cip-core-image-kernelci.

Signed-off-by: Alice Ferrazzi <alice.ferrazzi@...>
---
.../kernelci-customizations/files/dmesg.sh | 23 +++++++++++++++++++
.../kernelci-customizations.bb | 1 +
2 files changed, 24 insertions(+)
create mode 100644 recipes-core/kernelci-customizations/files/dmesg.sh

diff --git a/recipes-core/kernelci-customizations/files/dmesg.sh b/recipes-core/kernelci-customizations/files/dmesg.sh
new file mode 100644
index 0000000..3b096e1
--- /dev/null
+++ b/recipes-core/kernelci-customizations/files/dmesg.sh
@@ -0,0 +1,23 @@
+#!/bin/sh
+
+set -e
+
+if [ "$KERNELCI_LAVA" = "y" ]; then
+ alias test-result='lava-test-case'
+else
+ alias test-result='echo'
+fi
+
+for level in crit alert emerg; do
+ dmesg --level=$level --notime -x -k > dmesg.$level
+ test -s dmesg.$level && res=fail || res=pass
+ count=$(cat dmesg.$level | wc -l)
+ cat dmesg.$level
+ test-result \
+ $level \
+ --result $res \
+ --measurement $count \
+ --units lines
+done
+
+exit 0
diff --git a/recipes-core/kernelci-customizations/kernelci-customizations.bb b/recipes-core/kernelci-customizations/kernelci-customizations.bb
index dca0891..c3f677c 100644
--- a/recipes-core/kernelci-customizations/kernelci-customizations.bb
+++ b/recipes-core/kernelci-customizations/kernelci-customizations.bb
@@ -18,6 +18,7 @@ DESCRIPTION = "CIP Core image demo & customizations"
SRC_URI = " \
file://postinst \
file://ethernet \
+ file://dmesg.sh \
file://99-silent-printk.conf"

DEPENDS += "sshd-regen-keys"
--
2.33.1


[isar-cip-core][PATCH 1/4] Add cip-core-image-kernelci

Alice Ferrazzi
 

This image is currently used by KernelCI production for testing purpose.
The purpose of this image is that KernelCI need to be able to autologin
without password and to detect the login shell using special characters.
Currently added are the default settings used by KernelCI images.

Signed-off-by: Alice Ferrazzi <alice.ferrazzi@...>
---
kas/opt/kernelci.yml | 16 +++++++++
.../images/cip-core-image-kernelci.bb | 16 +++++++++
.../files/99-silent-printk.conf | 1 +
.../kernelci-customizations/files/ethernet | 23 +++++++++++++
.../kernelci-customizations/files/postinst | 34 +++++++++++++++++++
.../kernelci-customizations.bb | 34 +++++++++++++++++++
6 files changed, 124 insertions(+)
create mode 100644 kas/opt/kernelci.yml
create mode 100644 recipes-core/images/cip-core-image-kernelci.bb
create mode 100644 recipes-core/kernelci-customizations/files/99-silent-printk.conf
create mode 100644 recipes-core/kernelci-customizations/files/ethernet
create mode 100644 recipes-core/kernelci-customizations/files/postinst
create mode 100644 recipes-core/kernelci-customizations/kernelci-customizations.bb

diff --git a/kas/opt/kernelci.yml b/kas/opt/kernelci.yml
new file mode 100644
index 0000000..9c67864
--- /dev/null
+++ b/kas/opt/kernelci.yml
@@ -0,0 +1,16 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Toshiba Corporation, 2020
+# Copyright (c) Cybertrust Japan Co., Ltd., 2021
+#
+# Authors:
+# Venkata Pyla <venkata.pyla@...>
+# Alice Ferrazzi <alice.ferrazzi@...>
+#
+# SPDX-License-Identifier: MIT
+#
+header:
+ version: 10
+
+target: cip-core-image-kernelci
diff --git a/recipes-core/images/cip-core-image-kernelci.bb b/recipes-core/images/cip-core-image-kernelci.bb
new file mode 100644
index 0000000..479c14c
--- /dev/null
+++ b/recipes-core/images/cip-core-image-kernelci.bb
@@ -0,0 +1,16 @@
+#
+# A reference image for KernelCI
+#
+# Copyright (c) Cybertrust Japan Co., Ltd., 2021
+#
+# Authors:
+# Alice Ferrazzi <alice.ferrazzi@...>
+#
+# SPDX-License-Identifier: MIT
+#
+
+inherit image
+
+DESCRIPTION = "CIP Core image for KernelCI"
+
+IMAGE_INSTALL += "kernelci-customizations"
diff --git a/recipes-core/kernelci-customizations/files/99-silent-printk.conf b/recipes-core/kernelci-customizations/files/99-silent-printk.conf
new file mode 100644
index 0000000..ad24d3a
--- /dev/null
+++ b/recipes-core/kernelci-customizations/files/99-silent-printk.conf
@@ -0,0 +1 @@
+kernel.printk = 3 4 1 3
diff --git a/recipes-core/kernelci-customizations/files/ethernet b/recipes-core/kernelci-customizations/files/ethernet
new file mode 100644
index 0000000..fa47d1a
--- /dev/null
+++ b/recipes-core/kernelci-customizations/files/ethernet
@@ -0,0 +1,23 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Jan Kiszka <jan.kiszka@...>
+#
+# SPDX-License-Identifier: MIT
+#
+
+allow-hotplug eth0
+allow-hotplug enp0s2
+allow-hotplug enp2s0
+
+# used on BBB
+iface eth0 inet dhcp
+
+# used on qemu-amd64
+iface enp0s2 inet dhcp
+
+# used on simatic-ipc227e
+iface enp2s0 inet dhcp
diff --git a/recipes-core/kernelci-customizations/files/postinst b/recipes-core/kernelci-customizations/files/postinst
new file mode 100644
index 0000000..7ae30e8
--- /dev/null
+++ b/recipes-core/kernelci-customizations/files/postinst
@@ -0,0 +1,34 @@
+#!/bin/sh
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+# Copyright (c) Cybertrust Japan Co., Ltd., 2021
+#
+# Authors:
+# Jan Kiszka <jan.kiszka@...>
+# Alice Ferrazzi <alice.ferrazzi@...>
+#
+# SPDX-License-Identifier: MIT
+#
+
+echo "CIP Core Demo & Test Image" > /etc/issue
+
+# permit root login without password
+echo "PermitRootLogin yes" >> /etc/ssh/sshd_config
+echo "PermitEmptyPasswords yes" >> /etc/ssh/sshd_config
+passwd root -d
+
+# serial getty service for autologin
+mkdir -p /etc/systemd/system/serial-getty@.service.d/
+echo "[Service]" > /etc/systemd/system/serial-getty@.service.d/override.conf
+echo "ExecStart=" >> /etc/systemd/system/serial-getty@.service.d/override.conf
+echo "ExecStart=-/sbin/agetty --autologin root --keep-baud 115200,38400,9600 %I $TERM" >> /etc/systemd/system/serial-getty@.service.d/override.conf
+
+# set the profile for KernelCI
+echo "PS1='\$(pwd) # '" > /root/.profile
+echo "cd /" >> /root/.profile
+
+HOSTNAME=demo
+echo "$HOSTNAME" > /etc/hostname
+echo "127.0.0.1 $HOSTNAME" >> /etc/hosts
diff --git a/recipes-core/kernelci-customizations/kernelci-customizations.bb b/recipes-core/kernelci-customizations/kernelci-customizations.bb
new file mode 100644
index 0000000..dca0891
--- /dev/null
+++ b/recipes-core/kernelci-customizations/kernelci-customizations.bb
@@ -0,0 +1,34 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+# Copyright (c) Cybertrust Japan Co., Ltd., 2021
+#
+# Authors:
+# Jan Kiszka <jan.kiszka@...>
+# Alice Ferrazzi <alice.ferrazzi@...>
+#
+# SPDX-License-Identifier: MIT
+#
+
+inherit dpkg-raw
+
+DESCRIPTION = "CIP Core image demo & customizations"
+
+SRC_URI = " \
+ file://postinst \
+ file://ethernet \
+ file://99-silent-printk.conf"
+
+DEPENDS += "sshd-regen-keys"
+
+DEBIAN_DEPENDS = " \
+ ifupdown, isc-dhcp-client, net-tools, iputils-ping, ssh, sshd-regen-keys"
+
+do_install() {
+ install -v -d ${D}/etc/network/interfaces.d
+ install -v -m 644 ${WORKDIR}/ethernet ${D}/etc/network/interfaces.d/
+
+ install -v -d ${D}/etc/sysctl.d
+ install -v -m 644 ${WORKDIR}/99-silent-printk.conf ${D}/etc/sysctl.d/
+}
--
2.33.1


[isar-cip-core][PATCH 0/4] Add cip-core-image-kernelci building and uploading system

Alice Ferrazzi
 

This patch series add a new image with settings for
KernelCI.

This new image is called cip-core-image-kernelci and is
based on isar-cip-core general image with some changes
needed for make it work with KernelCI and taken from
KernelCI image base settings.
The cip-core-image-kernelci images are built by GitlabCI
and uploaded to KernelCI production fileserver.
https://storage.kernelci.org/images/rootfs/cip/

These patches are already integrated in the
isar-cip-core:alicef/kernelci_master_refactor repository branch
and are generating the images that are currently
used by KernelCI.

cip-core-image-kernelci as been tested and are
already used in KernelCI production with good results.
https://linux.kernelci.org/test/job/stable-rc/branch/queue%2F5.14/kernel/v5.14.17-9-g9f7eecaa70b3/plan/baseline-cip-nfs/

Alice Ferrazzi (4):
Add cip-core-image-kernelci
Add dmesg filter needed for lava test result
Add script deploy-kernelci.py for upload the cip-core-image-kernelci
enable cip-core-image-kernelci

.gitlab-ci.yml | 40 +++++++++++++-
kas/opt/kernelci.yml | 16 ++++++
.../images/cip-core-image-kernelci.bb | 16 ++++++
.../files/99-silent-printk.conf | 1 +
.../kernelci-customizations/files/dmesg.sh | 23 ++++++++
.../kernelci-customizations/files/ethernet | 23 ++++++++
.../kernelci-customizations/files/postinst | 34 ++++++++++++
.../kernelci-customizations.bb | 35 ++++++++++++
scripts/deploy-kernelci.py | 55 +++++++++++++++++++
9 files changed, 242 insertions(+), 1 deletion(-)
create mode 100644 kas/opt/kernelci.yml
create mode 100644 recipes-core/images/cip-core-image-kernelci.bb
create mode 100644 recipes-core/kernelci-customizations/files/99-silent-printk.conf
create mode 100644 recipes-core/kernelci-customizations/files/dmesg.sh
create mode 100644 recipes-core/kernelci-customizations/files/ethernet
create mode 100644 recipes-core/kernelci-customizations/files/postinst
create mode 100644 recipes-core/kernelci-customizations/kernelci-customizations.bb
create mode 100755 scripts/deploy-kernelci.py

--
2.33.1


Re: [PATCH 5.10.y-cip 00/31] Add sound/adc support for RZ/G2L

Lad Prabhakar
 

Hi Pavel,

-----Original Message-----
From: cip-dev@... <cip-dev@...> On Behalf Of Lad Prabhakar via
lists.cip-project.org
Sent: 29 December 2021 10:15
To: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>
Cc: Biju Das <biju.das.jz@...>
Subject: [cip-dev] [PATCH 5.10.y-cip 00/31] Add sound/adc support for RZ/G2L

Hi All,

This patch series adds Sound and ADC support for Renesas RZ/G2L SoC and enables RIIC/SOUND/CANFD/ADC
on Renesas SMARC EVK.

I have also included the missing driver patch for riic and kernel configs.

All the patches have been cherry picked from v5.16-rc7.
Do you want me to separate out audio related patches and just send the ADC for now until the audio patch comments are resolved/fixed?

Cheers,
Prabhakar

I have created a MR [0] for cip-kernel-config to support build testing and can be merged once this
patch series is accepted.

[0] https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.com%2Fcip-project%2Fcip-
kernel%2Fcip-kernel-config%2F-%2Fmerge_requests%2F55&amp;data=04%7C01%7Cprabhakar.mahadev-
lad.rj%40bp.renesas.com%7C448a426ec06a400fd7ee08d9cab42a09%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%
7C637763697420828810%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
CI6Mn0%3D%7C3000&amp;sdata=T6OVaoV3tgK9UsAYD7ZeT%2FwjVctGGJM3Hja2V%2BBd5mU%3D&amp;reserved=0

Cheers,
Prabhakar

Biju Das (21):
ASoC: dt-bindings: Document RZ/G2L bindings
ASoC: dt-bindings: sound: renesas,rz-ssi: Document DMA support
ASoC: sh: Add RZ/G2L SSIF-2 driver
ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel
configuration parameter
ASoC: sh: rz-ssi: Add SSI DMAC support
ASoC: sh: rz-ssi: Fix dereference of noderef expression warning
ASoC: sh: rz-ssi: Fix wrong operator used issue
ASoC: sh: rz-ssi: Improve error handling in rz_ssi_dma_request
function
clk: renesas: r9a07g044: Add SSIF-2 clock and reset entries
arm64: dts: renesas: r9a07g044: Add external audio clock nodes
arm64: dts: renesas: r9a07g044: Add SSI support
arm64: dts: renesas: r9a07g044: Add DMA support to SSI
arm64: dts: renesas: rzg2l-smarc: Enable I2C{0,1,3} support
arm64: dts: renesas: rzg2l-smarc: Add WM8978 sound codec
arm64: dts: renesas: rzg2l-smarc: Enable audio
arm64: dts: renesas: rzg2l-smarc: Add Mic routing
arm64: defconfig: Enable SOUND_SOC_RZ
arm64: defconfig: Enable SND_SOC_WM8978
clk: renesas: r9a07g044: Mark IA55_CLK and DMAC_ACLK critical
i2c: riic: Add RZ/G2L support
arm64: defconfig: Enable RIIC

Colin Ian King (1):
iio: adc: rzg2l_adc: Fix -EBUSY timeout error return

Lad Prabhakar (8):
dt-bindings: iio: adc: Add binding documentation for Renesas RZ/G2L
A/D converter
iio: adc: Add driver for Renesas RZ/G2L A/D converter
clk: renesas: r9a07g044: Add clock and reset entries for ADC
arm64: dts: renesas: r9a07g044: Add ADC node
arm64: dts: renesas: rzg2l-smarc-som: Move extal and memory nodes to
SOM DTSI
arm64: dts: renesas: rzg2l-smarc-som: Enable ADC on SMARC platform
arm64: dts: renesas: rzg2l-smarc: Enable CANFD
arm64: defconfig: Enable RZG2L_ADC

Yang Yingliang (1):
iio: adc: rzg2l_adc: add missing clk_disable_unprepare() in
rzg2l_adc_pm_runtime_resume()

.../bindings/iio/adc/renesas,rzg2l-adc.yaml | 134 ++
.../bindings/sound/renesas,rz-ssi.yaml | 118 ++
MAINTAINERS | 8 +
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 140 +++
.../boot/dts/renesas/r9a07g044l2-smarc.dts | 7 +-
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 35 +
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 162 ++-
arch/arm64/configs/defconfig | 4 +
drivers/clk/renesas/r9a07g044-cpg.c | 28 +
drivers/i2c/busses/i2c-riic.c | 23 +-
drivers/iio/adc/Kconfig | 10 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/rzg2l_adc.c | 591 +++++++++
sound/soc/sh/Kconfig | 6 +
sound/soc/sh/Makefile | 4 +
sound/soc/sh/rz-ssi.c | 1074 +++++++++++++++++
16 files changed, 2334 insertions(+), 11 deletions(-) create mode 100644
Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
create mode 100644 Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
create mode 100644 drivers/iio/adc/rzg2l_adc.c create mode 100644 sound/soc/sh/rz-ssi.c

--
2.17.1


CIP IRC weekly meeting today on libera.chat External

Jan Kiszka
 

Hi all,

Kindly be reminded to attend the weekly meeting through IRC to discuss
technical topics with CIP kernel today. Our channel is the following:

irc:irc.libera.chat:6667/cip

The IRC meeting is scheduled to UTC (GMT) 13:00:

https://www.timeanddate.com/worldclock/meetingdetails.html?year=2022&month=1&day=6&hour=13&min=0&sec=0&p1=224&p2=179&p3=136&p4=37&p5=241&p6=248

USWest USEast UK DE TW JP
06:00 09:00 13:00 14:00 21:00 22:00

Last meeting minutes:
https://irclogs.baserock.org/meetings/cip/2021/12/cip.2021-12-23-13.00.log.html

* Action items
1. Review / integrate kernelci patches into isar-cip-core - jan
2. Propose tweet on KernelCI-CIP collaboration progress - alicef
3. Clarify with KernelCI whether CIP maintainers can get accounts - alicef
* Kernel maintenance updates
* Kernel testing
* AOB

Jan


New CVE entries this week.

Masami Ichikawa
 

Hi !

It's this week's CVE report.

This week reported 1 new CVE.

* New CVEs

CVE-2021-4197: cgroup: Use open-time creds and namespace for migration
perm checks

CVSS v3 score is not provided

A local attacker could escalate privileges for the containers or other
processes that uses cgroups
Patch series is available
(https://lore.kernel.org/lkml/20211209214707.805617-1-tj@kernel.org/T/)
but it hasn't been merged into the mainline yet.

Fixed status

Not fixed yet.

* Updated CVEs

CVE-2021-44733: tee: handle lookup of shm with reference count 0

This CVE was introduced by commit 967c9cc ("tee: generic TEE
subsystem") at 4.12-rc1. so 4.4 isn't affected this issue.

Fixed status

mainline: [dfd0743f1d9ea76931510ed150334d571fbab49d]
stable/4.14: [3d556a28bbfe34a80b014db49908b0f1bcb1ae80]
stable/4.19: [b4a661b4212b8fac8853ec3b68e4a909dccc88a1]
stable/5.10: [c05d8f66ec3470e5212c4d08c46d6cb5738d600d]
stable/5.15: [492eb7afe858d60408b2da09adc78540c4d16543]
stable/5.4: [940e68e57ab69248fabba5889e615305789db8a7]

CVE-2021-45100: ksmbd: disable SMB2_GLOBAL_CAP_ENCRYPTION for SMB 3.1.1

This CVE was introduced by commit e2f3448 ("cifsd: add server-side
procedures for SMB3") which was merged at 5.15-rc1. so before 5.15
kernels are not affected.

Fixed status

mainline: [83912d6d55be10d65b5268d1871168b9ebe1ec4b]
stable/5.15: [a2c144d17623984fdafa4634ecf4ab64580d29bb]

CVE-2021-45469: f2fs: fix to do sanity check on last xattr entry in
__f2fs_setxattr()

The mainline hasn't been fixed yet.

Fixed status

stable/4.14: [88dedecc24763c2e0bc1e8eeb35f9f2cd785a7e5]
stable/4.19: [f9dfa44be0fb5e8426183a70f69a246cf5827f49]
stable/5.10: [fffb6581a23add416239dfcf7e7f3980c6b913da]
stable/5.15: [a8a9d753edd7f71e6a2edaa580d8182530b68791]
stable/5.4: [b0406b5ef4e2c4fb21d9e7d5c36a0453b4279e9b]

Currently tracking CVEs

CVE-2021-31615: Unencrypted Bluetooth Low Energy baseband links in
Bluetooth Core Specifications 4.0 through 5.2

There is no fix information.

CVE-2020-26555: BR/EDR pin code pairing broken

No fix information

CVE-2020-26556: kernel: malleable commitment Bluetooth Mesh Provisioning

No fix information.

CVE-2020-26557: kernel: predictable Authvalue in Bluetooth Mesh
Provisioning Leads to MITM

No fix information.

CVE-2020-26559: kernel: Authvalue leak in Bluetooth Mesh Provisioning

No fix information.

CVE-2020-26560: kernel: impersonation attack in Bluetooth Mesh Provisioning

No fix information.


Regards,
--
Masami Ichikawa
Cybertrust Japan Co., Ltd.

Email :masami.ichikawa@...
:masami.ichikawa@...


Re: [PATCH 5.10.y-cip 20/22] dmaengine: sh: make array ds_lut static

Biju Das <biju.das.jz@...>
 

Hi Pavel,

Subject: Re: [PATCH 5.10.y-cip 20/22] dmaengine: sh: make array ds_lut
static

Hi!

commit 4c0eee50658746b0333d35a75d3db6e0aac08ef9 upstream.

Don't populate the read-only array ds_lut on the stack but instead it
static. Also makes the object code smaller by 163 bytes:

Before:
text data bss dec hex filename
23508 4796 0 28304 6e90 ./drivers/dma/sh/rz-dmac.o

After:
text data bss dec hex filename
23281 4860 0 28141 6ded ./drivers/dma/sh/rz-dmac.o
Heh.

@@ -574,7 +574,7 @@ static void rz_dmac_issue_pending(struct dma_chan
*chan) static u8 rz_dmac_ds_to_val_mapping(enum dma_slave_buswidth
ds) {
u8 i;
- const enum dma_slave_buswidth ds_lut[] = {
+ static const enum dma_slave_buswidth ds_lut[] = {
DMA_SLAVE_BUSWIDTH_1_BYTE,
DMA_SLAVE_BUSWIDTH_2_BYTES,
DMA_SLAVE_BUSWIDTH_4_BYTES,
Array could be avoided altogether; you could check for power of two and
then count bits. That would give even shorter code, but I'm not sure about
readability.

I'd also not mind using usual convention here: return int, >= 0 success, <
0 errno.
Readability is ok with current implementation and moreover it is faster.

Otherwise, you need to check whether it is power of 2, then do count bits to make sure it is bounded between
DMA_SLAVE_BUSWIDTH_1_BYTE and DMA_SLAVE_BUSWIDTH_128_BYTES and then return the index.

Regards,
Biju


Re: [PATCH 5.10.y-cip 04/31] ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel configuration parameter

Biju Das <biju.das.jz@...>
 

Hi Pavel,

Subject: Re: [PATCH 5.10.y-cip 04/31] ASoC: dt-bindings: renesas,rz-ssi:
Update slave dma channel configuration parameter

Hi!

From: Biju Das <biju.das.jz@...>

commit bed0b1c1e88a27b76c74584128cadebc6fa58622 upstream.

The DMAC on RZ/G2L has specific slave channel configuration parameters
for SSI.
This patch updates the dmas description and example node to include
the encoded slave channel configuration.
+++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
@@ -48,6 +48,24 @@ properties:
dmas:
minItems: 1
maxItems: 2
+ description:
+ The first cell represents a phandle to dmac
+ The second cell specifies the encoded MID/RID values of the SSI
port
+ connected to the DMA client and the slave channel configuration
+ parameters.
+ bits[0:9] - Specifies MID/RID value of a SSI channel as below
+ MID/RID value of SSI rx0 = 0x256
+ MID/RID value of SSI tx0 = 0x255
+ MID/RID value of SSI rx1 = 0x25a
+ MID/RID value of SSI tx1 = 0x259
+ MID/RID value of SSI rt2 = 0x25f
+ MID/RID value of SSI rx3 = 0x262
+ MID/RID value of SSI tx3 = 0x261
+ bit[10] - HIEN = 1, Detects a request in response to the
rising edge
+ of the signal
+ bit[11] - LVL = 0, Detects based on the edge
+ bits[12:14] - AM = 2, Bus cycle mode
+ bit[15] - TM = 0, Single transfer mode
I wish there was better solution to this. Device tree sources are quite
human-readable, this really is not.
Can you please suggest the better solution?

Cheers,
Biju


Re: New CVE entries in this week

Masami Ichikawa
 

Hi !

On Thu, Dec 30, 2021 at 7:20 PM Pavel Machek <pavel@...> wrote:

Hi!

CVE-2021-45469: f2fs: fix to do sanity check on last xattr entry in
__f2fs_setxattr()

CVSS v3 score is not provided

OOB access bug in __f2fs_setxattr().

Although it is fixed in stable trees, the patch isn't merged in the
mainline yet at 2021/12/30. The commit 5598b24 ("f2fs: fix to do
sanity check on last xattr entry in __f2fs_setxattr()") is in
https://git.kernel.org/pub/scm/linux/kernel/git/chao/linux.git/commit/?h=dev&id=5598b24efaf4892741c798b425d543e4bed357a1
but not in the mainline.
Interesting. That's wrong and unusual for stable tree.

CVE-2021-45480: rds: memory leak in __rds_conn_create()

CVSS v3 score is not provided

This bug was introdued by commit aced3ce57cd3 ("RDS tcp loopback
connection can hang") which was merged at 5.13-rc4.
It was also merged in 4.19-stable as 0a3158ac5999fe. That's why we see
4.19 tree needing the fix. 4.4 is not affected. Good.
Thank you for the information.

mainline: [5f9562ebe710c307adc5f666bf1a2162ee7977c0]
stable/4.19: [1ed173726c1a0082e9d77c7d5a85411e85bdd983]
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Regards,
--
/**
* Masami Ichikawa
* personal: masami256@...
* fedora project: masami@...
*/


Re: [PATCH 5.10.y-cip 03/31] ASoC: sh: Add RZ/G2L SSIF-2 driver

Pavel Machek
 

Hi!

+static int rz_ssi_pio_send(struct rz_ssi_priv *ssi, struct
+rz_ssi_stream *strm) {
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ int sample_space;
+ int samples = 0;
+ int frames_left;
+ int i;
+ u32 ssifsr;
+ u16 *buf;
+
+ if (!rz_ssi_stream_is_valid(ssi, strm))
+ return -EINVAL;
Access without locking before verifying that stream is valid with the lock. This is wrong.
rz_ssi_stream_is_valid() does lock/unlock to check stream validity.
Yes, but "struct snd_pcm_runtime *runtime = substream->runtime" above
already accessed that data without locking.

+static int rz_ssi_probe(struct platform_device *pdev) {
...
+ /* Error Interrupt */
+ ssi->irq_int = platform_get_irq_byname(pdev, "int_req");
+ if (ssi->irq_int < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI int_req IRQ\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_int, &rz_ssi_interrupt,
+ 0, dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (int_req)\n");
+
+ /* Tx and Rx interrupts (pio only) */
+ ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
+ if (ssi->irq_tx < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI dma_tx IRQ\n");
...

So you registered interrupt handlers...

+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_tx, &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_tx)\n");
+
+ ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
+ if (ssi->irq_rx < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI dma_rx IRQ\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_rx, &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_rx)\n");
+
+ ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(ssi->rstc))
+ return PTR_ERR(ssi->rstc);
+
+ reset_control_deassert(ssi->rstc);
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_resume_and_get(&pdev->dev);
+
+ spin_lock_init(&ssi->lock);
+ dev_set_drvdata(&pdev->dev, ssi);
But only here you have data structures ready to handle the interrupts. You won't see obvious problems
w/o shared interrupts, but I believe there are debugging modes that trigger this intentionally.
But the devm_snd_soc_register_component() is after this so it should be OK I believe unless there is a spurious interrupt which will trigger the handler.
I believe your code will do fine in usual configurations. But
reordering it should be quite easy, and there are kernel options like
"irqpoll", "irqfixup" and CONFIG_DEBUG_SHIRQ.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 03/31] ASoC: sh: Add RZ/G2L SSIF-2 driver

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 30 December 2021 11:15
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 03/31] ASoC: sh: Add RZ/G2L SSIF-2 driver

Hi!

From: Biju Das <biju.das.jz@...>

commit 03e786bd43410fa93e5d2459f7a43e90ff0ae801 upstream.

Add serial sound interface(SSIF-2) driver support for RZ/G2L SoC.

Based on the work done by Chris Brandt for RZ/A SSI driver.
I'm not sure what the locking rules are here.

--- /dev/null
+++ b/sound/soc/sh/rz-ssi.c
+static int rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
+ struct rz_ssi_stream *strm)
+{
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&ssi->lock, flags);
+ ret = !!(strm->substream && strm->substream->runtime);
+ spin_unlock_irqrestore(&ssi->lock, flags);
+
+ return ret;
+}
Nit: I don't think !!() is useful here, as it is boolean expression anyway.
Agreed can be dropped.

But I notice that code is very careful to access strm->substream with spinlock held.
...
+static void rz_ssi_pointer_update(struct rz_ssi_stream *strm, int
+frames) {
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime;
+ int current_period;
+
+ if (!strm->running || !substream || !substream->runtime)
+ return;
But here we do same checks, and this time without the spinlock?
... agree we need to lock...
+static int rz_ssi_pio_recv(struct rz_ssi_priv *ssi, struct
+rz_ssi_stream *strm) {
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime;
+ u16 *buf;
+ int fifo_samples;
+ int frames_left;
+ int samples = 0;
+ int i;
+
+ if (!rz_ssi_stream_is_valid(ssi, strm))
+ return -EINVAL;
+
+ runtime = substream->runtime;
Again, access without locking.
... and here too.

+ /*
+ * If we finished this period, but there are more samples in
+ * the RX FIFO, call this function again
+ */
+ if (frames_left == 0 && fifo_samples >= runtime->channels)
+ rz_ssi_pio_recv(ssi, strm);
Here we call ourselves recurively. Without checking the return value.. but more importantly recursion
is unwelcome in kernel due to limited stack use.

Agreed, this needs to be handled differently with recursion removed.

+static int rz_ssi_pio_send(struct rz_ssi_priv *ssi, struct
+rz_ssi_stream *strm) {
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ int sample_space;
+ int samples = 0;
+ int frames_left;
+ int i;
+ u32 ssifsr;
+ u16 *buf;
+
+ if (!rz_ssi_stream_is_valid(ssi, strm))
+ return -EINVAL;
Access without locking before verifying that stream is valid with the lock. This is wrong.
rz_ssi_stream_is_valid() does lock/unlock to check stream validity.

+static irqreturn_t rz_ssi_interrupt(int irq, void *data) {
+ struct rz_ssi_stream *strm = NULL;
+ struct rz_ssi_priv *ssi = data;
+ u32 ssisr = rz_ssi_reg_readl(ssi, SSISR);
+
+ if (ssi->playback.substream)
+ strm = &ssi->playback;
+ else if (ssi->capture.substream)
+ strm = &ssi->capture;
+ else
+ return IRQ_HANDLED; /* Left over TX/RX interrupt */
You mark interrupt as handled even when it is not. Probably not a problem w/o shared interrupts.
ATM the interrupts aren't shared so this should be OK.

+static int rz_ssi_probe(struct platform_device *pdev) {
...
+ /* Error Interrupt */
+ ssi->irq_int = platform_get_irq_byname(pdev, "int_req");
+ if (ssi->irq_int < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI int_req IRQ\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_int, &rz_ssi_interrupt,
+ 0, dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (int_req)\n");
+
+ /* Tx and Rx interrupts (pio only) */
+ ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
+ if (ssi->irq_tx < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI dma_tx IRQ\n");
...

So you registered interrupt handlers...

+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_tx, &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_tx)\n");
+
+ ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
+ if (ssi->irq_rx < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI dma_rx IRQ\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_rx, &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_rx)\n");
+
+ ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(ssi->rstc))
+ return PTR_ERR(ssi->rstc);
+
+ reset_control_deassert(ssi->rstc);
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_resume_and_get(&pdev->dev);
+
+ spin_lock_init(&ssi->lock);
+ dev_set_drvdata(&pdev->dev, ssi);
But only here you have data structures ready to handle the interrupts. You won't see obvious problems
w/o shared interrupts, but I believe there are debugging modes that trigger this intentionally.
But the devm_snd_soc_register_component() is after this so it should be OK I believe unless there is a spurious interrupt which will trigger the handler.

Cheers,
Prabhakar


Re: [PATCH 5.10.y-cip 21/31] arm64: dts: renesas: rzg2l-smarc: Enable audio

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 30 December 2021 11:02
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 21/31] arm64: dts: renesas: rzg2l-smarc: Enable audio

Hi!

From: Biju Das <biju.das.jz@...>

commit e396d6103343ff95874444bd8a67f031eafe0e38 upstream.

Enable audio on RZ/G2L SMARC EVK by linking SSI0 with WM8978 audio
CODEC.
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -8,6 +8,19 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

+/*
+ * SSI-WM8978
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer cset name='Left Input Mixer L2 Switch' on
+ * amixer cset name='Right Input Mixer R2 Switch' on
+ * amixer cset name='Headphone Playback Volume' 100
+ * amixer cset name='PCM Volume' 100%
+ * amixer cset name='Input PGA Volume' 25
"These commands are required for Playback/Capture".
Will fix that.

@@ -30,6 +66,14 @@
};
};

+&audio_clk1{
+ clock-frequency = <11289600>;
+};
+
+&audio_clk2{
+ clock-frequency = <12288000>;
+};
+
I'd expect spaces before {. (And yes, I'm picking nits here).
Ditto.


Cheers,
Prabhakar


Re: [PATCH 5.10.y-cip 10/31] iio: adc: Add driver for Renesas RZ/G2L A/D converter

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 30 December 2021 11:01
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 10/31] iio: adc: Add driver for Renesas RZ/G2L A/D converter

Hi!

commit d484c21bacfa8bd2fa9fc26393ec59108f508c4c upstream.

Add ADC driver support for Renesas RZ/G2L A/D converter in SW trigger
mode.

A/D Converter block is a successive approximation analog-to-digital
converter with a 12-bit accuracy and supports a maximum of 8 input
channels.

new file mode 100644
index 000000000000..919108d798ba
--- /dev/null
+++ b/drivers/iio/adc/rzg2l_adc.c
...
+
+#define RZG2L_ADSMP_DEFUALT_SAMPLING 0x578
+
This should be "DEFAULT".
Agreed.

+ do {
+ usleep_range(100, 200);
+ reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));
+ timeout--;
+ if (!timeout) {
+ pr_err("%s stopping ADC timed out\n", __func__);
+ break;
+ }
+ } while (((reg & RZG2L_ADM0_ADBSY) || (reg & RZG2L_ADM0_ADCE))); }
I'd write this as (reg & (RZG2L_ADM0_ADBSY | RZG2L_ADM0_ADCE)). Note that we wait, then check for
timeout without using the register values. Which is strange and basically makes timeout one tick
lower. (But probably does not matter much).
Agreed.

+static void rzg2l_set_trigger(struct rzg2l_adc *adc) {
+ u32 reg;
+
+ /*
+ * Setup ADM1 for SW trigger
+ * EGA[13:12] - Set 00 to indicate hardware trigger is invalid
+ * BS[4] - Enable 1-buffer mode
+ * MS[1] - Enable Select mode
+ * TRG[0] - Enable software trigger mode
+ */
+ reg = rzg2l_adc_readl(adc, RZG2L_ADM(1));
+ reg &= ~RZG2L_ADM1_EGA_MASK;
+ reg &= ~RZG2L_ADM1_BS;
+ reg &= ~RZG2L_ADM1_TRG;
reg &= ~(RZG2L_ADM1_EGA_MASK | RZG2L_ADM1_BS | ...) would be usual way to write this. You can use it
in more than one place in the file.
Agreed.

Cheers,
Prabhakar


Re: [PATCH 5.10.y-cip 04/31] ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel configuration parameter

Lad Prabhakar
 

Hi Pavel,

Thank you for the review.

-----Original Message-----
From: Pavel Machek <pavel@...>
Sent: 30 December 2021 10:55
To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...>
Cc: cip-dev@...; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>; Biju Das <biju.das.jz@...>
Subject: Re: [PATCH 5.10.y-cip 04/31] ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel
configuration parameter

Hi!

From: Biju Das <biju.das.jz@...>

commit bed0b1c1e88a27b76c74584128cadebc6fa58622 upstream.

The DMAC on RZ/G2L has specific slave channel configuration parameters
for SSI.
This patch updates the dmas description and example node to include
the encoded slave channel configuration.
+++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
@@ -48,6 +48,24 @@ properties:
dmas:
minItems: 1
maxItems: 2
+ description:
+ The first cell represents a phandle to dmac
+ The second cell specifies the encoded MID/RID values of the SSI port
+ connected to the DMA client and the slave channel configuration
+ parameters.
+ bits[0:9] - Specifies MID/RID value of a SSI channel as below
+ MID/RID value of SSI rx0 = 0x256
+ MID/RID value of SSI tx0 = 0x255
+ MID/RID value of SSI rx1 = 0x25a
+ MID/RID value of SSI tx1 = 0x259
+ MID/RID value of SSI rt2 = 0x25f
+ MID/RID value of SSI rx3 = 0x262
+ MID/RID value of SSI tx3 = 0x261
+ bit[10] - HIEN = 1, Detects a request in response to the rising edge
+ of the signal
+ bit[11] - LVL = 0, Detects based on the edge
+ bits[12:14] - AM = 2, Bus cycle mode
+ bit[15] - TM = 0, Single transfer mode
I wish there was better solution to this. Device tree sources are quite human-readable, this really is
not.
Do agree!

Cheers,
Prabhakar


Re: [PATCH 5.10.y-cip 03/31] ASoC: sh: Add RZ/G2L SSIF-2 driver

Pavel Machek
 

Hi!

From: Biju Das <biju.das.jz@...>

commit 03e786bd43410fa93e5d2459f7a43e90ff0ae801 upstream.

Add serial sound interface(SSIF-2) driver support for
RZ/G2L SoC.

Based on the work done by Chris Brandt for RZ/A SSI driver.
I'm not sure what the locking rules are here.

--- /dev/null
+++ b/sound/soc/sh/rz-ssi.c
+static int rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
+ struct rz_ssi_stream *strm)
+{
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&ssi->lock, flags);
+ ret = !!(strm->substream && strm->substream->runtime);
+ spin_unlock_irqrestore(&ssi->lock, flags);
+
+ return ret;
+}
Nit: I don't think !!() is useful here, as it is boolean expression
anyway.

But I notice that code is very careful to access strm->substream with
spinlock held.

+static void rz_ssi_pointer_update(struct rz_ssi_stream *strm, int frames)
+{
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime;
+ int current_period;
+
+ if (!strm->running || !substream || !substream->runtime)
+ return;
But here we do same checks, and this time without the spinlock?

+static int rz_ssi_pio_recv(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
+{
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime;
+ u16 *buf;
+ int fifo_samples;
+ int frames_left;
+ int samples = 0;
+ int i;
+
+ if (!rz_ssi_stream_is_valid(ssi, strm))
+ return -EINVAL;
+
+ runtime = substream->runtime;
Again, access without locking.

+ /*
+ * If we finished this period, but there are more samples in
+ * the RX FIFO, call this function again
+ */
+ if (frames_left == 0 && fifo_samples >= runtime->channels)
+ rz_ssi_pio_recv(ssi, strm);
Here we call ourselves recurively. Without checking the return
value.. but more importantly recursion is unwelcome in kernel due to
limited stack use.


+static int rz_ssi_pio_send(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
+{
+ struct snd_pcm_substream *substream = strm->substream;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ int sample_space;
+ int samples = 0;
+ int frames_left;
+ int i;
+ u32 ssifsr;
+ u16 *buf;
+
+ if (!rz_ssi_stream_is_valid(ssi, strm))
+ return -EINVAL;
Access without locking before verifying that stream is valid with the
lock. This is wrong.

+static irqreturn_t rz_ssi_interrupt(int irq, void *data)
+{
+ struct rz_ssi_stream *strm = NULL;
+ struct rz_ssi_priv *ssi = data;
+ u32 ssisr = rz_ssi_reg_readl(ssi, SSISR);
+
+ if (ssi->playback.substream)
+ strm = &ssi->playback;
+ else if (ssi->capture.substream)
+ strm = &ssi->capture;
+ else
+ return IRQ_HANDLED; /* Left over TX/RX interrupt */
You mark interrupt as handled even when it is not. Probably not a
problem w/o shared interrupts.

+static int rz_ssi_probe(struct platform_device *pdev)
+{
...
+ /* Error Interrupt */
+ ssi->irq_int = platform_get_irq_byname(pdev, "int_req");
+ if (ssi->irq_int < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI int_req IRQ\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_int, &rz_ssi_interrupt,
+ 0, dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (int_req)\n");
+
+ /* Tx and Rx interrupts (pio only) */
+ ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
+ if (ssi->irq_tx < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI dma_tx IRQ\n");
...

So you registered interrupt handlers...

+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_tx, &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_tx)\n");
+
+ ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
+ if (ssi->irq_rx < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV,
+ "Unable to get SSI dma_rx IRQ\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_rx, &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_rx)\n");
+
+ ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(ssi->rstc))
+ return PTR_ERR(ssi->rstc);
+
+ reset_control_deassert(ssi->rstc);
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_resume_and_get(&pdev->dev);
+
+ spin_lock_init(&ssi->lock);
+ dev_set_drvdata(&pdev->dev, ssi);
But only here you have data structures ready to handle the
interrupts. You won't see obvious problems w/o shared interrupts, but
I believe there are debugging modes that trigger this intentionally.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 21/31] arm64: dts: renesas: rzg2l-smarc: Enable audio

Pavel Machek
 

Hi!

From: Biju Das <biju.das.jz@...>

commit e396d6103343ff95874444bd8a67f031eafe0e38 upstream.

Enable audio on RZ/G2L SMARC EVK by linking SSI0 with WM8978
audio CODEC.
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -8,6 +8,19 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

+/*
+ * SSI-WM8978
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer cset name='Left Input Mixer L2 Switch' on
+ * amixer cset name='Right Input Mixer R2 Switch' on
+ * amixer cset name='Headphone Playback Volume' 100
+ * amixer cset name='PCM Volume' 100%
+ * amixer cset name='Input PGA Volume' 25
"These commands are required for Playback/Capture".

@@ -30,6 +66,14 @@
};
};

+&audio_clk1{
+ clock-frequency = <11289600>;
+};
+
+&audio_clk2{
+ clock-frequency = <12288000>;
+};
+
I'd expect spaces before {. (And yes, I'm picking nits here).

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 10/31] iio: adc: Add driver for Renesas RZ/G2L A/D converter

Pavel Machek
 

Hi!

commit d484c21bacfa8bd2fa9fc26393ec59108f508c4c upstream.

Add ADC driver support for Renesas RZ/G2L A/D converter in SW
trigger mode.

A/D Converter block is a successive approximation analog-to-digital
converter with a 12-bit accuracy and supports a maximum of 8 input
channels.

new file mode 100644
index 000000000000..919108d798ba
--- /dev/null
+++ b/drivers/iio/adc/rzg2l_adc.c
...
+
+#define RZG2L_ADSMP_DEFUALT_SAMPLING 0x578
+
This should be "DEFAULT".

+ do {
+ usleep_range(100, 200);
+ reg = rzg2l_adc_readl(adc, RZG2L_ADM(0));
+ timeout--;
+ if (!timeout) {
+ pr_err("%s stopping ADC timed out\n", __func__);
+ break;
+ }
+ } while (((reg & RZG2L_ADM0_ADBSY) || (reg & RZG2L_ADM0_ADCE)));
+}
I'd write this as (reg & (RZG2L_ADM0_ADBSY | RZG2L_ADM0_ADCE)). Note
that we wait, then check for timeout without using the register
values. Which is strange and basically makes timeout one tick
lower. (But probably does not matter much).

+static void rzg2l_set_trigger(struct rzg2l_adc *adc)
+{
+ u32 reg;
+
+ /*
+ * Setup ADM1 for SW trigger
+ * EGA[13:12] - Set 00 to indicate hardware trigger is invalid
+ * BS[4] - Enable 1-buffer mode
+ * MS[1] - Enable Select mode
+ * TRG[0] - Enable software trigger mode
+ */
+ reg = rzg2l_adc_readl(adc, RZG2L_ADM(1));
+ reg &= ~RZG2L_ADM1_EGA_MASK;
+ reg &= ~RZG2L_ADM1_BS;
+ reg &= ~RZG2L_ADM1_TRG;
reg &= ~(RZG2L_ADM1_EGA_MASK | RZG2L_ADM1_BS | ...) would be usual way
to write this. You can use it in more than one place in the file.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 5.10.y-cip 04/31] ASoC: dt-bindings: renesas,rz-ssi: Update slave dma channel configuration parameter

Pavel Machek
 

Hi!

From: Biju Das <biju.das.jz@...>

commit bed0b1c1e88a27b76c74584128cadebc6fa58622 upstream.

The DMAC on RZ/G2L has specific slave channel configuration
parameters for SSI.
This patch updates the dmas description and example node to include
the encoded slave channel configuration.
+++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
@@ -48,6 +48,24 @@ properties:
dmas:
minItems: 1
maxItems: 2
+ description:
+ The first cell represents a phandle to dmac
+ The second cell specifies the encoded MID/RID values of the SSI port
+ connected to the DMA client and the slave channel configuration
+ parameters.
+ bits[0:9] - Specifies MID/RID value of a SSI channel as below
+ MID/RID value of SSI rx0 = 0x256
+ MID/RID value of SSI tx0 = 0x255
+ MID/RID value of SSI rx1 = 0x25a
+ MID/RID value of SSI tx1 = 0x259
+ MID/RID value of SSI rt2 = 0x25f
+ MID/RID value of SSI rx3 = 0x262
+ MID/RID value of SSI tx3 = 0x261
+ bit[10] - HIEN = 1, Detects a request in response to the rising edge
+ of the signal
+ bit[11] - LVL = 0, Detects based on the edge
+ bits[12:14] - AM = 2, Bus cycle mode
+ bit[15] - TM = 0, Single transfer mode
I wish there was better solution to this. Device tree sources are
quite human-readable, this really is not.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: New CVE entries in this week

Pavel Machek
 

Hi!

CVE-2021-45469: f2fs: fix to do sanity check on last xattr entry in
__f2fs_setxattr()

CVSS v3 score is not provided

OOB access bug in __f2fs_setxattr().

Although it is fixed in stable trees, the patch isn't merged in the
mainline yet at 2021/12/30. The commit 5598b24 ("f2fs: fix to do
sanity check on last xattr entry in __f2fs_setxattr()") is in
https://git.kernel.org/pub/scm/linux/kernel/git/chao/linux.git/commit/?h=dev&id=5598b24efaf4892741c798b425d543e4bed357a1
but not in the mainline.
Interesting. That's wrong and unusual for stable tree.

CVE-2021-45480: rds: memory leak in __rds_conn_create()

CVSS v3 score is not provided

This bug was introdued by commit aced3ce57cd3 ("RDS tcp loopback
connection can hang") which was merged at 5.13-rc4.
It was also merged in 4.19-stable as 0a3158ac5999fe. That's why we see
4.19 tree needing the fix. 4.4 is not affected. Good.

mainline: [5f9562ebe710c307adc5f666bf1a2162ee7977c0]
stable/4.19: [1ed173726c1a0082e9d77c7d5a85411e85bdd983]
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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