Date   

[PATCH 4.4.y-cip 04/30] ARM: shmobile: r8a7742: Add clock index macros for DT sources

Biju Das <biju.das.jz@...>
 

Add macros usable by device tree sources to reference r8a7742 clocks by
index.

Unfortunately there is nothing that we can backport from mainline
for this, as the architecture of the clock driver has changed
quite dramatically over time.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
include/dt-bindings/clock/r8a7742-clock.h | 165 ++++++++++++++++++++++
1 file changed, 165 insertions(+)
create mode 100644 include/dt-bindings/clock/r8a7742-clock.h

diff --git a/include/dt-bindings/clock/r8a7742-clock.h b/include/dt-bindings/clock/r8a7742-clock.h
new file mode 100644
index 000000000000..52a6d6bc4f2a
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7742-clock.h
@@ -0,0 +1,165 @@
+/*
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ * Copyright 2013 Ideas On Board SPRL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7742_H__
+#define __DT_BINDINGS_CLOCK_R8A7742_H__
+
+/* CPG */
+#define R8A7742_CLK_MAIN 0
+#define R8A7742_CLK_PLL0 1
+#define R8A7742_CLK_PLL1 2
+#define R8A7742_CLK_PLL3 3
+#define R8A7742_CLK_LB 4
+#define R8A7742_CLK_QSPI 5
+#define R8A7742_CLK_SDH 6
+#define R8A7742_CLK_SD0 7
+#define R8A7742_CLK_SD1 8
+#define R8A7742_CLK_Z 9
+#define R8A7742_CLK_Z2 10
+#define R8A7742_CLK_RCAN 11
+
+/* MSTP0 */
+#define R8A7742_CLK_MSIOF0 0
+
+/* MSTP1 */
+#define R8A7742_CLK_VCP1 0
+#define R8A7742_CLK_VCP0 1
+#define R8A7742_CLK_VPC1 2
+#define R8A7742_CLK_VPC0 3
+#define R8A7742_CLK_TMU1 11
+#define R8A7742_CLK_3DG 12
+#define R8A7742_CLK_2DDMAC 15
+#define R8A7742_CLK_FDP1_2 17
+#define R8A7742_CLK_FDP1_1 18
+#define R8A7742_CLK_FDP1_0 19
+#define R8A7742_CLK_TMU3 21
+#define R8A7742_CLK_TMU2 22
+#define R8A7742_CLK_CMT0 24
+#define R8A7742_CLK_TMU0 25
+#define R8A7742_CLK_VSP1_DU1 27
+#define R8A7742_CLK_VSP1_DU0 28
+#define R8A7742_CLK_VSP1_R 30
+#define R8A7742_CLK_VSP1_S 31
+
+/* MSTP2 */
+#define R8A7742_CLK_SCIFA2 2
+#define R8A7742_CLK_SCIFA1 3
+#define R8A7742_CLK_SCIFA0 4
+#define R8A7742_CLK_MSIOF2 5
+#define R8A7742_CLK_SCIFB0 6
+#define R8A7742_CLK_SCIFB1 7
+#define R8A7742_CLK_MSIOF1 8
+#define R8A7742_CLK_MSIOF3 15
+#define R8A7742_CLK_SCIFB2 16
+#define R8A7742_CLK_SYS_DMAC1 18
+#define R8A7742_CLK_SYS_DMAC0 19
+
+/* MSTP3 */
+#define R8A7742_CLK_IIC2 0
+#define R8A7742_CLK_TPU0 4
+#define R8A7742_CLK_MMCIF1 5
+#define R8A7742_CLK_SCIF2 10
+#define R8A7742_CLK_SDHI3 11
+#define R8A7742_CLK_SDHI2 12
+#define R8A7742_CLK_SDHI1 13
+#define R8A7742_CLK_SDHI0 14
+#define R8A7742_CLK_MMCIF0 15
+#define R8A7742_CLK_IIC0 18
+#define R8A7742_CLK_PCIEC 19
+#define R8A7742_CLK_IIC1 23
+#define R8A7742_CLK_SSUSB 28
+#define R8A7742_CLK_CMT1 29
+#define R8A7742_CLK_USBDMAC0 30
+#define R8A7742_CLK_USBDMAC1 31
+
+/* MSTP4 */
+#define R8A7742_CLK_RWDT 2
+#define R8A7742_CLK_IRQC 7
+#define R8A7742_CLK_INTC_SYS 8
+
+/* MSTP5 */
+#define R8A7742_CLK_AUDIO_DMAC1 1
+#define R8A7742_CLK_AUDIO_DMAC0 2
+#define R8A7742_CLK_THERMAL 22
+#define R8A7742_CLK_PWM 23
+
+/* MSTP7 */
+#define R8A7742_CLK_EHCI 3
+#define R8A7742_CLK_HSUSB 4
+#define R8A7742_CLK_HSCIF1 16
+#define R8A7742_CLK_HSCIF0 17
+#define R8A7742_CLK_SCIF1 20
+#define R8A7742_CLK_SCIF0 21
+#define R8A7742_CLK_DU2 22
+#define R8A7742_CLK_DU1 23
+#define R8A7742_CLK_DU0 24
+#define R8A7742_CLK_LVDS1 25
+#define R8A7742_CLK_LVDS0 26
+
+/* MSTP8 */
+#define R8A7742_CLK_R_GP2D 7
+#define R8A7742_CLK_VIN3 8
+#define R8A7742_CLK_VIN2 9
+#define R8A7742_CLK_VIN1 10
+#define R8A7742_CLK_VIN0 11
+#define R8A7742_CLK_ETHERAVB 12
+#define R8A7742_CLK_ETHER 13
+#define R8A7742_CLK_SATA1 14
+#define R8A7742_CLK_SATA0 15
+#define R8A7742_CLK_IMR_X2_1 20
+#define R8A7742_CLK_IMR_X2_0 21
+#define R8A7742_CLK_IMR_LSX2_1 22
+#define R8A7742_CLK_IMR_LSX2_0 23
+
+/* MSTP9 */
+#define R8A7742_CLK_GPIO5 7
+#define R8A7742_CLK_GPIO4 8
+#define R8A7742_CLK_GPIO3 9
+#define R8A7742_CLK_GPIO2 10
+#define R8A7742_CLK_GPIO1 11
+#define R8A7742_CLK_GPIO0 12
+#define R8A7742_CLK_RCAN1 15
+#define R8A7742_CLK_RCAN0 16
+#define R8A7742_CLK_QSPI_MOD 17
+#define R8A7742_CLK_IICDVFS 26
+#define R8A7742_CLK_I2C3 28
+#define R8A7742_CLK_I2C2 29
+#define R8A7742_CLK_I2C1 30
+#define R8A7742_CLK_I2C0 31
+
+/* MSTP10 */
+#define R8A7742_CLK_SSI_ALL 5
+#define R8A7742_CLK_SSI9 6
+#define R8A7742_CLK_SSI8 7
+#define R8A7742_CLK_SSI7 8
+#define R8A7742_CLK_SSI6 9
+#define R8A7742_CLK_SSI5 10
+#define R8A7742_CLK_SSI4 11
+#define R8A7742_CLK_SSI3 12
+#define R8A7742_CLK_SSI2 13
+#define R8A7742_CLK_SSI1 14
+#define R8A7742_CLK_SSI0 15
+#define R8A7742_CLK_SCU_ALL 17
+#define R8A7742_CLK_SCU_DVC1 18
+#define R8A7742_CLK_SCU_DVC0 19
+#define R8A7742_CLK_SCU_CTU1_MIX1 20
+#define R8A7742_CLK_SCU_CTU0_MIX0 21
+#define R8A7742_CLK_SCU_SRC9 22
+#define R8A7742_CLK_SCU_SRC8 23
+#define R8A7742_CLK_SCU_SRC7 24
+#define R8A7742_CLK_SCU_SRC6 25
+#define R8A7742_CLK_SCU_SRC5 26
+#define R8A7742_CLK_SCU_SRC4 27
+#define R8A7742_CLK_SCU_SRC3 28
+#define R8A7742_CLK_SCU_SRC2 29
+#define R8A7742_CLK_SCU_SRC1 30
+#define R8A7742_CLK_SCU_SRC0 31
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7742_H__ */
--
2.17.1


[PATCH 4.4.y-cip 03/30] soc: renesas: rcar-rst: Add support for RZ/G1H

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 2f71832755a9422f5a62a13ea3e805df7b173837 upstream.

Add support for RZ/G1H (R8A7742) to the R-Car RST driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: Changed the text RZ/G to RZ/G1 ]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/soc/renesas/rcar-rst.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 8eaf736b2b86..869fb10d6de5 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -31,7 +31,8 @@ static const struct rst_config rcar_rst_gen2 __initconst = {
};

static const struct of_device_id rcar_rst_matches[] __initconst = {
- /* RZ/G is handled like R-Car Gen2 */
+ /* RZ/G1 is handled like R-Car Gen2 */
+ { .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
--
2.17.1


[PATCH 4.4.y-cip 02/30] dt-bindings: reset: rcar-rst: Document r8a7742 reset module

Biju Das <biju.das.jz@...>
 

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 9e01d74ce0a154411c8991d6e34f4c470958eac3 upstream.

Document bindings for the RZ/G1H (R8A7742) reset module.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt b/Documentation/devicetree/bindings/reset/renesas,rst.txt
index 270f54b5c6cd..e3ea9be09968 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rst.txt
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -6,6 +6,7 @@ Required properties:
- compatible: Should be
- "renesas,<soctype>-rst" for R-Car Gen2 and RZ/G
Examples with soctypes are:
+ - "renesas,r8a7742-rst" (RZ/G1H)
- "renesas,r8a7743-rst" (RZ/G1M)
- "renesas,r8a7744-rst" (RZ/G1N)
- "renesas,r8a7745-rst" (RZ/G1E)
--
2.17.1


[PATCH 4.4.y-cip 01/30] ARM: shmobile: Document RZ/G1H SoC DT binding

Biju Das <biju.das.jz@...>
 

From: Geert Uytterhoeven <geert+renesas@glider.be>

commit 368d03531f39ffaa793a98b9a17c79d660b1cd1a upstream.

Document the RZ/G1H (r8a7742) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index 26425a1e3bea..1f894d9a2d0f 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -13,6 +13,8 @@ SoCs:
compatible = "renesas,r8a73a4"
- R-Mobile A1 (R8A77400)
compatible = "renesas,r8a7740"
+ - RZ/G1H (R8A77420)
+ compatible = "renesas,r8a7742"
- RZ/G1M (R8A77430)
compatible = "renesas,r8a7743"
- RZ/G1N (R8A77440)
--
2.17.1


[PATCH 4.4.y-cip 00/30] Add iWave RZ/G1H basic board support

Biju Das <biju.das.jz@...>
 

This patch series add basic support for iWave RZ/G1H platform based on
r8a7742 SoC to 4.4.y-cip kernel. Most of the patches in this series
are cherry-picked from mainline.

Biju Das (5):
ARM: shmobile: r8a7742: Add clock index macros for DT sources
clk: shmobile: Document r8a7742 CPG clock support
clk: shmobile: Document r8a7742 MSTP clock support
clk: shmobile: Document r8a7742 CPG DIV6 clock support
clk: shmobile: Compile clk-rcar-gen2.c when using the r8a7742

Geert Uytterhoeven (4):
ARM: shmobile: Document RZ/G1H SoC DT binding
pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw
PINMUX_DATA()
pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group

Lad Prabhakar (21):
dt-bindings: reset: rcar-rst: Document r8a7742 reset module
soc: renesas: rcar-rst: Add support for RZ/G1H
ARM: shmobile: r8a7742: Basic SoC support
soc: renesas: Add Renesas R8A7742 config option
ARM: debug-ll: Add support for r8a7742
ARM: shmobile: defconfig: Enable r8a7742 SoC
ARM: multi_v7_defconfig: Enable r8a7742 SoC
dt-bindings: serial: renesas,scifa: Document r8a7742 bindings
dt-bindings: serial: renesas,scif: Document r8a7742 bindings
dt-bindings: serial: renesas,scifb: Document r8a7742 bindings
dt-bindings: serial: renesas,hscif: Document r8a7742 bindings
dt-bindings: mmc: renesas,mmcif: Document r8a7742 DT bindings
dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support
pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support
ARM: dts: r8a7742: Initial SoC device tree
dt-bindings: gpio: renesas, rcar-gpio: Add r8a7742 (RZ/G1H) support
ARM: dts: r8a7742: Add GPIO nodes
dt-bindings: arm: renesas: Document iW-RainboW-G21M-Qseven-RZG1H SoM
ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM
dt-bindings: arm: renesas: Document iW-RainboW-G21D-Qseven-RZG1H board
ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H

.../devicetree/bindings/arm/shmobile.txt | 6 +
.../clock/renesas,cpg-div6-clocks.txt | 1 +
.../clock/renesas,cpg-mstp-clocks.txt | 1 +
.../clock/renesas,rcar-gen2-cpg-clocks.txt | 1 +
.../bindings/gpio/renesas,gpio-rcar.txt | 1 +
.../devicetree/bindings/mmc/renesas,mmcif.txt | 1 +
.../bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 +
.../devicetree/bindings/reset/renesas,rst.txt | 1 +
.../bindings/serial/renesas,sci-serial.txt | 4 +
arch/arm/Kconfig.debug | 10 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 37 +
arch/arm/boot/dts/r8a7742-iwg21m.dtsi | 53 ++
arch/arm/boot/dts/r8a7742.dtsi | 853 ++++++++++++++++++
arch/arm/configs/multi_v7_defconfig | 1 +
arch/arm/configs/shmobile_defconfig | 1 +
arch/arm/mach-shmobile/Kconfig | 5 +
arch/arm/mach-shmobile/pm-rcar-gen2.c | 2 +
arch/arm/mach-shmobile/setup-rcar-gen2.c | 1 +
drivers/clk/shmobile/Makefile | 1 +
drivers/pinctrl/sh-pfc/Kconfig | 5 +
drivers/pinctrl/sh-pfc/Makefile | 1 +
drivers/pinctrl/sh-pfc/core.c | 6 +
drivers/pinctrl/sh-pfc/core.h | 1 +
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 786 ++++++++--------
drivers/soc/renesas/rcar-rst.c | 3 +-
include/dt-bindings/clock/r8a7742-clock.h | 165 ++++
27 files changed, 1586 insertions(+), 363 deletions(-)
create mode 100644 arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
create mode 100644 arch/arm/boot/dts/r8a7742-iwg21m.dtsi
create mode 100644 arch/arm/boot/dts/r8a7742.dtsi
create mode 100644 include/dt-bindings/clock/r8a7742-clock.h

--
2.17.1


Re: Everything failed in gitlab

Jan Kiszka
 

On 28.08.20 09:11, nobuhiro1.iwamatsu@toshiba.co.jp wrote:
Hi Jan,

-----Original Message-----
From: Jan Kiszka [mailto:jan.kiszka@siemens.com]
Sent: Friday, August 28, 2020 1:44 PM
To: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>; cip-dev@lists.cip-project.org
Cc: iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) <nobuhiro1.iwamatsu@toshiba.co.jp>; Chris Paterson
<Chris.Paterson2@renesas.com>; Quirin Gylstorff <quirin.gylstorff@siemens.com>
Subject: Re: [cip-dev] Everything failed in gitlab

On 27.08.20 23:40, Nobuhiro Iwamatsu wrote:
Hi all,

This is happening not only in cip-testing (kernel test) but also in
cip-core[0][1].
I don't manage these runners. Has anyone changed permissions etc?
I do. Just restarted a build
(https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/707991738), and
it is apparently working.

Is there in issue with who is triggering the build and what permission
that person has? Just restarted [0], and that also works:

https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/707992917
Gitlab runner is now working on all repositories.
Thanks!
...but I didn't change anything for that. I guess is was a temporal hick-up.

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux


Re: Everything failed in gitlab

Nobuhiro Iwamatsu
 

Hi Jan,

-----Original Message-----
From: Jan Kiszka [mailto:jan.kiszka@siemens.com]
Sent: Friday, August 28, 2020 1:44 PM
To: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>; cip-dev@lists.cip-project.org
Cc: iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) <nobuhiro1.iwamatsu@toshiba.co.jp>; Chris Paterson
<Chris.Paterson2@renesas.com>; Quirin Gylstorff <quirin.gylstorff@siemens.com>
Subject: Re: [cip-dev] Everything failed in gitlab

On 27.08.20 23:40, Nobuhiro Iwamatsu wrote:
Hi all,

This is happening not only in cip-testing (kernel test) but also in
cip-core[0][1].
I don't manage these runners. Has anyone changed permissions etc?
I do. Just restarted a build
(https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/707991738), and
it is apparently working.

Is there in issue with who is triggering the build and what permission
that person has? Just restarted [0], and that also works:

https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/707992917
Gitlab runner is now working on all repositories.
Thanks!


Jan
Best regards,
Nobuhiro


Re: Everything failed in gitlab

Jan Kiszka
 

On 27.08.20 23:40, Nobuhiro Iwamatsu wrote:
Hi all,

This is happening not only in cip-testing (kernel test) but also in
cip-core[0][1].
I don't manage these runners. Has anyone changed permissions etc?
I do. Just restarted a build
(https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/707991738), and
it is apparently working.

Is there in issue with who is triggering the build and what permission
that person has? Just restarted [0], and that also works:

https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/707992917

Jan

Best regards,
Nobuhiro

[0]:https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/705783916
[1]:https://gitlab.com/cip-project/cip-core/deby/-/jobs/699772711

2020年8月27日(木) 22:10 Pavel Machek <pavel@ucw.cz>:

Hi!

Michael, Quirin, any ideas?
yes. I took a brief look at the logs and found the problem:

===============================================================================
Aug 27 08:16:05 ip-172-20-42-140 kubelet[2152]: E0827 08:16:05.109337 2152 kuberuntime_manager.go:784] container start failed: ErrImagePull: rpc error: code = Unknown desc = Error response from daemon: Get https://registry.gitlab.com/v2/cip-project/cip-testing/linux-cip-ci/manifests/build-v3: unauthorized: HTTP Basic: Access denied
===============================================================================

=> HTTP Basic: Access denied

Please check your setup/permissions?
I believe that Chris is unavailable this week. Is there anyone else
that knows how this is supposed to work?

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux


Re: Everything failed in gitlab

Nobuhiro Iwamatsu
 

Hi all,

This is happening not only in cip-testing (kernel test) but also in
cip-core[0][1].
I don't manage these runners. Has anyone changed permissions etc?

Best regards,
Nobuhiro

[0]:https://gitlab.com/cip-project/cip-core/isar-cip-core/-/jobs/705783916
[1]:https://gitlab.com/cip-project/cip-core/deby/-/jobs/699772711

2020年8月27日(木) 22:10 Pavel Machek <pavel@ucw.cz>:


Hi!

Michael, Quirin, any ideas?
yes. I took a brief look at the logs and found the problem:

===============================================================================
Aug 27 08:16:05 ip-172-20-42-140 kubelet[2152]: E0827 08:16:05.109337 2152 kuberuntime_manager.go:784] container start failed: ErrImagePull: rpc error: code = Unknown desc = Error response from daemon: Get https://registry.gitlab.com/v2/cip-project/cip-testing/linux-cip-ci/manifests/build-v3: unauthorized: HTTP Basic: Access denied
===============================================================================

=> HTTP Basic: Access denied

Please check your setup/permissions?
I believe that Chris is unavailable this week. Is there anyone else
that knows how this is supposed to work?

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6


[PATCH 4.19.y-cip] arm64: dts: renesas: Fix SD Card/eMMC interface device node names

Lad Prabhakar
 

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

commit a6cb262af1e1adfa6287cb43f09021ee42beb21c upstream.

Fix the device node names as "mmc@".

Fixes: 663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes")
Fixes: 9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree")
Fixes: 77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes")
Fixes: d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi")
Fixes: a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes")
Fixes: 111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes")
Fixes: f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Fixes: df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree")
Fixes: 9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes")
Fixes: 83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[PL: dropped changes to r8a77990.dtsi, r8a77961.dtsi, r8a77960.dtsi
and r8a77951.dtsi files]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 6 +++---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +-
5 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index f2cd97a9d36c..16166f3b66a0 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1996,7 +1996,7 @@
status = "disabled";
};

- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a774a1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee100000 0 0x2000>;
@@ -2008,7 +2008,7 @@
status = "disabled";
};

- sdhi1: sd@ee120000 {
+ sdhi1: mmc@ee120000 {
compatible = "renesas,sdhi-r8a774a1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee120000 0 0x2000>;
@@ -2020,7 +2020,7 @@
status = "disabled";
};

- sdhi2: sd@ee140000 {
+ sdhi2: mmc@ee140000 {
compatible = "renesas,sdhi-r8a774a1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
@@ -2032,7 +2032,7 @@
status = "disabled";
};

- sdhi3: sd@ee160000 {
+ sdhi3: mmc@ee160000 {
compatible = "renesas,sdhi-r8a774a1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee160000 0 0x2000>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index c3b858c13e67..62d011107cc5 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -1854,7 +1854,7 @@
status = "disabled";
};

- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a774b1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee100000 0 0x2000>;
@@ -1866,7 +1866,7 @@
status = "disabled";
};

- sdhi1: sd@ee120000 {
+ sdhi1: mmc@ee120000 {
compatible = "renesas,sdhi-r8a774b1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee120000 0 0x2000>;
@@ -1878,7 +1878,7 @@
status = "disabled";
};

- sdhi2: sd@ee140000 {
+ sdhi2: mmc@ee140000 {
compatible = "renesas,sdhi-r8a774b1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
@@ -1890,7 +1890,7 @@
status = "disabled";
};

- sdhi3: sd@ee160000 {
+ sdhi3: mmc@ee160000 {
compatible = "renesas,sdhi-r8a774b1",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee160000 0 0x2000>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 783a8cf16eaa..7ba934c32696 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -1618,7 +1618,7 @@
status = "disabled";
};

- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a774c0",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee100000 0 0x2000>;
@@ -1630,7 +1630,7 @@
status = "disabled";
};

- sdhi1: sd@ee120000 {
+ sdhi1: mmc@ee120000 {
compatible = "renesas,sdhi-r8a774c0",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee120000 0 0x2000>;
@@ -1642,7 +1642,7 @@
status = "disabled";
};

- sdhi3: sd@ee160000 {
+ sdhi3: mmc@ee160000 {
compatible = "renesas,sdhi-r8a774c0",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee160000 0 0x2000>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 7de6edf1d738..e5cd760356cd 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1486,7 +1486,7 @@
status = "disabled";
};

- sdhi0: sd@ee100000 {
+ sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a77965",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee100000 0 0x2000>;
@@ -1498,7 +1498,7 @@
status = "disabled";
};

- sdhi1: sd@ee120000 {
+ sdhi1: mmc@ee120000 {
compatible = "renesas,sdhi-r8a77965",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee120000 0 0x2000>;
@@ -1510,7 +1510,7 @@
status = "disabled";
};

- sdhi2: sd@ee140000 {
+ sdhi2: mmc@ee140000 {
compatible = "renesas,sdhi-r8a77965",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
@@ -1522,7 +1522,7 @@
status = "disabled";
};

- sdhi3: sd@ee160000 {
+ sdhi3: mmc@ee160000 {
compatible = "renesas,sdhi-r8a77965",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee160000 0 0x2000>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index ce53cb2c22c4..dfe81476b984 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -850,7 +850,7 @@
status = "disabled";
};

- sdhi2: sd@ee140000 {
+ sdhi2: mmc@ee140000 {
compatible = "renesas,sdhi-r8a77995",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
--
2.17.1


Re: Everything failed in gitlab

Pavel Machek
 

Hi!

Michael, Quirin, any ideas?
yes. I took a brief look at the logs and found the problem:

===============================================================================
Aug 27 08:16:05 ip-172-20-42-140 kubelet[2152]: E0827 08:16:05.109337 2152 kuberuntime_manager.go:784] container start failed: ErrImagePull: rpc error: code = Unknown desc = Error response from daemon: Get https://registry.gitlab.com/v2/cip-project/cip-testing/linux-cip-ci/manifests/build-v3: unauthorized: HTTP Basic: Access denied
===============================================================================

=> HTTP Basic: Access denied

Please check your setup/permissions?
I believe that Chris is unavailable this week. Is there anyone else
that knows how this is supposed to work?

Best regards,
Pavel

--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Biju Das <biju.das.jz@...>
 

Hi Nobuhiro,

Thanks for the feedback.

Subject: RE: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi,

-----Original Message-----
From: Biju Das [mailto:biju.das.jz@bp.renesas.com]
Sent: Thursday, August 27, 2020 4:07 PM
To: Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <Chris.Paterson2@renesas.com>;
cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □S
WC◯ACT) <nobuhiro1.iwamatsu@toshiba.co.jp>; Prabhakar
Mahadev Lad
<prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: RE: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi Pavel,

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Add RZ/G2H SoC support for [H]SCIF/SDHI/I2C/RWDT/MSIOF on
4.19.y-cip
kernel.

All the patches in this series are cherry-piced from ML,
except [1] which is a new patch similar to the workdone for
other similar SoC's
Series looks good to me. (But gitlab testing does not seem to
work, and it would be good to test it before applying).
I am not sure about the failure. If it is related to testing on
RZ/G2H board, then
No, it is definitely not related to your boards. Nothing ever
builds... it can't be your fault or fault of your board, but it just prevents
testing :-(.

I have applied the entire series and it builds fine in my environment with
linux-4.19.y-cip(4.19.138-cip32).
What is the build issue related to gitlab testing?
As I write other mail, this seems to be a issue in the environment that runs
gitlab runner.
Ok.

Cheers,
Biju


Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


Re: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Biju Das <biju.das.jz@...>
 

Hi Pavel,

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Add RZ/G2H SoC support for [H]SCIF/SDHI/I2C/RWDT/MSIOF on
4.19.y-cip
kernel.

All the patches in this series are cherry-piced from ML, except
[1] which is a new patch similar to the workdone for other similar
SoC's
Series looks good to me. (But gitlab testing does not seem to work,
and it would be good to test it before applying).
I am not sure about the failure. If it is related to testing on
RZ/G2H board, then
No, it is definitely not related to your boards. Nothing ever builds... it can't be
your fault or fault of your board, but it just prevents testing :-(.
I have applied the entire series and it builds fine in my environment with linux-4.19.y-cip(4.19.138-cip32).
What is the build issue related to gitlab testing?

Cheers,
Biju


Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


Re: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Biju Das <biju.das.jz@...>
 

Hi Pavel,

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Add RZ/G2H SoC support for [H]SCIF/SDHI/I2C/RWDT/MSIOF on 4.19.y-cip
kernel.

All the patches in this series are cherry-piced from ML, except [1]
which is a new patch similar to the workdone for other similar SoC's
Series looks good to me. (But gitlab testing does not seem to work, and it
would be good to test it before applying).
I am not sure about the failure. If it is related to testing on RZ/G2H board, then

I guess RZ/G2H boards have enabled watchdog in u-boot with VLP 1.0.4. So our RZ/G2H boards have enabled watchdog in u-boot.

The timeout is 60seconds. So if watchdog is not enabled in kernel or Watchdog is enabled and there is no watchdog daemon, it will reboot after 60seconds.

In current case, watchdog is enabled by this series. So If you apply this series, then next thing you need to make sure is watchdog daemon is
running or stop the watchdog

or

For cip testing, we should disable watchdog in u-boot.

Cheers,
Biju




Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


Re: Everything failed in gitlab

Michael Adler
 

Hi,

Michael, Quirin, any ideas?
yes. I took a brief look at the logs and found the problem:

===============================================================================
Aug 27 08:16:05 ip-172-20-42-140 kubelet[2152]: E0827 08:16:05.109337 2152 kuberuntime_manager.go:784] container start failed: ErrImagePull: rpc error: code = Unknown desc = Error response from daemon: Get https://registry.gitlab.com/v2/cip-project/cip-testing/linux-cip-ci/manifests/build-v3: unauthorized: HTTP Basic: Access denied
===============================================================================

=> HTTP Basic: Access denied

Please check your setup/permissions?

HTH,
Michael

--
Michael Adler
Siemens AG, Corporate Technology, CT RDA IOT SES-DE, Otto-Hahn-Ring 6, 81739 Munich, Germany

Siemens Aktiengesellschaft: Chairman of the Supervisory Board: Jim Hagemann Snabe; Managing Board: Joe Kaeser, Chairman, President and Chief Executive Officer; Roland Busch, Klaus Helmrich, Cedrik Neike, Ralf P. Thomas; Registered offices: Berlin and Munich, Germany; Commercial registries: Berlin Charlottenburg, HRB 12300, Munich, HRB 6684; WEEE-Reg.-No. DE 23691322


Re: Everything failed in gitlab

Jan Kiszka
 

On 27.08.20 08:48, nobuhiro1.iwamatsu@toshiba.co.jp wrote:
Hi,

There seems to be a problem with kubernetes running gitlab-runner.
AFAUK, this provided by Siemens. Jan, do you have any information about this?
Michael, Quirin, any ideas?

Jan

Best regards,
Nobuhiro

-----Original Message-----
From: cip-dev@lists.cip-project.org [mailto:cip-dev@lists.cip-project.org] On Behalf Of Pavel Machek
Sent: Wednesday, August 26, 2020 4:25 PM
To: Chris.Paterson2@renesas.com; cip-dev@lists.cip-project.org
Subject: [cip-dev] Everything failed in gitlab

Hi!

I tried submitting kernel for testing, and got "everything failed"
result after timeout. I believe something is wrong with testing:

https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/181945390

Any ideas?

Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux


Re: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Biju Das [mailto:biju.das.jz@bp.renesas.com]
Sent: Wednesday, August 26, 2020 8:21 PM
To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
<nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad
<prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Add RZ/G2H SoC support for [H]SCIF/SDHI/I2C/RWDT/MSIOF on 4.19.y-cip kernel.

All the patches in this series are cherry-piced from ML, except [1] which is
a new patch similar to the workdone for other similar SoC's

[1] mmc: renesas_sdhi_internal_dmac: Add r8a774e1 support

This patch series depend on [2]
[2] https://patchwork.kernel.org/project/cip-dev/list/?series=338235

Biju Das (1):
mmc: renesas_sdhi_internal_dmac: Add r8a774e1 support

Lad Prabhakar (9):
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add SDHI nodes
dt-bindings: i2c: renesas,i2c: Document r8a774e1 support
dt-bindings: i2c: renesas,iic: Document r8a774e1 support
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
spi: renesas,sh-msiof: Add r8a774e1 support
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
dt-bindings: watchdog: renesas,wdt: Document r8a774e1 support
arm64: dts: renesas: r8a774e1: Add RWDT node

.../devicetree/bindings/i2c/renesas,i2c.txt | 1 +
.../devicetree/bindings/i2c/renesas,iic.txt | 1 +
.../devicetree/bindings/spi/sh-msiof.txt | 1 +
.../bindings/watchdog/renesas,wdt.txt | 1 +
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 390 +++++++++++++++++-
drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 +
6 files changed, 386 insertions(+), 9 deletions(-)
I reviwed this patch series, looks good to me.

Best regards,
Nobuhiro


Re: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Biju Das [mailto:biju.das.jz@bp.renesas.com]
Sent: Thursday, August 27, 2020 4:07 PM
To: Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <Chris.Paterson2@renesas.com>; cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □S
WC◯ACT) <nobuhiro1.iwamatsu@toshiba.co.jp>; Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: RE: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi Pavel,

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Add RZ/G2H SoC support for [H]SCIF/SDHI/I2C/RWDT/MSIOF on
4.19.y-cip
kernel.

All the patches in this series are cherry-piced from ML, except
[1] which is a new patch similar to the workdone for other similar
SoC's
Series looks good to me. (But gitlab testing does not seem to work,
and it would be good to test it before applying).
I am not sure about the failure. If it is related to testing on
RZ/G2H board, then
No, it is definitely not related to your boards. Nothing ever builds... it can't be
your fault or fault of your board, but it just prevents testing :-(.
I have applied the entire series and it builds fine in my environment with linux-4.19.y-cip(4.19.138-cip32).
What is the build issue related to gitlab testing?
As I write other mail, this seems to be a issue in the environment that runs gitlab runner.

Cheers,
Biju
Best regards,
Nobuhiro


Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office:
Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708
USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647


Re: [PATCH 4.19.y-cip 00/10] Add support for [H]SCIF/SDHI/I2C/RWDT/MSIOF

Pavel Machek
 

Hi!

Thanks for the feedback.

Subject: Re: [PATCH 4.19.y-cip 00/10] Add support for
[H]SCIF/SDHI/I2C/RWDT/MSIOF

Hi!

Add RZ/G2H SoC support for [H]SCIF/SDHI/I2C/RWDT/MSIOF on 4.19.y-cip
kernel.

All the patches in this series are cherry-piced from ML, except [1]
which is a new patch similar to the workdone for other similar SoC's
Series looks good to me. (But gitlab testing does not seem to work, and it
would be good to test it before applying).
I am not sure about the failure. If it is related to testing on RZ/G2H board, then
No, it is definitely not related to your boards. Nothing ever
builds... it can't be your fault or fault of your board, but it just
prevents testing :-(.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Re: Everything failed in gitlab

Nobuhiro Iwamatsu
 

Hi,

There seems to be a problem with kubernetes running gitlab-runner.
AFAUK, this provided by Siemens. Jan, do you have any information about this?

Best regards,
Nobuhiro

-----Original Message-----
From: cip-dev@lists.cip-project.org [mailto:cip-dev@lists.cip-project.org] On Behalf Of Pavel Machek
Sent: Wednesday, August 26, 2020 4:25 PM
To: Chris.Paterson2@renesas.com; cip-dev@lists.cip-project.org
Subject: [cip-dev] Everything failed in gitlab

Hi!

I tried submitting kernel for testing, and got "everything failed"
result after timeout. I believe something is wrong with testing:

https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/181945390

Any ideas?

Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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