From: Biju Das <biju.das.jz@...> commit e315b1f3a170f368da5618f8a598e68880302ed1 upstream. Refactor the code so that card detect irqs are always reenabled after a reset. This avoids doing i

From: Wolfram Sang <wsa+renesas@...> commit 90935eb303e0d12f3d3d0383262e65290321f5f6 upstream. The reset callback may clear the internal card detect interrupts, so make sure to reenab

From: Wolfram Sang <wsa+renesas@...> commit 0751d56ef1f25c4206626dff99445db34dedf437 upstream. Currently, only SDHI on R-Car Gen2+ reinitializes the irq register during reset but it s

From: Wolfram Sang <wsa+renesas@...> commit 6e5c951b4c3a0bd9aa5838ecec98f3c795c83ff1 upstream. After reset, we manually flagged retune in runtime resume, but missed it in the workqueu

From: Wolfram Sang <wsa+renesas@...> commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream. All recent SDHI instances can be reset via the reset controller. If one is found, use it

From: Wolfram Sang <wsa+renesas@...> commit 0e5870145840e91fc33cd4eca6e228b009d86705 upstream. renesas_sdhi_reset used to mainly reset the SCC but is now doing more and even more will

From: Takeshi Saito <takeshi.saito.xv@...> commit 0a446288aa9f28ab00a31b8b51fdb005953f9f99 upstream. Resetting the IP core will lose the bus width information and not all code paths recover it

From: Wolfram Sang <wsa+renesas@...> commit ab0cdefec052825303c05687d9416bafc867fe3d upstream. We will soon allow resetting the whole IP core via a reset controller. For this case, DM

From: Wolfram Sang <wsa+renesas@...> commit 9f12cac1bb88e3296990e760d867a98308d6b0ac upstream. Populate the new member for custom mask values to make sure this value is applied whenev

From: Wolfram Sang <wsa+renesas@...> commit 0d856c4c68c639f96cb12c26aaeb906353b9a76e upstream. SDHI Gen2+ has a different value for TMIO_MASK_ALL, so add a member to support that. If

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...> commit ed2fab9a8229cc70fe03032e48d0ec375df6013e upstream. According to the datasheet, this controller needs retune when cmd or data timeout h

From: Masaharu Hayakawa <masaharu.hayakawa.ry@...> commit 35cdcd1268f654f55e2308767349c44bd25d8009 upstream. Currently, busy timeout is not checked for data transfer command. But, if the tempe

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...> commit 69e7d76afdb54243df957351804c0f1afca46d0f upstream. Add pre_req and post_req support to improve performance. Inspired by a patch in the

From: Wolfram Sang <wsa+renesas@...> commit b191deced78a12e26a827db03745b0da6cbc4f0e upstream. Make use of the EXTOP bit in R-Car Gen3 SoCs to have a twice as large busy wait duration

From: Wolfram Sang <wsa+renesas@...> commit 58959f89dd3d8cc8bedcd2d665496603098b29a2 upstream. Newer SDHI variants can 'wait while busy' longer than the generic TMIO. Provide a hook t

From: Wolfram Sang <wsa+renesas@...> commit 30ae3e13caeaa47884c222ebf5711ce27ed25f19 upstream. Set max_busy_timeouts for variants known to support the TOPxx bits in the SD_OPTION regi

From: Wolfram Sang <wsa+renesas@...> commit ab07a1356043f07142ba351253904ef8c42ecd4f upstream. Better prevent double includes. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineerin

From: Wolfram Sang <wsa+renesas@...> commit 0e08a411585214360938022ca3f50a9f1cd91753 upstream. Use a macro to name the hardcoded values. Also, move the SDIF register definition into t

From: Wolfram Sang <wsa+renesas@...> commit 4533c3eb893d8d6881f792a855fa5e11d5ddf0c2 upstream. HOST_MODE should have a CTL_ prefix, too. This makes the code more readable because we i

From: Wolfram Sang <wsa+renesas@...> commit 8c8310a6c2a6b86edadf15d511f4c1b332516b21 upstream. All previously called functions handle SCLKEN on their own, no need to enable it again i