From: Biju Das <biju.das.jz@...> commit bfadee4554c3782bfbc5943866bd2ad44d631e50 upstream. Document RZ/G2L SDHI controller bindings. Signed-off-by: Biju Das <biju.das.jz@...> Rev

From: Biju Das <biju.das.jz@...> commit 4aba5dc71eae041aa1a9240de10ad2e30e9f32dd upstream. Fix dtbs-check warning pinctrl-names:0:'default' was expected for r8a77470-iwg23s-sbc.dts file. Si

From: Rob Herring <robh@...> commit 972d6a7dcec3ad3226661034c5d8cb2d30585157 upstream. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redun

From: Rob Herring <robh@...> commit 9183908e70e913d2db052588172968da55d82af5 upstream. Properties in if/then schemas weren't getting checked by the meta-schemas. Enabling meta-schema checks fin

From: Biju Das <biju.das.jz@...> commit 373bd6f487562e8727bc842e9983b093d57968cc upstream. Add SDHI{0,1} mux, clock and reset entries to CPG driver. Signed-off-by: Biju Das <biju.das.jz@bp.

commit 33748744f15a110a233b6ae0380f476006e770f0 upstream. of_genpd_add_provider_simple() might fail, this patch makes sure we check the return value of of_genpd_add_provider_simple() by propagating th

commit 27527a3d3b162e4512798c058c0e8a216c721187 upstream. Make sure we check the return value of pm_genpd_init() which might fail. Also add a devres action to remove the power-domain in-case the probe

From: Geert Uytterhoeven <geert+renesas@...> commit 099ee03271208c880aa33b8833edfacd5010a89a upstream. make W=1: drivers/clk/renesas/rzg2l-cpg.c:95: warning: Function parameter or member 'num_re

From: Biju Das <biju.das.jz@...> commit eaff33646f4cb6a541d01013b0a222f03f6dfac3 upstream. Add SDHI clk mux support to select SDHI clock from different clock sources. As per HW manual, dire

From: Biju Das <biju.das.jz@...> commit e315b1f3a170f368da5618f8a598e68880302ed1 upstream. Refactor the code so that card detect irqs are always reenabled after a reset. This avoids doing i

From: Wolfram Sang <wsa+renesas@...> commit 90935eb303e0d12f3d3d0383262e65290321f5f6 upstream. The reset callback may clear the internal card detect interrupts, so make sure to reenab

From: Wolfram Sang <wsa+renesas@...> commit 0751d56ef1f25c4206626dff99445db34dedf437 upstream. Currently, only SDHI on R-Car Gen2+ reinitializes the irq register during reset but it s

From: Wolfram Sang <wsa+renesas@...> commit 6e5c951b4c3a0bd9aa5838ecec98f3c795c83ff1 upstream. After reset, we manually flagged retune in runtime resume, but missed it in the workqueu

From: Wolfram Sang <wsa+renesas@...> commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream. All recent SDHI instances can be reset via the reset controller. If one is found, use it

From: Wolfram Sang <wsa+renesas@...> commit 0e5870145840e91fc33cd4eca6e228b009d86705 upstream. renesas_sdhi_reset used to mainly reset the SCC but is now doing more and even more will

From: Takeshi Saito <takeshi.saito.xv@...> commit 0a446288aa9f28ab00a31b8b51fdb005953f9f99 upstream. Resetting the IP core will lose the bus width information and not all code paths recover it

From: Wolfram Sang <wsa+renesas@...> commit ab0cdefec052825303c05687d9416bafc867fe3d upstream. We will soon allow resetting the whole IP core via a reset controller. For this case, DM

From: Wolfram Sang <wsa+renesas@...> commit 9f12cac1bb88e3296990e760d867a98308d6b0ac upstream. Populate the new member for custom mask values to make sure this value is applied whenev

From: Wolfram Sang <wsa+renesas@...> commit 0d856c4c68c639f96cb12c26aaeb906353b9a76e upstream. SDHI Gen2+ has a different value for TMIO_MASK_ALL, so add a member to support that. If

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...> commit ed2fab9a8229cc70fe03032e48d0ec375df6013e upstream. According to the datasheet, this controller needs retune when cmd or data timeout h