From: Masaharu Hayakawa <masaharu.hayakawa.ry@...> commit 35cdcd1268f654f55e2308767349c44bd25d8009 upstream. Currently, busy timeout is not checked for data transfer command. But, if the tempe

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...> commit 69e7d76afdb54243df957351804c0f1afca46d0f upstream. Add pre_req and post_req support to improve performance. Inspired by a patch in the

From: Wolfram Sang <wsa+renesas@...> commit b191deced78a12e26a827db03745b0da6cbc4f0e upstream. Make use of the EXTOP bit in R-Car Gen3 SoCs to have a twice as large busy wait duration

From: Wolfram Sang <wsa+renesas@...> commit 58959f89dd3d8cc8bedcd2d665496603098b29a2 upstream. Newer SDHI variants can 'wait while busy' longer than the generic TMIO. Provide a hook t

From: Wolfram Sang <wsa+renesas@...> commit 30ae3e13caeaa47884c222ebf5711ce27ed25f19 upstream. Set max_busy_timeouts for variants known to support the TOPxx bits in the SD_OPTION regi

From: Wolfram Sang <wsa+renesas@...> commit ab07a1356043f07142ba351253904ef8c42ecd4f upstream. Better prevent double includes. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineerin

From: Wolfram Sang <wsa+renesas@...> commit 0e08a411585214360938022ca3f50a9f1cd91753 upstream. Use a macro to name the hardcoded values. Also, move the SDIF register definition into t

From: Wolfram Sang <wsa+renesas@...> commit 4533c3eb893d8d6881f792a855fa5e11d5ddf0c2 upstream. HOST_MODE should have a CTL_ prefix, too. This makes the code more readable because we i

From: Wolfram Sang <wsa+renesas@...> commit 8c8310a6c2a6b86edadf15d511f4c1b332516b21 upstream. All previously called functions handle SCLKEN on their own, no need to enable it again i

From: Wolfram Sang <wsa+renesas@...> commit 80d0be81102405f1172f9b017feef323e5931959 upstream. There is no user of renesas_sdhi_reset_scc() anymore, only renesas_sdhi_disable_scc() so

From: Wolfram Sang <wsa+renesas@...> commit 183edc060e6969a3afe83f663b534f6324fb7e3a upstream. We want to clear TAPEN in a software reset, too, to have a completely known state. Espec

From: Wolfram Sang <wsa+renesas@...> commit 9f809065d86dec2070263acedaa5758f8c9e95a9 upstream. The 'reset' pointer is only populated for Gen2+. So, we don't need to check for that fla

From: Wolfram Sang <wsa+renesas@...> commit d14ac691bb6f6ebaa7eeec21ca04dd47300ff5b6 upstream. The SCC pointer is currently filled whenever the SoC is Gen2+. This is wrong because the

From: Wolfram Sang <wsa+renesas@...> commit b161d87dfd3d9f3fb064a089a9e521d0e5d3e38f upstream. Setting up the SCC parameters does not need a probed TMIO device. But in the near future

Hi All, This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and enables this interfaces on Renesas RZ/G2L SMARC EVK. All the patches have been cherry picked from v5.17 release. Cheers, Pr

From: Biju Das <biju.das.jz@...> commit 5fcf8b0656cf842ae642298c2874ea6148d0129d upstream. Sort psci node alphabetically. Signed-off-by: Biju Das <biju.das.jz@...> Reviewed-by: L

commit f9a2adcc9e908907129c18518d4ea6195c44bf00 upstream. Add SCI[0-1] nodes to r9a07g044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju Da

commit 5a8aa63c9bca800e6049d90422abe5404227a703 upstream. SCIF2 interface is available on PMOD1 connector (CN7) on carrier board, This patch adds pinmux and scif2 node to carrier board dtsi file. Sign

commit 68f8eb19c18a377181622e58c1fd2ca0f5c0d15d upstream. Add SCIF[1-4] nodes to r9a07g044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Biju D

commit 862f72187a41008df2cce3f8e97f57070cbc7060 upstream. On RZ/G2L SoC we need to explicitly deassert the reset line for the device to work, use this opportunity to deassert/assert reset line in sh-s