commit aadbff4af5c90919cbe67e2c4d77c68cdefa454e upstream. On RZ/G2L SoC we need to explicitly deassert the reset line for the device to work, use this opportunity to deassert/assert reset line in spi-

commit 5a8f8542e34b6469cd5c5a3d075fa5977d90775e upstream. Add RSPI binding documentation for Renesas RZ/G2L SoC. RSPI block is identical to one found on RZ/A, so no driver changes are required. The fa

commit e7d960cd6afd56d8c6d4408b6b8a59c91baafcc2 upstream. Add RSPI{0,1,2} clock and reset entries to CPG driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> Reviewed-by: Bij

Hi All, This patch series adds support for following to Renesas RZ/RGL SoC: * RSPI * WDT * OSTM * TSU/OPP/IPA All the patches have been cherry-picked from v5.17 release. Cheers, Prabhakar Andy Shevche

From: Biju Das <biju.das.jz@...> commit 34cdc0edfe8f6d660e3c4c47d10f5506d08f09e1 upstream. This patch enables microSD card slot connected to SDHI1 on RZ/G2L SMARC platform. Signed-off-by: B

From: Biju Das <biju.das.jz@...> commit a60a311cb8d0cddaaeb1eee22bfd76138e6b5ad6 upstream. RZ/G2L SoM has both 64 GB eMMC and microSD connected to SDHI0. Both these interfaces are mutually

From: Biju Das <biju.das.jz@...> commit a83ad872f4ba6b9fbf81b9f70d6ff6d61d74bf7e upstream. Add SDHI{0, 1} nodes to RZ/G2L SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@...> Link

From: Biju Das <biju.das.jz@...> commit 217c7d1840b5377543eff84fe28409d0bd4d3433 upstream. Rename the below RZ/G2L clocks to match with the clock names used in R-Car Gen2 and later generati

From: Wolfram Sang <wsa+renesas@...> commit e051025efac3929ca7e3e2f2c8860d3447366ebc upstream. This only applies to R-Car Gen2 and later generations, so we need to distinguish. Signed

From: Biju Das <biju.das.jz@...> commit bfadee4554c3782bfbc5943866bd2ad44d631e50 upstream. Document RZ/G2L SDHI controller bindings. Signed-off-by: Biju Das <biju.das.jz@...> Rev

From: Biju Das <biju.das.jz@...> commit 4aba5dc71eae041aa1a9240de10ad2e30e9f32dd upstream. Fix dtbs-check warning pinctrl-names:0:'default' was expected for r8a77470-iwg23s-sbc.dts file. Si

From: Rob Herring <robh@...> commit 972d6a7dcec3ad3226661034c5d8cb2d30585157 upstream. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redun

From: Rob Herring <robh@...> commit 9183908e70e913d2db052588172968da55d82af5 upstream. Properties in if/then schemas weren't getting checked by the meta-schemas. Enabling meta-schema checks fin

From: Biju Das <biju.das.jz@...> commit 373bd6f487562e8727bc842e9983b093d57968cc upstream. Add SDHI{0,1} mux, clock and reset entries to CPG driver. Signed-off-by: Biju Das <biju.das.jz@bp.

commit 33748744f15a110a233b6ae0380f476006e770f0 upstream. of_genpd_add_provider_simple() might fail, this patch makes sure we check the return value of of_genpd_add_provider_simple() by propagating th

commit 27527a3d3b162e4512798c058c0e8a216c721187 upstream. Make sure we check the return value of pm_genpd_init() which might fail. Also add a devres action to remove the power-domain in-case the probe

From: Geert Uytterhoeven <geert+renesas@...> commit 099ee03271208c880aa33b8833edfacd5010a89a upstream. make W=1: drivers/clk/renesas/rzg2l-cpg.c:95: warning: Function parameter or member 'num_re

From: Biju Das <biju.das.jz@...> commit eaff33646f4cb6a541d01013b0a222f03f6dfac3 upstream. Add SDHI clk mux support to select SDHI clock from different clock sources. As per HW manual, dire

From: Biju Das <biju.das.jz@...> commit e315b1f3a170f368da5618f8a598e68880302ed1 upstream. Refactor the code so that card detect irqs are always reenabled after a reset. This avoids doing i

From: Wolfram Sang <wsa+renesas@...> commit 90935eb303e0d12f3d3d0383262e65290321f5f6 upstream. The reset callback may clear the internal card detect interrupts, so make sure to reenab