Date   
[PATCH v2 5.10.y-cip 08/12] watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context' By Biju Das · #8854 ·
[PATCH v2 5.10.y-cip 07/12] watchdog: rzg2l_wdt: Fix Runtime PM usage By Biju Das · #8853 ·
[PATCH v2 5.10.y-cip 06/12] watchdog: rzg2l_wdt: Fix 32bit overflow issue By Biju Das · #8852 ·
[PATCH v2 5.10.y-cip 05/12] arm64: defconfig: Enable additional support for Renesas platforms By Biju Das · #8851 ·
[PATCH v2 5.10.y-cip 04/12] thermal/drivers/rz2gl: Fix OTP Calibration Register values By Biju Das · #8850 ·
[PATCH v2 5.10.y-cip 03/12] thermal/drivers/rz2gl: Add error check for reset_control_deassert() By Biju Das · #8849 ·
[PATCH v2 5.10.y-cip 02/12] thermal/drivers: Add TSU driver for RZ/G2L By Biju Das · #8848 ·
[PATCH v2 5.10.y-cip 01/12] units: Add SI metric prefix definitions By Biju Das · #8847 ·
[PATCH v2 5.10.y-cip 00/12] Add thermal driver and watchdog driver enhancements By Biju Das · #8846 ·
[PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L By Biju Das · #8844 ·
[PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L By Biju Das · #8842 ·
[PATCH RESEND 5.10.y-cip 03/13] thermal/drivers: Add TSU driver for RZ/G2L By Biju Das · #8841 ·
[PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback By Biju Das · #8840 ·
[PATCH RESEND 5.10.y-cip 01/13] kernel.h: split out mathematical helpers By Biju Das · #8839 ·
[PATCH RESEND 5.10.y-cip 00/13] Add thermal driver and watchdog driver enhancements By Biju Das · #8825 ·
[PATCH RESEND 5.10.y-cip 13/13] watchdog: rzg2l_wdt: Add set_timeout callback By Biju Das · #8824 ·
[PATCH RESEND 5.10.y-cip 12/13] watchdog: rzg2l_wdt: Use force reset for WDT reset By Biju Das · #8823 ·
[PATCH RESEND 5.10.y-cip 11/13] watchdog: rzg2l_wdt: Add error check for reset_control_deassert By Biju Das · #8822 ·
[PATCH RESEND 5.10.y-cip 10/13] watchdog: rzg2l_wdt: Fix reset control imbalance By Biju Das · #8821 ·
[PATCH RESEND 5.10.y-cip 09/13] watchdog: rzg2l_wdt: Fix 'BUG: Invalid wait context' By Biju Das · #8820 ·
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