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[RESEND PATCH 5.10.y-cip 06/40] mmc: renesas_sdhi: merge the SCC reset functions
From: Wolfram Sang <wsa+renesas@...> commit 80d0be81102405f1172f9b017feef323e5931959 upstream. There is no user of renesas_sdhi_reset_scc() anymore, only renesas_sdhi_disable_scc() so
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From: Wolfram Sang <wsa+renesas@...> commit 80d0be81102405f1172f9b017feef323e5931959 upstream. There is no user of renesas_sdhi_reset_scc() anymore, only renesas_sdhi_disable_scc() so
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By
Lad Prabhakar
· #7917
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[RESEND PATCH 5.10.y-cip 05/40] mmc: renesas_sdhi: clear TAPEN when resetting, too
From: Wolfram Sang <wsa+renesas@...> commit 183edc060e6969a3afe83f663b534f6324fb7e3a upstream. We want to clear TAPEN in a software reset, too, to have a completely known state. Espec
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From: Wolfram Sang <wsa+renesas@...> commit 183edc060e6969a3afe83f663b534f6324fb7e3a upstream. We want to clear TAPEN in a software reset, too, to have a completely known state. Espec
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By
Lad Prabhakar
· #7916
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[RESEND PATCH 5.10.y-cip 04/40] mmc: renesas_sdhi: simplify reset routine a little
From: Wolfram Sang <wsa+renesas@...> commit 9f809065d86dec2070263acedaa5758f8c9e95a9 upstream. The 'reset' pointer is only populated for Gen2+. So, we don't need to check for that fla
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From: Wolfram Sang <wsa+renesas@...> commit 9f809065d86dec2070263acedaa5758f8c9e95a9 upstream. The 'reset' pointer is only populated for Gen2+. So, we don't need to check for that fla
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By
Lad Prabhakar
· #7915
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[RESEND PATCH 5.10.y-cip 03/40] mmc: renesas_sdhi: populate SCC pointer at the proper place
From: Wolfram Sang <wsa+renesas@...> commit d14ac691bb6f6ebaa7eeec21ca04dd47300ff5b6 upstream. The SCC pointer is currently filled whenever the SoC is Gen2+. This is wrong because the
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From: Wolfram Sang <wsa+renesas@...> commit d14ac691bb6f6ebaa7eeec21ca04dd47300ff5b6 upstream. The SCC pointer is currently filled whenever the SoC is Gen2+. This is wrong because the
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By
Lad Prabhakar
· #7914
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[RESEND PATCH 5.10.y-cip 02/40] mmc: renesas_sdhi: probe into TMIO after SCC parameters have been setup
From: Wolfram Sang <wsa+renesas@...> commit b161d87dfd3d9f3fb064a089a9e521d0e5d3e38f upstream. Setting up the SCC parameters does not need a probed TMIO device. But in the near future
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From: Wolfram Sang <wsa+renesas@...> commit b161d87dfd3d9f3fb064a089a9e521d0e5d3e38f upstream. Setting up the SCC parameters does not need a probed TMIO device. But in the near future
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By
Lad Prabhakar
· #7913
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[RESEND PATCH 5.10.y-cip 01/40] mmc: renesas_sdhi: only reset SCC when its pointer is populated
From: Wolfram Sang <wsa+renesas@...> commit 45bffc371fefd8537804b001080a47c6b69d5efa upstream. Only re-initialize SCC and tuning when an SCC was found during probe(). This is currentl
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From: Wolfram Sang <wsa+renesas@...> commit 45bffc371fefd8537804b001080a47c6b69d5efa upstream. Only re-initialize SCC and tuning when an SCC was found during probe(). This is currentl
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By
Lad Prabhakar
· #7912
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[RESEND PATCH 5.10.y-cip 00/40] Add SD/eMMC support for Renesas RZ/G2L SoC
Hi All, This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and enables this interfaces on Renesas RZ/G2L SMARC EVK. All the patches have been cherry picked from v5.17 release. Resending
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Hi All, This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and enables this interfaces on Renesas RZ/G2L SMARC EVK. All the patches have been cherry picked from v5.17 release. Resending
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By
Lad Prabhakar
· #7911
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[PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
Hi Pavel, Nobuhiro,
By
Lad Prabhakar
· #7910
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[PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant minItems/maxItems
Hi Pavel, Thank you for the review.
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Hi Pavel, Thank you for the review.
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By
Lad Prabhakar
· #7909
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[PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible
Hi Pavel, Thank you for the review.
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Hi Pavel, Thank you for the review.
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By
Lad Prabhakar
· #7908
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[PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune
Hi Pavel, Thank you for the review.
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Hi Pavel, Thank you for the review.
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By
Lad Prabhakar
· #7907
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[PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support
Hi Pavel, Thank you for the review.
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Hi Pavel, Thank you for the review.
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By
Lad Prabhakar
· #7906
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[PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes
Hi Pavel, Thank you for the review.
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Hi Pavel, Thank you for the review.
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By
Lad Prabhakar
· #7905
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[PATCH 5.10.y-cip 04/39] mmc: renesas_sdhi: clear TAPEN when resetting, too
Hi Pavel, Thank you for the review.
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Hi Pavel, Thank you for the review.
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By
Lad Prabhakar
· #7904
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[PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
Hi Pavel,
By
Lad Prabhakar
· #7901
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[PATCH 5.10.y-cip 39/39] arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform
From: Biju Das <biju.das.jz@...> commit 34cdc0edfe8f6d660e3c4c47d10f5506d08f09e1 upstream. This patch enables microSD card slot connected to SDHI1 on RZ/G2L SMARC platform. Signed-off-by: B
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From: Biju Das <biju.das.jz@...> commit 34cdc0edfe8f6d660e3c4c47d10f5506d08f09e1 upstream. This patch enables microSD card slot connected to SDHI1 on RZ/G2L SMARC platform. Signed-off-by: B
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By
Lad Prabhakar
· #7890
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[PATCH 5.10.y-cip 38/39] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
From: Biju Das <biju.das.jz@...> commit a60a311cb8d0cddaaeb1eee22bfd76138e6b5ad6 upstream. RZ/G2L SoM has both 64 GB eMMC and microSD connected to SDHI0. Both these interfaces are mutually
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From: Biju Das <biju.das.jz@...> commit a60a311cb8d0cddaaeb1eee22bfd76138e6b5ad6 upstream. RZ/G2L SoM has both 64 GB eMMC and microSD connected to SDHI0. Both these interfaces are mutually
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By
Lad Prabhakar
· #7889
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[PATCH 5.10.y-cip 37/39] arm64: dts: renesas: r9a07g044: Add SDHI nodes
From: Biju Das <biju.das.jz@...> commit a83ad872f4ba6b9fbf81b9f70d6ff6d61d74bf7e upstream. Add SDHI{0, 1} nodes to RZ/G2L SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@...> Link
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From: Biju Das <biju.das.jz@...> commit a83ad872f4ba6b9fbf81b9f70d6ff6d61d74bf7e upstream. Add SDHI{0, 1} nodes to RZ/G2L SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@...> Link
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By
Lad Prabhakar
· #7888
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[PATCH 5.10.y-cip 36/39] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
From: Biju Das <biju.das.jz@...> commit 217c7d1840b5377543eff84fe28409d0bd4d3433 upstream. Rename the below RZ/G2L clocks to match with the clock names used in R-Car Gen2 and later generati
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From: Biju Das <biju.das.jz@...> commit 217c7d1840b5377543eff84fe28409d0bd4d3433 upstream. Rename the below RZ/G2L clocks to match with the clock names used in R-Car Gen2 and later generati
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By
Lad Prabhakar
· #7887
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[PATCH 5.10.y-cip 35/39] dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock
From: Wolfram Sang <wsa+renesas@...> commit e051025efac3929ca7e3e2f2c8860d3447366ebc upstream. This only applies to R-Car Gen2 and later generations, so we need to distinguish. Signed
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From: Wolfram Sang <wsa+renesas@...> commit e051025efac3929ca7e3e2f2c8860d3447366ebc upstream. This only applies to R-Car Gen2 and later generations, so we need to distinguish. Signed
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By
Lad Prabhakar
· #7886
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