http://lists.infradead.org/pipermail/linux-riscv/2022-August/018823.html Maybe there is a chance to have this in 6.1-rt so that 6.1-cip-rt can pick it up. Jan

Exactly - that's why I don't understand that you are not doing it already. The default setup should be generic, easily extensible. But now your users need to compile an own firmware and flash it, just

https://gitlab.com/cip-project/cip-core/isar-cip-core/-/commits/wip/rzfive Test by flashing the image to an SD-Card switching to SD booting on the module. Maybe we can find a better solution for the b

root@demo:~# cat /sys/firmware/devicetree/base/model ; echo Renesas SMARC EVK based on r9a07g043f01 root@demo:~# cat /etc/os-release PRETTY_NAME="Debian GNU/Linux bookworm/sid" NAME="Debian GNU/Linux"

...and it's based on an outdated CIP baseline. We are specifically missing "riscv: fix build with binutils 2.38", compared to latest CIP kernels. Those happily build with the Debian toolchain. Fixing

From: Jan Kiszka <jan.kiszka@...> Brings a couple of smaller fixes. None of them should have direct impact on this layer, but possibly on downstreams. Signed-off-by: Jan Kiszka <jan.kiszka@sie

From: Jan Kiszka <jan.kiszka@...> RISC-V is not yet an official Debian port, so we need to pick sid-ports as source. And that means things can break randomly, as today. Therefore pick a versio

From: Jan Kiszka <jan.kiszka@...> Should accelerate this step a bit. Signed-off-by: Jan Kiszka <jan.kiszka@...> --- scripts/deploy-cip-core.sh | 2 +- 1 file changed, 1 insertion(+), 1

From: Jan Kiszka <jan.kiszka@...> Signed-off-by: Jan Kiszka <jan.kiszka@...> --- ...5.10.140-cip16-rt6.bb => linux-cip-rt_5.10.145-cip17-rt7.bb} | 2 +- ...{linux-cip_4.19.257-cip81.bb

From: Jan Kiszka <jan.kiszka@...> We already adopted 11 with repo-relative includes. Signed-off-by: Jan Kiszka <jan.kiszka@...> --- doc/README.secureboot.md | 2 +- kas-cip.yml | 2 +- k

From: Jan Kiszka <jan.kiszka@...> Avoid "echo -e", not supported with all shells. Refactor the environment help to make it better readable. Add missing variables at this chance. Signed-off-by:

From: Jan Kiszka <jan.kiszka@...> Already set by kas since revision 11. Signed-off-by: Jan Kiszka <jan.kiszka@...> --- kas-cip.yml | 2 -- 1 file changed, 2 deletions(-) diff --git a/ka

From: Jan Kiszka <jan.kiszka@...> Basically like ARM/ARM64. We just need to list the second console via virtio explicitly as the system will not pick it up automatically. Signed-off-by: Jan Ki

From: Jan Kiszka <jan.kiszka@...> Those will allow to model architecture dependencies. No functional changes yet. Signed-off-by: Jan Kiszka <jan.kiszka@...> --- Kconfig | 30 ++++++++++

From: Jan Kiszka <jan.kiszka@...> CIP kernel 4.4 does not officially support the arm64 architecture. Signed-off-by: Jan Kiszka <jan.kiszka@...> --- Kconfig | 1 + 1 file changed, 1 inse

From: Jan Kiszka <jan.kiszka@...> RISC-V kernels tend to come with a virtual console via SBI. Under QEMU, this is redundant to the serial console that Linux support as well, giving two prompts

CIP has decided to add RISC-V 64-bit as architecture to the support scope of kernel 5.10-cip. This implies adding a new reference target, qemu-riscv64, for which this series adds support to isar-cip-c

From: Jan Kiszka <jan.kiszka@...> Can be helpful to work around deb.debian.org glitches, specifically when the distance of a runner to its next mirror is well known. To allow passing this to b

How is the upstreaming status here? For UEFI, a U-Boot from this year is needed. I see - over 700 patches for 5.10-cip... Ah, ok. Thanks! Jan

This is what the RISC-V porting team does already. But it seems to be no option for an official arch by rule. I think I read it somewhere, not finding this anymore, though. What do you mean exactly? J