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Features backports
Agustin Benito Bethencourt <agustin.benito@...>
Hi,
as you probably know, the more features we backport, the higher will be the maintenance cost overtime so as a strategy, we need to be very conservative. I sent a mail some days ago about the features backported already by Linaro for their LSK (Linaro Stable Kernel) for your evaluation. I bring today some potential backports related with security features and hardware support that has been identified by Ben H. * UBSAN support: <https://git.kernel.org/linus/c6d308534aef6c99904bf5862066360ae067abc4> * Increased user-space ASLR range for ARM: <https://lwn.net/Articles/667790/> * Page poisoning on free: <https://git.kernel.org/linus/8823b1dbc05fab1a8bec275eeae4709257c2661d>, <https://git.kernel.org/linus/1414c7f4f7d72d138fff35f00151d15749b5beda> * SLAB/SLUB freelist randomisation * Hardened usercopy * Do Members use SLUB? if not, we should take a look at KASAN support for SLAB * drm/tilcdc update? (many bug fixes post-4.4) * AM33xx RTC support: <https://git.kernel.org/linus/461932dfb54ebaf7da438fd8b769a01ce97a9360>, <https://git.kernel.org/linus/b5a553c08bec14a058501df3fa6eb39f63f00a98> Best Regards -- Agustin Benito Bethencourt Principal Consultant - FOSS at Codethink agustin.benito@... |
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Jan Kiszka
On 2016-11-18 13:26, Agustin Benito Bethencourt wrote:
Hi,To add two features areas from our requirement list: - Distributed Switch Architecture, basically the level of 4.8 would be sufficient. However, there might be too many dependencies on networking core changes. If we pick 4.9 as next SLTS, then this becomes obsolete. - Graphic support for AM57xx from more recent kernels, but things may even still depend on TI's vendor kernel (in which case it would be too early). Both are a bit vague yet, but I'm trying to clarify more details. Comments are already welcome, of course. Jan |
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Agustin Benito Bethencourt <agustin.benito@...>
Hi,
On 28/11/16 14:47, Jan Kiszka wrote: On 2016-11-18 13:26, Agustin Benito Bethencourt wrote:This is good. It allows us to dig a little and provide some light.Hi,To add two features areas from our requirement list: -- Agustin Benito Bethencourt Principal Consultant - FOSS at Codethink agustin.benito@... |
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Takuo Koguchi
Hi,
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Regarding to Altera Socfpga Cyclone V, we might want to backport from 4.9; - L2cache ECC(./arch/arm/mm/cache-l2x0.c) - QSPI Flash controller(drivers/mtd/spi-nor/cadence-quadspi.c) 4.9 is still missing the followings which exist in the verdor tree(linux-socfpga); - HPS2FPGA(drivers/fpga/altera-hps2fpga.c) - NAND Flash controller(drivers/mtd/nand/denali_dt.c) I hope we can encourage Altera to push these features upstream or do it ourselves. Takuo -----Original Message----- |
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Agustin Benito Bethencourt <agustin.benito@...>
Hi,
On 29/11/16 03:57, 小口琢夫 / KOGUCHI,TAKUO wrote: Hi,I think we have a good chance once they see we are testing Beaglebone Black in the open. That would be a good opportunity we might add value to them. Definitely I would talk to them before. If they are not pushing the patches upstream, it would be a good question why. -- Agustin Benito Bethencourt Principal Consultant - FOSS at Codethink agustin.benito@... |
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Yoshitake Kobayashi
Hi,
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Since the Intel Apollo Lake has already released, we started to check the patches for that. I think the basic functionality has already upstreamed and it might be enough for expected use cases. http://git.yoctoproject.org/cgit/cgit.cgi/linux-yocto-4.4/log/?h=standard/intel/bxt-rebase I continue to clarify more details. Best regards, Yoshi On 2016/11/18 21:26, Agustin Benito Bethencourt wrote:
Hi, |
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