[PATCH 5.10.y-cip] drm: rcar-du: Fix Alpha blending issue on Gen3


Pavel Machek
 

Hi!

From: LUU HOAI <hoai.luu.ub@...>

commit b7aaa61726cbc7b941007af14a9f991a828c67e4 upstream.

As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf,
unexpected image output(such as incorrect colors or planes being
invisible) can happen on the below conditions, as PnALPHAR register
is not initialized by reset.
Thank you, applied.

Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Nobuhiro Iwamatsu
 

Hi,

-----Original Message-----
From: Biju Das <biju.das.jz@...>
Sent: Tuesday, August 30, 2022 11:22 PM
To: cip-dev@...; iwamatsu nobuhiro(岩松 信洋 □SWC◯A
CT) <nobuhiro1.iwamatsu@...>; Pavel Machek
<pavel@...>
Cc: Chris Paterson <chris.paterson2@...>; Biju Das
<biju.das.jz@...>; Prabhakar Mahadev Lad
<prabhakar.mahadev-lad.rj@...>
Subject: [PATCH 5.10.y-cip] drm: rcar-du: Fix Alpha blending issue on Gen3

From: LUU HOAI <hoai.luu.ub@...>

commit b7aaa61726cbc7b941007af14a9f991a828c67e4 upstream.

As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf,
unexpected image output(such as incorrect colors or planes being
invisible) can happen on the below conditions, as PnALPHAR register is not
initialized by reset.

When alpha blending (PpMRm.PpSPIM=0b101) is performed and:
•two Planes are enabled on any DUn (n=0,1,2,3)
oDSPRn= 0x0000 0031 or 0x0000 0013
•or DU0 and DU1 is used for display at the same time
oDSPR0= 0x0000 0001 and DSPR1= 0x0000 0003
oDSPR0= 0x0000 0003 and DSPR1= 0x0000 0001
•or DU2 and DU3(H3 Only) is used for display at the same time
oDSPR2= 0x0000 0001 and DSPR3= 0x0000 0003
oDSPR2= 0x0000 0003 and DSPR3= 0x0000 0001

This patch set PnALPHAR register to 0 to avoid this issue.

Signed-off-by: LUU HOAI <hoai.luu.ub@...>
Signed-off-by: Biju Das <biju.das.jz@...>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...>
Signed-off-by: Laurent Pinchart
<laurent.pinchart+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/gpu/drm/rcar-du/rcar_du_plane.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
Looks good to me this patch.
If there are no other comments, I can apply.

Best regards,
Nobuhiro


Biju Das
 

From: LUU HOAI <hoai.luu.ub@...>

commit b7aaa61726cbc7b941007af14a9f991a828c67e4 upstream.

As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf,
unexpected image output(such as incorrect colors or planes being
invisible) can happen on the below conditions, as PnALPHAR register
is not initialized by reset.

When alpha blending (PpMRm.PpSPIM=0b101) is performed and:
•two Planes are enabled on any DUn (n=0,1,2,3)
oDSPRn= 0x0000 0031 or 0x0000 0013
•or DU0 and DU1 is used for display at the same time
oDSPR0= 0x0000 0001 and DSPR1= 0x0000 0003
oDSPR0= 0x0000 0003 and DSPR1= 0x0000 0001
•or DU2 and DU3(H3 Only) is used for display at the same time
oDSPR2= 0x0000 0001 and DSPR3= 0x0000 0003
oDSPR2= 0x0000 0003 and DSPR3= 0x0000 0001

This patch set PnALPHAR register to 0 to avoid this issue.

Signed-off-by: LUU HOAI <hoai.luu.ub@...>
Signed-off-by: Biju Das <biju.das.jz@...>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
drivers/gpu/drm/rcar-du/rcar_du_plane.c | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index a0021fc25b27..151efd25b554 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -510,6 +510,18 @@ static void rcar_du_plane_setup_format_gen3(struct rcar_du_group *rgrp,

rcar_du_plane_write(rgrp, index, PnDDCR4,
state->format->edf | PnDDCR4_CODE);
+
+ /*
+ * On Gen3, some DU channels have two planes, each being wired to a
+ * separate VSPD instance. The DU can then blend two planes. While
+ * this feature isn't used by the driver, issues related to alpha
+ * blending (such as incorrect colors or planes being invisible) may
+ * still occur if the PnALPHAR register has a stale value. Set the
+ * register to 0 to avoid this.
+ */
+
+ /* TODO: Check if alpha-blending should be disabled in PnMR. */
+ rcar_du_plane_write(rgrp, index, PnALPHAR, 0);
}

static void rcar_du_plane_setup_format(struct rcar_du_group *rgrp,
--
2.25.1