Date
1 - 1 of 1
[PATCH 5.10.y-cip 11/12] clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
Biju Das
commit 57746e993442b9e143a262623e1da6c908d782e3 upstream.
Add conditional compilation for struct r9a07g044_cpg_info, so the compiler won't allocate any memory for this variable in case CONFIG_CLK_R9A07G044 is disabled. Reported-by: Pavel Machek <pavel@...> Signed-off-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20220804082605.157269-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@...> Signed-off-by: Biju Das <biju.das.jz@...> --- drivers/clk/renesas/r9a07g044-cpg.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c index df9d5d91e065..518f00d86782 100644 --- a/drivers/clk/renesas/r9a07g044-cpg.c +++ b/drivers/clk/renesas/r9a07g044-cpg.c @@ -357,6 +357,7 @@ static const unsigned int r9a07g044_crit_mod_clks[] __initconst = { MOD_CLK_BASE + R9A07G044_DMAC_ACLK, }; +#ifdef CONFIG_CLK_R9A07G044 const struct rzg2l_cpg_info r9a07g044_cpg_info = { /* Core Clocks */ .core_clks = core_clks.common, @@ -377,6 +378,7 @@ const struct rzg2l_cpg_info r9a07g044_cpg_info = { .resets = r9a07g044_resets, .num_resets = R9A07G044_TSU_PRESETN + 1, /* Last reset ID + 1 */ }; +#endif #ifdef CONFIG_CLK_R9A07G054 const struct rzg2l_cpg_info r9a07g054_cpg_info = { -- 2.25.1 |
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