[PATCH 5.10.y-cip 10/25] arm64: dts: renesas: r9a07g043: Fillup the WDT{0,2} stub nodes


Biju Das
 

commit a8352a5158ed032fa6c0d433fefc63285fdac8b0 upstream.

Fillup the WDT{0,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@...>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Link: https://lore.kernel.org/r/20220425170530.200921-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 24 ++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index d161600495aa..15335e9ca06b 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -694,13 +694,33 @@ hsusb: usb@11c60000 {
};

wdt0: watchdog@12800800 {
+ compatible = "renesas,r9a07g043-wdt",
+ "renesas,rzg2l-wdt";
reg = <0 0x12800800 0 0x400>;
- /* place holder */
+ clocks = <&cpg CPG_MOD R9A07G043_WDT0_PCLK>,
+ <&cpg CPG_MOD R9A07G043_WDT0_CLK>;
+ clock-names = "pclk", "oscclk";
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "wdt", "perrout";
+ resets = <&cpg R9A07G043_WDT0_PRESETN>;
+ power-domains = <&cpg>;
+ status = "disabled";
};

wdt2: watchdog@12800400 {
+ compatible = "renesas,r9a07g043-wdt",
+ "renesas,rzg2l-wdt";
reg = <0 0x12800400 0 0x400>;
- /* place holder */
+ clocks = <&cpg CPG_MOD R9A07G043_WDT2_PCLK>,
+ <&cpg CPG_MOD R9A07G043_WDT2_CLK>;
+ clock-names = "pclk", "oscclk";
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "wdt", "perrout";
+ resets = <&cpg R9A07G043_WDT2_PRESETN>;
+ power-domains = <&cpg>;
+ status = "disabled";
};

ostm0: timer@12801000 {
--
2.25.1