[PATCH 5.10.y-cip 13/13] arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi


Biju Das
 

commit f40846e7c9f50bfbba96d566c63cbdb57b817249 upstream.

On RZ/G2{L,LC} SoM module, gpio for power selection is connected to
P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property
of vccq_sdhi1 regulator from common dtsi to soc specific dtsi.

Signed-off-by: Biju Das <biju.das.jz@...>
Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Biju Das <biju.das.jz@...>
---
arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi | 1 -
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi | 4 ++++
3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
index 8dd1c69a6749..0e61b85efb43 100644
--- a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
@@ -74,7 +74,6 @@ vccq_sdhi1: regulator-vccq-sdhi1 {
regulator-name = "SDHI1 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
- gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index c934cd3633a4..aadc41515093 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -48,3 +48,7 @@ &scif2 {
status = "okay";
};
#endif
+
+&vccq_sdhi1 {
+ gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index 856c949796ff..74a844ea7537 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -98,3 +98,7 @@ &spi1 {
status = "disabled";
};
#endif
+
+&vccq_sdhi1 {
+ gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
+};
--
2.25.1