[PATCH 5.10.y-cip 18/31] arm64: dts: renesas: r9a07g054: Fillup the SDHI{0,1} stub nodes


Lad Prabhakar
 

commit ffe3f135dd28295114233d2a8073b3b15774b528 upstream.

Fillup the SDHI{0,1} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
Reviewed-by: Biju Das <biju.das.jz@...>
Link: https://lore.kernel.org/r/20220227203744.18355-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...>
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 26 ++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 3ddf0f24071c..0b0e924e28ae 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -398,13 +398,35 @@
};

sdhi0: mmc@11c00000 {
+ compatible = "renesas,sdhi-r9a07g054",
+ "renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
- /* place holder */
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G054_SDHI0_IMCLK>,
+ <&cpg CPG_MOD R9A07G054_SDHI0_CLK_HS>,
+ <&cpg CPG_MOD R9A07G054_SDHI0_IMCLK2>,
+ <&cpg CPG_MOD R9A07G054_SDHI0_ACLK>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg R9A07G054_SDHI0_IXRST>;
+ power-domains = <&cpg>;
+ status = "disabled";
};

sdhi1: mmc@11c10000 {
+ compatible = "renesas,sdhi-r9a07g054",
+ "renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c10000 0 0x10000>;
- /* place holder */
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G054_SDHI1_IMCLK>,
+ <&cpg CPG_MOD R9A07G054_SDHI1_CLK_HS>,
+ <&cpg CPG_MOD R9A07G054_SDHI1_IMCLK2>,
+ <&cpg CPG_MOD R9A07G054_SDHI1_ACLK>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg R9A07G054_SDHI1_IXRST>;
+ power-domains = <&cpg>;
+ status = "disabled";
};

eth0: ethernet@11c20000 {
--
2.17.1