commit 678eb67513a963e5ce00a4ed6a07a5722bd1267e upstream. Document the device tree binding for the Renesas RZ/V2L SoC. Signed-off-by: Biju Das <biju.das.jz@...> Signed-off-by: Lad Prabhakar <prabhakar

commit 4decd2e54b61686787f36b727d2772e067a46ea5 upstream. Define RZ/V2L (R9A07G054) Clock Pulse Generator Core Clock and module clock outputs, as listed in Table 7.1.4.2 ("Clock List r1.0") and also a

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...> commit b289cdecc7c3e25e001cde260c882e4d9a8b0772 upstream. As per the HW manual (Rev.1.00 Sep, 2021) PLL2 and PLL3 should be 1600 MHz, but with curren

commit f0b62b0bbedcdfde18116080605cebd9beec4ee9 upstream. Add GPU clock and reset entries to CPG driver. Signed-off-by: Biju Das <biju.das.jz@...> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@

commit 7ef9c45a23a9071dee23ca1a769c53ec2cdc07c0 upstream. G clock is sourced from PLL3 and PLL6. The output of the mux is connected to divider. This patch adds a mux and divider for getting different

commit 81a27b1f69022174567e8237d3de2534821671ba upstream. Enable the microSD card slot connected to SDHI1 on the RZ/G2LC SMARC platform by removing the sdhi1 override which disabled it, and by adding

commit 7ca0ce6478c6803c9f86e7366f5634de9c096207 upstream. RZ/G2LC SoM has both 64 GB eMMC and microSD connected to SDHI0. Both these interfaces are mutually exclusive and the SD0 device selection is b

commit 3a3c2a48d8c6ba586a2eda249b0e2f5f19609dfd upstream. The RZ/G2L and RZ/G2LC SoCs are similar and they share the same DEVID. RZ/G2LC has fewer peripherals compared to RZ/G2L. SSI (3 channels vs 4

From: Quirin Gylstorff <quirin.gylstorff@...> This patch series integrates ISAR with the Sbuild feature. Changes in V2: - reoder patches Quirin Gylstorff (4): scripts/deploy-cip-core.sh: Use dtb from

[ANNOUNCE] Release v4.4.302-cip70 Hi all, CIP kernel team has released Linux kernel v4.4.302-cip70. This applies the required fixes for 4.4.y up to 4.9.320 of the 4.9.y tree. You can get this release

From: Quirin Gylstorff <quirin.gylstorff@...> A build with only the option `kas/efibootguard.yml` will not succeed. Move the content to a include in the image directory and the adapt the kas files. Si

From: Quirin Gylstorff <quirin.gylstorff@...> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...> --- kas/opt/swupdate.yml | 4 ---- recipes-core/images/swupdate.inc | 3 +++ 2 files changed, 3 inser

cip-gitlab/ci/iwamatsu/linux-4.19.y-cip-rc smc: 5 runs, 2 regressions (v4.19.252-cip78-113-gb7034e0f773f8) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig | regres

cip-gitlab/ci/iwamatsu/linux-4.19.y-cip-rc kselftest-futex: 6 runs, 1 regressions (v4.19.252-cip78-113-gb7034e0f773f8) Regressions Summary ------------------- platform | arch | lab | compiler | defcon

cip-gitlab/ci/iwamatsu/linux-4.19.y-cip-rc kselftest-filesystems: 4 runs, 1 regressions (v4.19.252-cip78-113-gb7034e0f773f8) Regressions Summary ------------------- platform | arch | lab | compiler |

cip-gitlab/ci/iwamatsu/linux-4.19.y-cip-rc baseline: 53 runs, 9 regressions (v4.19.252-cip78-113-gb7034e0f773f8) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig |

cip-gitlab/ci/iwamatsu/linux-4.19.y-cip-rc build: 138 builds: 3 failed, 135 passed, 2 errors, 16 warnings (v4.19.252-cip78-113-gb7034e0f773f8) Full Build Summary: https://kernelci.org/build/cip-gitlab

From: Quirin Gylstorff <quirin.gylstorff@...> This fixes an error during the kernel build with sbuild if Modules.symvers doesn't exist as find returns 1 if a name could not be found. Signed-off-by: Qu

From: Quirin Gylstorff <quirin.gylstorff@...> Due to sbuild we can no longer access the build chroot with all installed packages. Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...> --- .../ovmf-bi

From: Quirin Gylstorff <quirin.gylstorff@...> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@...> --- kas-cip.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kas-cip.yml b/kas