commit 0be8907359df4c62319f5cb2c6981ff0d9ebf35a upstream. Add RZ/G2L MTU3a counter driver. This IP supports the following phase counting modes on MTU1 and MTU2 channels 1) 16-bit phase counting modes

cip-gitlab/ci/pavel/linux-test build: 167 builds: 4 failed, 163 passed, 6 errors, 17 warnings (v6.1.26-1321-g3152fb7c8d2d6) Full Build Summary: https://kernelci.org/build/cip-gitlab/branch/ci%2Fpavel%

Looks like optee-client is part of bookworm, but version 3.19.0 only. Latest is 3.21.0. Please make sure we aren't colliding. And did you use the official debianization? If not, please do. Jan -- Siem

cip/linux-5.10.y-cip build: 113 builds: 0 failed, 113 passed, 4 warnings (v5.10.180-cip34-26-g462b2292d23e6) Full Build Summary: https://kernelci.org/build/cip/branch/linux-5.10.y-cip/kernel/v5.10.180

commit 7bb985ac03c4a91d185c006f68c4fadfb71e1cca upstream. This commit adds cascade_counts_enable and external_input_phase_ clock_select items to counter ABI file. (e.g. for Renesas MTU3 hardware used

commit 0a9d6b54297e216199cbfd08c5e6a35cce152477 upstream. The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in the Renesas RZ/G2L family SoC's. It consists of eight 16-bit timer channel

commit 654c293e1687b31819f9bf1ac71b5a85a8053210 upstream. The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in the Renesas RZ/G2L family SoCs. It consists of eight 16-bit timer channels

This patch series aims to add MTU3 core/counter driver support for RZ/G2L alike SoCs. All these patches are cherry-picked from the mainline. It is tested with Rotary encoder[1] [1] https://www.mouser.

This patch series aims to add SCI support for RZ/G2L alike SoCs. While at it, added DMA fixes for SCIF IP. All these patches are cherry-picked from the mainline except patch#7 as we don't have proper

Settings IMAGE_FSTYPE to something like "ext4 swu" or "wic.xz swu" causes uncompressed '.wic' image left non-removed after the build finished. This is caused by indirect dependency on "wic" in swupdat

commit dd123dd01def6ad917703542cf7263865bed3239 upstream. Add MTU3a node to R9A07G054 (RZ/V2L) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@...> Reviewed-by: Geert Uytterhoeven <geert+renesas@...> L

commit 26336d66d0216b7366f80ce9fca5f98d271d43ba upstream. Add MTU3a node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@...> Reviewed-by: Geert Uytterhoeven <geert+renesas@...> L

commit 5dee9439cc2d60ff35cad04b618ee53f48a7cfc2 upstream. Add the MAINTAINERS entries for the Renesas RZ/G2L MTU3a counter driver. Signed-off-by: Biju Das <biju.das.jz@...> Signed-off-by: Lee Jones <l

commit 576d6b40dcceade7d77e88f63e621349c6937bc3 upstream. Add MTU3a clock and reset entry to CPG driver. Signed-off-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20221005111855.553436

Hi! I moved 6.1-cip branch a bit forward. Below is a summary of patches that needed forward-porting according to my scripts. Let me know if I missed some. These were too tangled for quick forward-port

From: Srinuvasan A <srinuvasan.a@...> Update cip-kernel-config revision to latest one. Signed-off-by: Srinuvasan A <srinuvasan.a@...> --- recipes-kernel/linux/cip-kernel-config.inc | 2 +- 1 file chang

cip/linux-6.1.y-cip ltp-timers: 14 runs, 5 regressions (v6.1.26-1314-g1ab0ac1d7e2e3) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig | regressions ----------------

cip/linux-6.1.y-cip ltp-pty: 9 runs, 1 regressions (v6.1.26-1314-g1ab0ac1d7e2e3) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig | regressions -----------------+--

cip-gitlab/ci/pavel/linux-test ltp-timers: 11 runs, 4 regressions (v6.1.26-1314-g1ab0ac1d7e2e3) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig | regressions -----

cip-gitlab/ci/pavel/linux-test ltp-ipc: 14 runs, 1 regressions (v6.1.26-1314-g1ab0ac1d7e2e3) Regressions Summary ------------------- platform | arch | lab | compiler | defconfig | regressions --------