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[PATCH 5.10.y-cip 22/23] arm64: dts: renesas: rzv2m evk: Enable i2c
From: Phil Edworthy <phil.edworthy@...> commit 39ffd3307fb85ec8a73a8b9d13b0ea923c48b72a upstream. Signed-off-by: Phil Edworthy <phil.edworthy@...> Link: https://lore.kernel.org/r/20220819193944.337599
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From: Phil Edworthy <phil.edworthy@...> commit 39ffd3307fb85ec8a73a8b9d13b0ea923c48b72a upstream. Signed-off-by: Phil Edworthy <phil.edworthy@...> Link: https://lore.kernel.org/r/20220819193944.337599
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Biju Das
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[PATCH 5.10.y-cip 21/23] arm64: dts: renesas: r9a09g011: Fix I2C SoC specific strings
From: Fabrizio Castro <fabrizio.castro.jz@...> commit 2ac909916b520df09a23f152bb9016d7b892b496 upstream. The preferred form for Renesas' compatible strings is: "<vendor>,<family>-<module>" Somehow the
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit 2ac909916b520df09a23f152bb9016d7b892b496 upstream. The preferred form for Renesas' compatible strings is: "<vendor>,<family>-<module>" Somehow the
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Biju Das
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[PATCH 5.10.y-cip 20/23] arm64: dts: renesas: r9a09g011: Add i2c nodes
From: Phil Edworthy <phil.edworthy@...> commit 54ac6794df9db684d367662a7ea84b7f41cf9312 upstream. Add device nodes for the I2C controllers that are not assigned to the ISP. Signed-off-by: Phil Edworth
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From: Phil Edworthy <phil.edworthy@...> commit 54ac6794df9db684d367662a7ea84b7f41cf9312 upstream. Add device nodes for the I2C controllers that are not assigned to the ISP. Signed-off-by: Phil Edworth
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Biju Das
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[PATCH 5.10.y-cip 18/23] dt-bindings: i2c: renesas,rzv2m: Change maintainer to Fabrizio Castro
From: Chris Paterson <chris.paterson2@...> commit f30ec5df80a0a3328ad6b9c2434ccaa331505307 upstream. Phil no longer works for Renesas. Signed-off-by: Chris Paterson <chris.paterson2@...> Acked-by: Fab
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From: Chris Paterson <chris.paterson2@...> commit f30ec5df80a0a3328ad6b9c2434ccaa331505307 upstream. Phil no longer works for Renesas. Signed-off-by: Chris Paterson <chris.paterson2@...> Acked-by: Fab
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Biju Das
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[PATCH 5.10.y-cip 17/23] dt-bindings: i2c: renesas,rzv2m: Fix SoC specific string
From: Fabrizio Castro <fabrizio.castro.jz@...> commit 0a4eecf96c640886226f1ca7fdbb11bb20bc55b9 upstream. The preferred form for Renesas' compatible strings is: "<vendor>,<family>-<module>" Somehow the
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit 0a4eecf96c640886226f1ca7fdbb11bb20bc55b9 upstream. The preferred form for Renesas' compatible strings is: "<vendor>,<family>-<module>" Somehow the
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Biju Das
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[PATCH 5.10.y-cip 16/23] dt-bindings: i2c: Document RZ/V2M I2C controller
From: Phil Edworthy <phil.edworthy@...> commit ba7a4d15e2c40f8fa37b38e4379e70019227dba0 upstream. Document Renesas RZ/V2M (r9a09g011) I2C controller bindings. Signed-off-by: Phil Edworthy <phil.edwort
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From: Phil Edworthy <phil.edworthy@...> commit ba7a4d15e2c40f8fa37b38e4379e70019227dba0 upstream. Document Renesas RZ/V2M (r9a09g011) I2C controller bindings. Signed-off-by: Phil Edworthy <phil.edwort
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Biju Das
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[PATCH 5.10.y-cip 15/23] clk: renesas: r9a09g011: Add IIC clock and reset entries
From: Phil Edworthy <phil.edworthy@...> commit 425e9e04ae5d94fd140f48b1e1bd1c4e4de533e9 upstream. Add IIC groups clock and reset entries to CPG driver. IIC Group A consists of IIC0 and IIC1. IIC Group
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From: Phil Edworthy <phil.edworthy@...> commit 425e9e04ae5d94fd140f48b1e1bd1c4e4de533e9 upstream. Add IIC groups clock and reset entries to CPG driver. IIC Group A consists of IIC0 and IIC1. IIC Group
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Biju Das
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[PATCH 5.10.y-cip 13/23] PM: core: Redefine pm_ptr() macro
From: Paul Cercueil <paul@...> commit c06ef740d401d0f4ab188882bf6f8d9cf0f75eaf upstream. The pm_ptr() macro was previously conditionally defined, according to the value of the CONFIG_PM option. This m
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From: Paul Cercueil <paul@...> commit c06ef740d401d0f4ab188882bf6f8d9cf0f75eaf upstream. The pm_ptr() macro was previously conditionally defined, according to the value of the CONFIG_PM option. This m
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Biju Das
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[PATCH 5.10.y-cip 12/23] driver core: add a helper to setup both the of_node and fwnode of a device
From: Ioana Ciornei <ioana.ciornei@...> commit 43e76d463c09a0272b84775bcc727c1eb8b384b2 upstream. There are many places where both the fwnode_handle and the of_node of a device need to be populated. A
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From: Ioana Ciornei <ioana.ciornei@...> commit 43e76d463c09a0272b84775bcc727c1eb8b384b2 upstream. There are many places where both the fwnode_handle and the of_node of a device need to be populated. A
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Biju Das
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[PATCH 5.10.y-cip 11/23] arm64: dts: renesas: rzv2mevk2: Enable watchdog
From: Fabrizio Castro <fabrizio.castro.jz@...> commit 594edf2c61f2eb79234e642e3a82d7ae02e7a241 upstream. Enable the watchdog so that we can reboot the system. Signed-off-by: Fabrizio Castro <fabrizio.
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit 594edf2c61f2eb79234e642e3a82d7ae02e7a241 upstream. Enable the watchdog so that we can reboot the system. Signed-off-by: Fabrizio Castro <fabrizio.
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Biju Das
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[PATCH 5.10.y-cip 10/23] arm64: dts: renesas: r9a09g011: Add watchdog node
From: Fabrizio Castro <fabrizio.castro.jz@...> commit 753a4ae153788225a30b0ee9dd18da83f1d94447 upstream. The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs, but Linux is only allowed one. Add a
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit 753a4ae153788225a30b0ee9dd18da83f1d94447 upstream. The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs, but Linux is only allowed one. Add a
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Biju Das
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[PATCH 5.10.y-cip 09/23] watchdog: rzg2l_wdt: Handle TYPE-B reset for RZ/V2M
From: Fabrizio Castro <fabrizio.castro.jz@...> commit f769f97917c1e756e12ff042a93f6e3167254b5b upstream. As per section 48.4 of the HW User Manual, IPs in the RZ/V2M SoC need either a TYPE-A reset seq
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit f769f97917c1e756e12ff042a93f6e3167254b5b upstream. As per section 48.4 of the HW User Manual, IPs in the RZ/V2M SoC need either a TYPE-A reset seq
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Biju Das
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[PATCH 5.10.y-cip 08/23] watchdog: rzg2l_wdt: Add rzv2m support
From: Phil Edworthy <phil.edworthy@...> commit ec122fd94eeb87b2e906360efe7447362f83e9ae upstream. The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without the parity error registers. Thi
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From: Phil Edworthy <phil.edworthy@...> commit ec122fd94eeb87b2e906360efe7447362f83e9ae upstream. The WDT on RZ/V2M devices is basically the same as RZ/G2L, but without the parity error registers. Thi
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Biju Das
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[PATCH 5.10.y-cip 07/23] dt-bindings: watchdog: renesas,wdt: Add r9a09g011 (RZ/V2M) support
From: Phil Edworthy <phil.edworthy@...> commit d59913b0a5b6b8c52c8fbceca910d4aedbbd4cf1 upstream. Add the documentation for the r9a09g011 SoC, but in doing so also reorganise the doc to make it easier
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From: Phil Edworthy <phil.edworthy@...> commit d59913b0a5b6b8c52c8fbceca910d4aedbbd4cf1 upstream. Add the documentation for the r9a09g011 SoC, but in doing so also reorganise the doc to make it easier
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Biju Das
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[PATCH 5.10.y-cip 06/23] clk: renesas: r9a09g011: Add WDT clock and reset entries
From: Phil Edworthy <phil.edworthy@...> commit efded37b426f4e1b7b004b1e9924ff4bf16ec0fd upstream. Add WDT0 clock and reset entries to CPG driver. Signed-off-by: Phil Edworthy <phil.edworthy@...> Link:
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From: Phil Edworthy <phil.edworthy@...> commit efded37b426f4e1b7b004b1e9924ff4bf16ec0fd upstream. Add WDT0 clock and reset entries to CPG driver. Signed-off-by: Phil Edworthy <phil.edworthy@...> Link:
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Biju Das
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[PATCH 5.10.y-cip 05/23] arm64: dts: renesas: r9a09g011: Add system controller node
commit b9e88ba6dcda4cd2d36e27dadb6acab4fad8a80f upstream. Add system controller node to RZ/V2M SoC dtsi. Signed-off-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20221116102140.852889
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commit b9e88ba6dcda4cd2d36e27dadb6acab4fad8a80f upstream. Add system controller node to RZ/V2M SoC dtsi. Signed-off-by: Biju Das <biju.das.jz@...> Link: https://lore.kernel.org/r/20221116102140.852889
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Biju Das
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[PATCH 5.10.y-cip 04/23] arm64: dts: renesas: r9a09g011: Add L2 Cache node
commit c6b1737f45ca708fee76a30afb4a7b0247455749 upstream. The Cortex-A53 processor on RZ/V2M has 512 KB L2 Cache. Add L2 Cache node to SoC dtsi. Signed-off-by: Biju Das <biju.das.jz@...> Link: https:/
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commit c6b1737f45ca708fee76a30afb4a7b0247455749 upstream. The Cortex-A53 processor on RZ/V2M has 512 KB L2 Cache. Add L2 Cache node to SoC dtsi. Signed-off-by: Biju Das <biju.das.jz@...> Link: https:/
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Biju Das
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[PATCH 5.10.y-cip 03/23] arm64: dts: renesas: r9a09g011: Reword ethernet status
From: Fabrizio Castro <fabrizio.castro.jz@...> commit 11ffdcdfa2125859b298f9a66f9eefba493a37c0 upstream. Although of_fdt_device_is_available returns true when the DT property "status" is assigned "ok"
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit 11ffdcdfa2125859b298f9a66f9eefba493a37c0 upstream. Although of_fdt_device_is_available returns true when the DT property "status" is assigned "ok"
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Biju Das
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[PATCH 5.10.y-cip 02/23] arm64: dts: renesas: r9a09g011: Fix unit address format error
From: Fabrizio Castro <fabrizio.castro.jz@...> commit 278f5015a3deaa2ea0db6070bbc2a8edf2455643 upstream. Although the HW User Manual for RZ/V2M states in the "Address Map" section that the interrupt c
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From: Fabrizio Castro <fabrizio.castro.jz@...> commit 278f5015a3deaa2ea0db6070bbc2a8edf2455643 upstream. Although the HW User Manual for RZ/V2M states in the "Address Map" section that the interrupt c
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Biju Das
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[PATCH 5.10.y-cip 01/23] clk: renesas: r9a09g011: Add TIM clock and reset entries
commit d459f557ad76f449687e76fcb94f1009551dd669 upstream. Add Compare-Match Timer (TIM) clock and reset entries to CPG driver. The TIM IP on the RZ/V2M comes with 32 channels, but the ISP has full con
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commit d459f557ad76f449687e76fcb94f1009551dd669 upstream. Add Compare-Match Timer (TIM) clock and reset entries to CPG driver. The TIM IP on the RZ/V2M comes with 32 channels, but the ISP has full con
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Biju Das
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