[cip-dev] [PATCH 4.4.y 42/52] ARM: dts: r8a77470: Add IRQC support

Fabrizio Castro fabrizio.castro at bp.renesas.com
Mon May 13 15:37:07 UTC 2019


From: Biju Das <biju.das at bp.renesas.com>

commit 141fb10294e3ba5ee2d34d464ddc8a9952bd3372 upstream.

Describe the IRQC interrupt controller in the R8A77470 device tree.

Signed-off-by: Biju Das <biju.das at bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro at bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
Signed-off-by: Simon Horman <horms+renesas at verge.net.au>
[fab: reworked clocks and power-domains properties. Removed resets
property]
Signed-off-by: Fabrizio Castro <fabrizio.castro at bp.renesas.com>
---
 arch/arm/boot/dts/r8a77470.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 2d542b3..1325dae 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -154,6 +154,25 @@
 			reg = <0 0xe6160000 0 0x100>;
 		};
 
+		irqc: interrupt-controller at e61c0000 {
+			compatible = "renesas,irqc-r8a77470", "renesas,irqc";
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			reg = <0 0xe61c0000 0 0x200>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R8A77470_CLK_IRQC>;
+			power-domains = <&cpg_clocks>;
+		};
+
 		icram0:	sram at e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
-- 
2.7.4



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